From nobody Sat Jul 12 15:12:06 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1486020105568186.59714686551786; Wed, 1 Feb 2017 23:21:45 -0800 (PST) Received: from localhost ([::1]:54963 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cZBiB-00076i-Ev for importer@patchew.org; Thu, 02 Feb 2017 02:21:43 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52695) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cZ9kG-0007wp-Hl for qemu-devel@nongnu.org; Thu, 02 Feb 2017 00:15:53 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cZ9k9-0004GG-0E for qemu-devel@nongnu.org; Thu, 02 Feb 2017 00:15:44 -0500 Received: from ozlabs.org ([103.22.144.67]:57923) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cZ9k8-0004D8-8a; Thu, 02 Feb 2017 00:15:36 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vDSqZ2hNzz9s8c; Thu, 2 Feb 2017 16:15:03 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1486012506; bh=WvveVr5pgm+klrRCVe/UrQrh2UH1dFrbQCZqyTuCE2s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WYs4hW/wbGn42EPqmiX4mLZL8jJsWTsV87YThH8orH26KKTSZZvm8hXeDKYE4wpD0 OIgbaBhrQo9xyfmzDRCsPErWV+KB8oOnoLQwn4Hxac9z4q11B75RCJAGc7QQrxDBqt g0wTqR1gP3+3N85mrrssSLXMpwfLLb3N0bQBfClw= From: David Gibson To: peter.maydell@linaro.org Date: Thu, 2 Feb 2017 16:14:38 +1100 Message-Id: <20170202051445.5735-101-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170202051445.5735-1-david@gibson.dropbear.id.au> References: <20170202051445.5735-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 100/107] target-ppc: Add xvtstdc[sp, dp] instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, Nikunj A Dadhania , qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, aik@ozlabs.ru, qemu-ppc@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Nikunj A Dadhania xvtstdcsp: VSX Vector Test Data Class Single-Precision xvtstdcdp: VSX Vector Test Data Class Double-Precision Signed-off-by: Nikunj A Dadhania Signed-off-by: David Gibson --- target/ppc/fpu_helper.c | 40 +++++++++++++++++++++++++++++++++= ++++ target/ppc/helper.h | 2 ++ target/ppc/internal.h | 5 +++-- target/ppc/translate/vsx-impl.inc.c | 2 ++ target/ppc/translate/vsx-ops.inc.c | 8 ++++++++ 5 files changed, 55 insertions(+), 2 deletions(-) diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index ffcf9ca..45bc93c 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -3187,3 +3187,43 @@ void helper_xvxsigsp(CPUPPCState *env, uint32_t opco= de) } putVSR(xT(opcode), &xt, env); } + +/* VSX_TEST_DC - VSX floating point test data class + * op - instruction mnemonic + * nels - number of elements (1, 2 or 4) + * xbn - VSR register number + * tp - type (float32 or float64) + * fld - vsr_t field (VsrD(*) or VsrW(*)) + * tfld - target vsr_t field (VsrD(*) or VsrW(*)) + * fld_max - target field max + */ +#define VSX_TEST_DC(op, nels, xbn, tp, fld, tfld, fld_max) \ +void helper_##op(CPUPPCState *env, uint32_t opcode) \ +{ \ + ppc_vsr_t xt, xb; \ + uint32_t i, sign, dcmx; \ + uint32_t match =3D 0; \ + \ + getVSR(xbn, &xb, env); \ + memset(&xt, 0, sizeof(xt)); \ + dcmx =3D DCMX_XV(opcode); \ + \ + for (i =3D 0; i < nels; i++) { \ + sign =3D tp##_is_neg(xb.fld); \ + if (tp##_is_any_nan(xb.fld)) { \ + match =3D extract32(dcmx, 6, 1); \ + } else if (tp##_is_infinity(xb.fld)) { \ + match =3D extract32(dcmx, 4 + !sign, 1); \ + } else if (tp##_is_zero(xb.fld)) { \ + match =3D extract32(dcmx, 2 + !sign, 1); \ + } else if (tp##_is_zero_or_denormal(xb.fld)) { \ + match =3D extract32(dcmx, 0 + !sign, 1); \ + } \ + xt.tfld =3D match ? fld_max : 0; \ + match =3D 0; \ + } \ + putVSR(xT(opcode), &xt, env); \ +} + +VSX_TEST_DC(xvtstdcdp, 2, xB(opcode), float64, VsrD(i), VsrD(i), UINT64_MA= X) +VSX_TEST_DC(xvtstdcsp, 4, xB(opcode), float32, VsrW(i), VsrW(i), UINT32_MA= X) diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 9d4ed08..165e4a5 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -546,6 +546,8 @@ DEF_HELPER_2(xvcvsxdsp, void, env, i32) DEF_HELPER_2(xvcvuxdsp, void, env, i32) DEF_HELPER_2(xvcvsxwsp, void, env, i32) DEF_HELPER_2(xvcvuxwsp, void, env, i32) +DEF_HELPER_2(xvtstdcsp, void, env, i32) +DEF_HELPER_2(xvtstdcdp, void, env, i32) DEF_HELPER_2(xvrspi, void, env, i32) DEF_HELPER_2(xvrspic, void, env, i32) DEF_HELPER_2(xvrspim, void, env, i32) diff --git a/target/ppc/internal.h b/target/ppc/internal.h index c22d74e..4c3811a 100644 --- a/target/ppc/internal.h +++ b/target/ppc/internal.h @@ -68,7 +68,7 @@ static inline uint32_t name(uint32_t opcode) = \ ((opcode >> (shift2)) & ((1 << (nb2)) - 1)); = \ } =20 -#define EXTRACT_HELPER_DXFORM(name, = \ +#define EXTRACT_HELPER_SPLIT_3(name, = \ d0_bits, shift_op_d0, shift_d0, = \ d1_bits, shift_op_d1, shift_d1, = \ d2_bits, shift_op_d2, shift_d2) = \ @@ -156,7 +156,7 @@ EXTRACT_HELPER(FPFLM, 17, 8); EXTRACT_HELPER(FPW, 16, 1); =20 /* addpcis */ -EXTRACT_HELPER_DXFORM(DX, 10, 6, 6, 5, 16, 1, 1, 0, 0) +EXTRACT_HELPER_SPLIT_3(DX, 10, 6, 6, 5, 16, 1, 1, 0, 0) #if defined(TARGET_PPC64) /* darn */ EXTRACT_HELPER(L, 16, 2); @@ -198,6 +198,7 @@ EXTRACT_HELPER(UIM, 16, 2); EXTRACT_HELPER(SHW, 8, 2); EXTRACT_HELPER(SP, 19, 2); EXTRACT_HELPER(IMM8, 11, 8); +EXTRACT_HELPER_SPLIT_3(DCMX_XV, 5, 16, 0, 1, 2, 5, 1, 6, 6); =20 typedef union _ppc_vsr_t { uint8_t u8[16]; diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx= -impl.inc.c index 9bcc5af..adb6fc7 100644 --- a/target/ppc/translate/vsx-impl.inc.c +++ b/target/ppc/translate/vsx-impl.inc.c @@ -928,6 +928,8 @@ GEN_VSX_HELPER_2(xvrspic, 0x16, 0x0A, 0, PPC2_VSX) GEN_VSX_HELPER_2(xvrspim, 0x12, 0x0B, 0, PPC2_VSX) GEN_VSX_HELPER_2(xvrspip, 0x12, 0x0A, 0, PPC2_VSX) GEN_VSX_HELPER_2(xvrspiz, 0x12, 0x09, 0, PPC2_VSX) +GEN_VSX_HELPER_2(xvtstdcsp, 0x14, 0x1A, 0, PPC2_VSX) +GEN_VSX_HELPER_2(xvtstdcdp, 0x14, 0x1E, 0, PPC2_VSX) GEN_VSX_HELPER_2(xxperm, 0x08, 0x03, 0, PPC2_ISA300) GEN_VSX_HELPER_2(xxpermr, 0x08, 0x07, 0, PPC2_ISA300) =20 diff --git a/target/ppc/translate/vsx-ops.inc.c b/target/ppc/translate/vsx-= ops.inc.c index ee74312..6dd5d72 100644 --- a/target/ppc/translate/vsx-ops.inc.c +++ b/target/ppc/translate/vsx-ops.inc.c @@ -133,6 +133,14 @@ GEN_XX2FORM_EO(xvxsigdp, 0x16, 0x1D, 0x01, PPC2_ISA300= ), GEN_XX2FORM_EO(xvxexpsp, 0x16, 0x1D, 0x08, PPC2_ISA300), GEN_XX2FORM_EO(xvxsigsp, 0x16, 0x1D, 0x09, PPC2_ISA300), =20 +/* DCMX =3D bit[25] << 6 | bit[29] << 5 | bit[11:15] */ +#define GEN_XX2FORM_DCMX(name, opc2, opc3, fl2) \ +GEN_XX3FORM(name, opc2, opc3 | 0, fl2), \ +GEN_XX3FORM(name, opc2, opc3 | 1, fl2) + +GEN_XX2FORM_DCMX(xvtstdcdp, 0x14, 0x1E, PPC2_ISA300), +GEN_XX2FORM_DCMX(xvtstdcsp, 0x14, 0x1A, PPC2_ISA300), + GEN_XX2FORM(xvabsdp, 0x12, 0x1D, PPC2_VSX), GEN_XX2FORM(xvnabsdp, 0x12, 0x1E, PPC2_VSX), GEN_XX2FORM(xvnegdp, 0x12, 0x1F, PPC2_VSX), --=20 2.9.3