From nobody Sat Jul 12 15:37:25 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1486014422799112.18635216922542; Wed, 1 Feb 2017 21:47:02 -0800 (PST) Received: from localhost ([::1]:54373 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cZAEW-000452-Sm for importer@patchew.org; Thu, 02 Feb 2017 00:47:00 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51301) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cZ9jk-0007H9-P6 for qemu-devel@nongnu.org; Thu, 02 Feb 2017 00:15:18 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cZ9jh-0003cV-Dx for qemu-devel@nongnu.org; Thu, 02 Feb 2017 00:15:12 -0500 Received: from ozlabs.org ([103.22.144.67]:55807) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cZ9jg-0003XN-MS; Thu, 02 Feb 2017 00:15:09 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vDSqN4w36z9s7k; Thu, 2 Feb 2017 16:14:56 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1486012496; bh=0axuBCCoSnDN7NvkyM6mGakNqkiJNJvbsuHoW6egF5Y=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UcGNPHHKQNfcYg+d5Nt62qi3vjMefYrvFKaQADr+ivzTMMQ4cTm5zqFEifHTuXFib +JjTMS2gzPCuc7MqyTLGZfXTNjPMKCaYpkzJDiubQkh2Ni33m1FPwLJdMNsiRNtoRJ cdA0gHkuoGNSXsJ9VWvIhQ2C7fcji4Zu+rB65+Rw= From: David Gibson To: peter.maydell@linaro.org Date: Thu, 2 Feb 2017 16:13:25 +1100 Message-Id: <20170202051445.5735-28-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170202051445.5735-1-david@gibson.dropbear.id.au> References: <20170202051445.5735-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 027/107] target-ppc: implement lxvl instruction X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, Nikunj A Dadhania , qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, aik@ozlabs.ru, qemu-ppc@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Nikunj A Dadhania lxvl: Load VSX Vector with Length Little/Big-endian Storage: +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+ |=E2=80=9CT=E2=80=9D|=E2=80=9Ch=E2=80=9D|=E2=80=9Ci=E2=80=9D|=E2=80=9Cs=E2= =80=9D|=E2=80=9C =E2=80=9D|=E2=80=9Ci=E2=80=9D|=E2=80=9Cs=E2=80=9D|=E2=80= =9C =E2=80=9D|=E2=80=9Ca=E2=80=9D|=E2=80=9C =E2=80=9D|=E2=80=9CT=E2=80=9D|= =E2=80=9CE=E2=80=9D|=E2=80=9CS=E2=80=9D|=E2=80=9CT=E2=80=9D|FF|FF| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+ Loading 14 bytes results in: Vector (8-bit elements) in BE: +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+ |=E2=80=9CT=E2=80=9D|=E2=80=9Ch=E2=80=9D|=E2=80=9Ci=E2=80=9D|=E2=80=9Cs=E2= =80=9D|=E2=80=9C =E2=80=9D|=E2=80=9Ci=E2=80=9D|=E2=80=9Cs=E2=80=9D|=E2=80= =9C =E2=80=9D|=E2=80=9Ca=E2=80=9D|=E2=80=9C =E2=80=9D|=E2=80=9CT=E2=80=9D|= =E2=80=9CE=E2=80=9D|=E2=80=9CS=E2=80=9D|=E2=80=9CT=E2=80=9D|00|00| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+ Vector (8-bit elements) in LE: +--+--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ |00|00|=E2=80=9CT=E2=80=9D|=E2=80=9CS=E2=80=9D|=E2=80=9CE=E2=80=9D|=E2=80= =9CT=E2=80=9D|=E2=80=9C =E2=80=9D|=E2=80=9Ca=E2=80=9D|=E2=80=9C =E2=80=9D|= =E2=80=9Cs=E2=80=9D|=E2=80=9Ci=E2=80=9D|=E2=80=9C =E2=80=9D|=E2=80=9Cs=E2= =80=9D|=E2=80=9Ci=E2=80=9D|"h"|"T"| +--+--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ Signed-off-by: Nikunj A Dadhania Signed-off-by: David Gibson --- target/ppc/helper.h | 3 +++ target/ppc/mem_helper.c | 35 +++++++++++++++++++++++++++++++++= ++ target/ppc/translate/vsx-impl.inc.c | 29 +++++++++++++++++++++++++++++ target/ppc/translate/vsx-ops.inc.c | 3 +++ 4 files changed, 70 insertions(+) diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 3257820..1c70815 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -312,6 +312,9 @@ DEF_HELPER_3(lvewx, void, env, avr, tl) DEF_HELPER_3(stvebx, void, env, avr, tl) DEF_HELPER_3(stvehx, void, env, avr, tl) DEF_HELPER_3(stvewx, void, env, avr, tl) +#if defined(TARGET_PPC64) +DEF_HELPER_4(lxvl, void, env, tl, tl, tl) +#endif DEF_HELPER_4(vsumsws, void, env, avr, avr, avr) DEF_HELPER_4(vsum2sws, void, env, avr, avr, avr) DEF_HELPER_4(vsum4sbs, void, env, avr, avr, avr) diff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c index 1ab8a6e..c4ddc5b 100644 --- a/target/ppc/mem_helper.c +++ b/target/ppc/mem_helper.c @@ -24,6 +24,7 @@ =20 #include "helper_regs.h" #include "exec/cpu_ldst.h" +#include "internal.h" =20 //#define DEBUG_OP =20 @@ -284,6 +285,40 @@ STVE(stvewx, cpu_stl_data_ra, bswap32, u32) #undef I #undef LVE =20 +#ifdef TARGET_PPC64 +#define GET_NB(rb) ((rb >> 56) & 0xFF) + +#define VSX_LXVL(name, lj) \ +void helper_##name(CPUPPCState *env, target_ulong addr, \ + target_ulong xt_num, target_ulong rb) \ +{ \ + int i; \ + ppc_vsr_t xt; \ + uint64_t nb =3D GET_NB(rb); \ + \ + xt.s128 =3D int128_zero(); \ + if (nb) { \ + nb =3D (nb >=3D 16) ? 16 : nb; = \ + if (msr_le && !lj) { \ + for (i =3D 16; i > 16 - nb; i--) { \ + xt.VsrB(i - 1) =3D cpu_ldub_data_ra(env, addr, GETPC()); \ + addr =3D addr_add(env, addr, 1); \ + } \ + } else { \ + for (i =3D 0; i < nb; i++) { \ + xt.VsrB(i) =3D cpu_ldub_data_ra(env, addr, GETPC()); \ + addr =3D addr_add(env, addr, 1); \ + } \ + } \ + } \ + putVSR(xt_num, &xt, env); \ +} + +VSX_LXVL(lxvl, 0) +#undef VSX_LXVL +#undef GET_NB +#endif /* TARGET_PPC64 */ + #undef HI_IDX #undef LO_IDX =20 diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx= -impl.inc.c index 7000035..1f64fb7 100644 --- a/target/ppc/translate/vsx-impl.inc.c +++ b/target/ppc/translate/vsx-impl.inc.c @@ -240,6 +240,35 @@ VSX_VECTOR_LOAD_STORE(stxv, st_i64, 0) VSX_VECTOR_LOAD_STORE(lxvx, ld_i64, 1) VSX_VECTOR_LOAD_STORE(stxvx, st_i64, 1) =20 +#ifdef TARGET_PPC64 +#define VSX_VECTOR_LOAD_STORE_LENGTH(name) \ +static void gen_##name(DisasContext *ctx) \ +{ \ + TCGv EA, xt; \ + \ + if (xT(ctx->opcode) < 32) { \ + if (unlikely(!ctx->vsx_enabled)) { \ + gen_exception(ctx, POWERPC_EXCP_VSXU); \ + return; \ + } \ + } else { \ + if (unlikely(!ctx->altivec_enabled)) { \ + gen_exception(ctx, POWERPC_EXCP_VPU); \ + return; \ + } \ + } \ + EA =3D tcg_temp_new(); \ + xt =3D tcg_const_tl(xT(ctx->opcode)); \ + gen_set_access_type(ctx, ACCESS_INT); \ + gen_addr_register(ctx, EA); \ + gen_helper_##name(cpu_env, EA, xt, cpu_gpr[rB(ctx->opcode)]); \ + tcg_temp_free(EA); \ + tcg_temp_free(xt); \ +} + +VSX_VECTOR_LOAD_STORE_LENGTH(lxvl) +#endif + #define VSX_LOAD_SCALAR_DS(name, operation) \ static void gen_##name(DisasContext *ctx) \ { \ diff --git a/target/ppc/translate/vsx-ops.inc.c b/target/ppc/translate/vsx-= ops.inc.c index f684066..62a0afc 100644 --- a/target/ppc/translate/vsx-ops.inc.c +++ b/target/ppc/translate/vsx-ops.inc.c @@ -10,6 +10,9 @@ GEN_HANDLER_E(lxvw4x, 0x1F, 0x0C, 0x18, 0, PPC_NONE, PPC2= _VSX), GEN_HANDLER_E(lxvh8x, 0x1F, 0x0C, 0x19, 0, PPC_NONE, PPC2_ISA300), GEN_HANDLER_E(lxvb16x, 0x1F, 0x0C, 0x1B, 0, PPC_NONE, PPC2_ISA300), GEN_HANDLER_E(lxvx, 0x1F, 0x0C, 0x08, 0x00000040, PPC_NONE, PPC2_ISA300), +#if defined(TARGET_PPC64) +GEN_HANDLER_E(lxvl, 0x1F, 0x0D, 0x08, 0, PPC_NONE, PPC2_ISA300), +#endif =20 GEN_HANDLER_E(stxsdx, 0x1F, 0xC, 0x16, 0, PPC_NONE, PPC2_VSX), GEN_HANDLER_E(stxsibx, 0x1F, 0xD, 0x1C, 0, PPC_NONE, PPC2_ISA300), --=20 2.9.3