From nobody Sat Jul 12 15:48:00 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1486017960112903.7906558283036; Wed, 1 Feb 2017 22:46:00 -0800 (PST) Received: from localhost ([::1]:54726 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cZB9a-0004gP-71 for importer@patchew.org; Thu, 02 Feb 2017 01:45:58 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52442) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cZ9kB-0007pm-5F for qemu-devel@nongnu.org; Thu, 02 Feb 2017 00:15:47 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cZ9k4-0004AL-3b for qemu-devel@nongnu.org; Thu, 02 Feb 2017 00:15:38 -0500 Received: from ozlabs.org ([103.22.144.67]:48833) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cZ9k3-00046p-Eh; Thu, 02 Feb 2017 00:15:31 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3vDSqX2HT1z9sNG; Thu, 2 Feb 2017 16:15:01 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1486012504; bh=eBhIOugX/AvxD0ubytgiRNpKyyJ4ky26To2ildkn8B8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=IEGDCqIZDLaK6B5uKtPRN3y+IvsYzmo/2MRk0NtgCTrBjdkuEMHdDjMSFYZcp05hQ 8a/kysEzhYMmCqm1C/8IDDFv8H1gn6QaFR6XbKhyMyEmtaIvNMKCqLdZpDUUlBmS8N 1cF3ndgUAAKguSYA7fUzJm2UHaDz8x2i2TSLdP20= From: David Gibson To: peter.maydell@linaro.org Date: Thu, 2 Feb 2017 16:14:25 +1100 Message-Id: <20170202051445.5735-88-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170202051445.5735-1-david@gibson.dropbear.id.au> References: <20170202051445.5735-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 087/107] target-ppc: Use ppc_vsr_t.f128 in xscmp[o, u, exp]qp X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, Nikunj A Dadhania , qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, agraf@suse.de, aik@ozlabs.ru, qemu-ppc@nongnu.org, Bharata B Rao , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Bharata B Rao xscmpoqp, xscmpuqp & xscmpexpqp were added before f128 field was introduced in ppc_vsr_t. Now that we have it, use it instead of generating the 128 bit float using two 64bit fields. Signed-off-by: Bharata B Rao Signed-off-by: Nikunj A Dadhania Signed-off-by: David Gibson --- target/ppc/fpu_helper.c | 20 ++++++++------------ 1 file changed, 8 insertions(+), 12 deletions(-) diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index ae57272..d648234 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -2452,8 +2452,8 @@ void helper_xscmpexpqp(CPUPPCState *env, uint32_t opc= ode) exp_a =3D extract64(xa.VsrD(0), 48, 15); exp_b =3D extract64(xb.VsrD(0), 48, 15); =20 - if (unlikely(float128_is_any_nan(make_float128(xa.VsrD(0), xa.VsrD(1))= ) || - float128_is_any_nan(make_float128(xb.VsrD(0), xb.VsrD(1))= ))) { + if (unlikely(float128_is_any_nan(xa.f128) || + float128_is_any_nan(xb.f128))) { cc =3D CRF_SO; } else { if (exp_a < exp_b) { @@ -2528,24 +2528,20 @@ void helper_##op(CPUPPCState *env, uint32_t opcode)= \ ppc_vsr_t xa, xb; \ uint32_t cc =3D 0; \ bool vxsnan_flag =3D false, vxvc_flag =3D false; = \ - float128 a, b; \ \ helper_reset_fpstatus(env); \ getVSR(rA(opcode) + 32, &xa, env); \ getVSR(rB(opcode) + 32, &xb, env); \ \ - a =3D make_float128(xa.VsrD(0), xa.VsrD(1)); \ - b =3D make_float128(xb.VsrD(0), xb.VsrD(1)); \ - \ - if (float128_is_signaling_nan(a, &env->fp_status) || \ - float128_is_signaling_nan(b, &env->fp_status)) { \ + if (float128_is_signaling_nan(xa.f128, &env->fp_status) || \ + float128_is_signaling_nan(xb.f128, &env->fp_status)) { \ vxsnan_flag =3D true; \ cc =3D CRF_SO; \ if (fpscr_ve =3D=3D 0 && ordered) { = \ vxvc_flag =3D true; \ } \ - } else if (float128_is_quiet_nan(a, &env->fp_status) || \ - float128_is_quiet_nan(b, &env->fp_status)) { \ + } else if (float128_is_quiet_nan(xa.f128, &env->fp_status) || \ + float128_is_quiet_nan(xb.f128, &env->fp_status)) { \ cc =3D CRF_SO; \ if (ordered) { \ vxvc_flag =3D true; \ @@ -2558,9 +2554,9 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) = \ float_invalid_op_excp(env, POWERPC_EXCP_FP_VXVC, 0); \ } \ \ - if (float128_lt(a, b, &env->fp_status)) { \ + if (float128_lt(xa.f128, xb.f128, &env->fp_status)) { \ cc |=3D CRF_LT; \ - } else if (!float128_le(a, b, &env->fp_status)) { \ + } else if (!float128_le(xa.f128, xb.f128, &env->fp_status)) { \ cc |=3D CRF_GT; \ } else { \ cc |=3D CRF_EQ; \ --=20 2.9.3