From nobody Sat Jun 28 16:36:27 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1519150159419347.73078550373634; Tue, 20 Feb 2018 10:09:19 -0800 (PST) Received: from localhost ([::1]:56992 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eoCLu-000510-Fa for importer@patchew.org; Tue, 20 Feb 2018 13:09:18 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53967) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eoCGa-0008Ex-H8 for qemu-devel@nongnu.org; Tue, 20 Feb 2018 13:03:49 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eoCGY-0001iy-Ef for qemu-devel@nongnu.org; Tue, 20 Feb 2018 13:03:48 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:46524) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eoCGU-0001WQ-8o; Tue, 20 Feb 2018 13:03:42 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1eoCGK-0008Rv-4p; Tue, 20 Feb 2018 18:03:32 +0000 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Tue, 20 Feb 2018 18:03:14 +0000 Message-Id: <20180220180325.29818-9-peter.maydell@linaro.org> X-Mailer: git-send-email 2.16.1 In-Reply-To: <20180220180325.29818-1-peter.maydell@linaro.org> References: <20180220180325.29818-1-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PATCH 08/19] target/arm: Add Cortex-M33 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add a Cortex-M33 definition. The M33 is an M profile CPU which implements the ARM v8M architecture, including the M profile Security Extension. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/cpu.c | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 34b5a4a00b..897003a186 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1205,6 +1205,35 @@ static void cortex_m4_initfn(Object *obj) cpu->id_isar5 =3D 0x00000000; } =20 +static void cortex_m33_initfn(Object *obj) +{ + ARMCPU *cpu =3D ARM_CPU(obj); + + set_feature(&cpu->env, ARM_FEATURE_V8); + set_feature(&cpu->env, ARM_FEATURE_M); + set_feature(&cpu->env, ARM_FEATURE_M_SECURITY); + set_feature(&cpu->env, ARM_FEATURE_THUMB_DSP); + cpu->midr =3D 0x410fd213; /* r0p3 */ + cpu->pmsav7_dregion =3D 16; + cpu->sau_sregion =3D 8; + cpu->id_pfr0 =3D 0x00000030; + cpu->id_pfr1 =3D 0x00000210; + cpu->id_dfr0 =3D 0x00200000; + cpu->id_afr0 =3D 0x00000000; + cpu->id_mmfr0 =3D 0x00101F40; + cpu->id_mmfr1 =3D 0x00000000; + cpu->id_mmfr2 =3D 0x01000000; + cpu->id_mmfr3 =3D 0x00000000; + cpu->id_isar0 =3D 0x01101110; + cpu->id_isar1 =3D 0x02212000; + cpu->id_isar2 =3D 0x20232232; + cpu->id_isar3 =3D 0x01111131; + cpu->id_isar4 =3D 0x01310132; + cpu->id_isar5 =3D 0x00000000; + cpu->clidr =3D 0x00000000; + cpu->ctr =3D 0x8000c000; +} + static void arm_v7m_class_init(ObjectClass *oc, void *data) { CPUClass *cc =3D CPU_CLASS(oc); @@ -1696,6 +1725,8 @@ static const ARMCPUInfo arm_cpus[] =3D { .class_init =3D arm_v7m_class_init }, { .name =3D "cortex-m4", .initfn =3D cortex_m4_initfn, .class_init =3D arm_v7m_class_init }, + { .name =3D "cortex-m33", .initfn =3D cortex_m33_initfn, + .class_init =3D arm_v7m_class_init }, { .name =3D "cortex-r5", .initfn =3D cortex_r5_initfn }, { .name =3D "cortex-a7", .initfn =3D cortex_a7_initfn }, { .name =3D "cortex-a8", .initfn =3D cortex_a8_initfn }, --=20 2.16.1