On Thu, May 20, 2021 at 01:09:09PM +0200, Philippe Mathieu-Daudé wrote:
> A bus master might specify the 'aligned' attribute to enforce
> a transaction using aligned address. If the address is not
> aligned, the accessor will return MEMTX_UNALIGNED_ERROR.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
> include/exec/memattrs.h | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/include/exec/memattrs.h b/include/exec/memattrs.h
> index 95f2d20d55b..6fe59194e35 100644
> --- a/include/exec/memattrs.h
> +++ b/include/exec/memattrs.h
> @@ -39,6 +39,8 @@ typedef struct MemTxAttrs {
> unsigned int requester_id:16;
> /* Invert endianness for this page */
> unsigned int byte_swap:1;
> + /* Memory access must be aligned */
> + unsigned int aligned:1;
> /*
> * The following are target-specific page-table bits. These are not
> * related to actual memory transactions at all. However, this structure
> @@ -66,6 +68,7 @@ typedef struct MemTxAttrs {
> #define MEMTX_OK 0
> #define MEMTX_ERROR (1U << 0) /* device returned an error */
> #define MEMTX_DECODE_ERROR (1U << 1) /* nothing at that address */
> +#define MEMTX_UNALIGNED_ERROR (1U << 2) /* address is not aligned */
Most of the time alignment requirements are for "natural alignment"
(i.e. 2-byte accesses must be 2-byte aligned, 4-byte accesses must be
4-byte aligned). I wonder if there exist hardware interfaces that have
other alignment requirements and if the MemTxAttrs::aligned attribute
introduced above will be able to cover those cases?
Stefan