From nobody Sat May 4 01:18:20 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1622495905; cv=none; d=zohomail.com; s=zohoarc; b=YdyeKlRphgnRQaSYpqn3CBjkAt0tekqzVytFf/LYfC6gaZsr4W0RqV603NBdYb8MtSRBx/P9atHuLV+XKAfozS0YubOUw9jA0SRE5ZjClVGnXATbLRi0cTRVreQ/kqIeXuqRJGoHLkSIh5K2lUVnSpPp0o454rjn7nvZVMICPAg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1622495905; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Sender:Subject:To; bh=8WADMcEZ9kRz+AHyKofNfgb6tsuOJANWRqC6eURqFjQ=; b=Uywcg98GK8eeQmU/+Z6jUTc9SVWUmaKm+SdJUrsXoaUBQik8Yxrft8Ui+JoeFWITeSAYO/L0Vai6jwEAZzmPCRNlURfFpXzhXs/RjJaLtZoFGFhfHm7gvjjY95I1+qHNZOYUC1BQS4C9KVCZul9h9NXZDns9J6P3neSbRpJoaA8= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1622495905202669.7426450350896; Mon, 31 May 2021 14:18:25 -0700 (PDT) Received: from localhost ([::1]:34266 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lnpIk-0007qj-LH for importer2@patchew.org; Mon, 31 May 2021 17:18:22 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38080) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lnpFx-000712-Ne for qemu-devel@nongnu.org; Mon, 31 May 2021 17:15:29 -0400 Received: from [201.28.113.2] (port=8197 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lnpFu-0000Ph-74 for qemu-devel@nongnu.org; Mon, 31 May 2021 17:15:28 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Mon, 31 May 2021 18:14:21 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 7A9A2801481; Mon, 31 May 2021 18:14:21 -0300 (-03) From: Luis Pires To: qemu-devel@nongnu.org Subject: [PATCH v2] docs/devel: Explain in more detail the TB chaining mechanisms Date: Mon, 31 May 2021 18:14:11 -0300 Message-Id: <20210531211411.173895-1-luis.pires@eldorado.org.br> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-OriginalArrivalTime: 31 May 2021 21:14:21.0671 (UTC) FILETIME=[ECE11770:01D75661] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=201.28.113.2; envelope-from=luis.pires@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pbonzini@redhat.com, Luis Pires , richard.henderson@linaro.org Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Luis Pires --- v2: - s/outer execution loop/main loop - Mention re-evaluation of cpu_exec_interrupt() - Changed wording on lookup_and_goto_ptr() - Added more details to step 2 of goto+tb + exit_tb - Added details about when goto_tb + exit_tb cannot be used docs/devel/tcg.rst | 105 +++++++++++++++++++++++++++++++++++++++------ 1 file changed, 93 insertions(+), 12 deletions(-) diff --git a/docs/devel/tcg.rst b/docs/devel/tcg.rst index 4ebde44b9d..9cc56df22a 100644 --- a/docs/devel/tcg.rst +++ b/docs/devel/tcg.rst @@ -11,13 +11,14 @@ performances. QEMU's dynamic translation backend is called TCG, for "Tiny Code Generator". For more information, please take a look at ``tcg/README``. =20 -Some notable features of QEMU's dynamic translator are: +The following sections outline some notable features and implementation +details of QEMU's dynamic translator. =20 CPU state optimisations ----------------------- =20 -The target CPUs have many internal states which change the way it -evaluates instructions. In order to achieve a good speed, the +The target CPUs have many internal states which change the way they +evaluate instructions. In order to achieve a good speed, the translation phase considers that some state information of the virtual CPU cannot change in it. The state is recorded in the Translation Block (TB). If the state changes (e.g. privilege level), a new TB will @@ -31,17 +32,97 @@ Direct block chaining --------------------- =20 After each translated basic block is executed, QEMU uses the simulated -Program Counter (PC) and other cpu state information (such as the CS +Program Counter (PC) and other CPU state information (such as the CS segment base value) to find the next basic block. =20 -In order to accelerate the most common cases where the new simulated PC -is known, QEMU can patch a basic block so that it jumps directly to the -next one. - -The most portable code uses an indirect jump. An indirect jump makes -it easier to make the jump target modification atomic. On some host -architectures (such as x86 or PowerPC), the ``JUMP`` opcode is -directly patched so that the block chaining has no overhead. +In its simplest, less optimized form, this is done by exiting from the +current TB, going through the TB epilogue, and then back to the +main loop. That=E2=80=99s where QEMU looks for the next TB to execute, +translating it from the guest architecture if it isn=E2=80=99t already ava= ilable +in memory. Then QEMU proceeds to execute this next TB, starting at the +prologue and then moving on to the translated instructions. + +Exiting from the TB this way will cause the ``cpu_exec_interrupt()`` +callback to be re-evaluated before executing additional instructions. +It is mandatory to exit this way after any CPU state changes that may +unmask interrupts. + +In order to accelerate the most common cases where the TB for the new +simulated PC is already available, QEMU has mechanisms that allow +multiple TBs to be chained directly, without having to go back to the +main loop as described above. These mechanisms are: + +``lookup_and_goto_ptr`` +^^^^^^^^^^^^^^^^^^^^^^^ + +Calling ``tcg_gen_lookup_and_goto_ptr()`` will emit a call to +``helper_lookup_tb_ptr``. This helper will look for an existing TB that +matches the current CPU state. If the destination TB is available its +code address is returned, otherwise the address of the JIT epilogue is +returned. The call to the helper is always followed by the tcg ``goto_ptr`` +opcode, which branches to the returned address. In this way, we either +branch to the next TB or return to the main loop. + +``goto_tb + exit_tb`` +^^^^^^^^^^^^^^^^^^^^^ + +The translation code usually implements branching by performing the +following steps: + +1. Call ``tcg_gen_goto_tb()`` passing a jump slot index (either 0 or 1) + as a parameter. + +2. Emit TCG instructions to update the CPU state with any information + that has been assumed constant and is required by the main loop to + correctly locate and execute the next TB. For most guests, this is + just the PC of the branch destination, but others may store additional + data. The information updated in this step must be inferable from both + ``cpu_get_tb_cpu_state()`` and ``cpu_restore_state()``. + +3. Call ``tcg_gen_exit_tb()`` passing the address of the current TB and + the jump slot index again. + +Step 1, ``tcg_gen_goto_tb()``, will emit a ``goto_tb`` TCG +instruction that later on gets translated to a jump to an address +associated with the specified jump slot. Initially, this is the address +of step 2's instructions, which update the CPU state information. Step 3, +``tcg_gen_exit_tb()``, exits from the current TB returning a tagged +pointer composed of the last executed TB=E2=80=99s address and the jump sl= ot +index. + +The first time this whole sequence is executed, step 1 simply jumps +to step 2. Then the CPU state information gets updated and we exit from +the current TB. As a result, the behavior is very similar to the less +optimized form described earlier in this section. + +Next, the main loop looks for the next TB to execute using the +current CPU state information (creating the TB if it wasn=E2=80=99t already +available) and, before starting to execute the new TB=E2=80=99s instructio= ns, +patches the previously executed TB by associating one of its jump +slots (the one specified in the call to ``tcg_gen_exit_tb()``) with the +address of the new TB. + +The next time this previous TB is executed and we get to that same +``goto_tb`` step, it will already be patched (assuming the destination TB +is still in memory) and will jump directly to the first instruction of +the destination TB, without going back to the main loop. + +For the ``goto_tb + exit_tb`` mechanism to be used, the following +conditions need to be satisfied: + +* The change in CPU state must be constant, e.g., a direct branch and + not an indirect branch. + +* The direct branch cannot cross a page boundary. Memory mappings + may change, causing the code at the destination address to change. + +Note that, on step 3 (``tcg_gen_exit_tb()``), in addition to the +jump slot index, the address of the TB just executed is also returned. +This is important because that's the TB that will have to be patched +by the main loop, and not necessarily the one that was directly +executed from it. This is due to the fact that the original TB might +have already been chained to additional TBs, which ended up being +executed without the main loop's knowledge. =20 Self-modifying code and translated code invalidation ---------------------------------------------------- --=20 2.25.1