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bh=kbBngyXu7MaV0eNzrz81Hu02B5JHNY79nLgXCQoz3a4=; b=R3lZKoS1kX0r+VnMpJ4anEB27Pa1uUiKb8iLAa3fivXEUzi1DPUDQCmAX43LSRh5Ew3KgE EuEpwYRi9dFiU74Yka2sZ7s/jURzEi/poMpXphjpcqMO2JdE0a9KvjM9p4zSVfUPKpzL8y MYRG/x01L2vPT+rWKU8/x2zuwfVI7/o= X-MC-Unique: WXVWTuVEMSOWCsB3mzH30g-1 From: Eduardo Habkost To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 01/24] target/i386: Add CPU model versions supporting 'xsaves' Date: Tue, 1 Jun 2021 14:09:51 -0400 Message-Id: <20210601181014.2568861-2-ehabkost@redhat.com> In-Reply-To: <20210601181014.2568861-1-ehabkost@redhat.com> References: <20210601181014.2568861-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=216.205.24.124; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.371, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Vitaly Kuznetsov , Richard Henderson , Eduardo Habkost Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" From: Vitaly Kuznetsov Hyper-V 2016 refuses to boot on Skylake+ CPU models because they lack 'xsaves'/'vmx-xsaves' features and this diverges from real hardware. The same issue emerges with AMD "EPYC" CPU model prior to version 3 which got 'xsaves' added. EPYC-Rome/EPYC-Milan CPU models have 'xsaves' enabled from the very beginning so the comment blaming KVM to explain why other CPUs lack 'xsaves' is likely outdated. Signed-off-by: Vitaly Kuznetsov Message-Id: <20210412073952.860944-1-vkuznets@redhat.com> Signed-off-by: Eduardo Habkost --- target/i386/cpu.c | 150 +++++++++++++++++++++++++++++----------------- 1 file changed, 94 insertions(+), 56 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index b4349119f8b..72c521559f0 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -2802,12 +2802,7 @@ static X86CPUDefinition builtin_x86_defs[] =3D { CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCI= D | CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX | CPUID_7_0_EBX_SMAP, - /* Missing: XSAVES (not supported by some Linux versions, - * including v4.1 to v4.12). - * KVM doesn't yet expose any XSAVES state save component, - * and the only one defined in Skylake (processor tracing) - * probably will block migration anyway. - */ + /* XSAVES is added in version 4 */ .features[FEAT_XSAVE] =3D CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC | CPUID_XSAVE_XGETBV1, @@ -2883,6 +2878,15 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { /* end of list */ } } }, + { + .version =3D 4, + .note =3D "IBRS, XSAVES, no TSX", + .props =3D (PropValue[]) { + { "xsaves", "on" }, + { "vmx-xsaves", "on" }, + { /* end of list */ } + } + }, { /* end of list */ } } }, @@ -2922,12 +2926,7 @@ static X86CPUDefinition builtin_x86_defs[] =3D { CPUID_7_0_EBX_AVX512VL | CPUID_7_0_EBX_CLFLUSHOPT, .features[FEAT_7_0_ECX] =3D CPUID_7_0_ECX_PKU, - /* Missing: XSAVES (not supported by some Linux versions, - * including v4.1 to v4.12). - * KVM doesn't yet expose any XSAVES state save component, - * and the only one defined in Skylake (processor tracing) - * probably will block migration anyway. - */ + /* XSAVES is added in version 5 */ .features[FEAT_XSAVE] =3D CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC | CPUID_XSAVE_XGETBV1, @@ -3015,6 +3014,15 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { /* end of list */ } } }, + { + .version =3D 5, + .note =3D "IBRS, XSAVES, EPT switching, no TSX", + .props =3D (PropValue[]) { + { "xsaves", "on" }, + { "vmx-xsaves", "on" }, + { /* end of list */ } + } + }, { /* end of list */ } } }, @@ -3057,12 +3065,7 @@ static X86CPUDefinition builtin_x86_defs[] =3D { CPUID_7_0_ECX_AVX512VNNI, .features[FEAT_7_0_EDX] =3D CPUID_7_0_EDX_SPEC_CTRL | CPUID_7_0_EDX_SPEC_CTRL_SSBD, - /* Missing: XSAVES (not supported by some Linux versions, - * including v4.1 to v4.12). - * KVM doesn't yet expose any XSAVES state save component, - * and the only one defined in Skylake (processor tracing) - * probably will block migration anyway. - */ + /* XSAVES is added in version 5 */ .features[FEAT_XSAVE] =3D CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC | CPUID_XSAVE_XGETBV1, @@ -3146,6 +3149,14 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { /* end of list */ } }, }, + { .version =3D 5, + .note =3D "ARCH_CAPABILITIES, EPT switching, XSAVES, no TSX", + .props =3D (PropValue[]) { + { "xsaves", "on" }, + { "vmx-xsaves", "on" }, + { /* end of list */ } + }, + }, { /* end of list */ } } }, @@ -3195,13 +3206,7 @@ static X86CPUDefinition builtin_x86_defs[] =3D { MSR_ARCH_CAP_PSCHANGE_MC_NO | MSR_ARCH_CAP_TAA_NO, .features[FEAT_7_1_EAX] =3D CPUID_7_1_EAX_AVX_VNNI | CPUID_7_1_EAX_AVX512_BF16, - /* - * Missing: XSAVES (not supported by some Linux versions, - * including v4.1 to v4.12). - * KVM doesn't yet expose any XSAVES state save component, - * and the only one defined in Skylake (processor tracing) - * probably will block migration anyway. - */ + /* XSAVES is added in version 2 */ .features[FEAT_XSAVE] =3D CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC | CPUID_XSAVE_XGETBV1, @@ -3257,6 +3262,18 @@ static X86CPUDefinition builtin_x86_defs[] =3D { .features[FEAT_VMX_VMFUNC] =3D MSR_VMX_VMFUNC_EPT_SWITCHING, .xlevel =3D 0x80000008, .model_id =3D "Intel Xeon Processor (Cooperlake)", + .versions =3D (X86CPUVersionDefinition[]) { + { .version =3D 1 }, + { .version =3D 2, + .note =3D "XSAVES", + .props =3D (PropValue[]) { + { "xsaves", "on" }, + { "vmx-xsaves", "on" }, + { /* end of list */ } + }, + }, + { /* end of list */ } + } }, { .name =3D "Icelake-Client", @@ -3299,12 +3316,7 @@ static X86CPUDefinition builtin_x86_defs[] =3D { CPUID_7_0_ECX_AVX512_VPOPCNTDQ, .features[FEAT_7_0_EDX] =3D CPUID_7_0_EDX_SPEC_CTRL | CPUID_7_0_EDX_SPEC_CTRL_SSBD, - /* Missing: XSAVES (not supported by some Linux versions, - * including v4.1 to v4.12). - * KVM doesn't yet expose any XSAVES state save component, - * and the only one defined in Skylake (processor tracing) - * probably will block migration anyway. - */ + /* XSAVES is added in version 3 */ .features[FEAT_XSAVE] =3D CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC | CPUID_XSAVE_XGETBV1, @@ -3372,6 +3384,15 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { /* end of list */ } }, }, + { + .version =3D 3, + .note =3D "no TSX, XSAVES, deprecated", + .props =3D (PropValue[]) { + { "xsaves", "on" }, + { "vmx-xsaves", "on" }, + { /* end of list */ } + }, + }, { /* end of list */ } }, .deprecation_note =3D "use Icelake-Server instead" @@ -3420,12 +3441,7 @@ static X86CPUDefinition builtin_x86_defs[] =3D { CPUID_7_0_ECX_AVX512_VPOPCNTDQ | CPUID_7_0_ECX_LA57, .features[FEAT_7_0_EDX] =3D CPUID_7_0_EDX_SPEC_CTRL | CPUID_7_0_EDX_SPEC_CTRL_SSBD, - /* Missing: XSAVES (not supported by some Linux versions, - * including v4.1 to v4.12). - * KVM doesn't yet expose any XSAVES state save component, - * and the only one defined in Skylake (processor tracing) - * probably will block migration anyway. - */ + /* XSAVES is added in version 5 */ .features[FEAT_XSAVE] =3D CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC | CPUID_XSAVE_XGETBV1, @@ -3518,6 +3534,15 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { /* end of list */ } }, }, + { + .version =3D 5, + .note =3D "XSAVES", + .props =3D (PropValue[]) { + { "xsaves", "on" }, + { "vmx-xsaves", "on" }, + { /* end of list */ } + }, + }, { /* end of list */ } } }, @@ -3552,13 +3577,7 @@ static X86CPUDefinition builtin_x86_defs[] =3D { .features[FEAT_7_0_EDX] =3D CPUID_7_0_EDX_SPEC_CTRL | CPUID_7_0_EDX_ARCH_CAPABILITIES | CPUID_7_0_EDX_SPEC_CTRL_SSBD, - /* - * Missing: XSAVES (not supported by some Linux versions, - * including v4.1 to v4.12). - * KVM doesn't yet expose any XSAVES state save component, - * and the only one defined in Skylake (processor tracing) - * probably will block migration anyway. - */ + /* XSAVES is added in version 3 */ .features[FEAT_XSAVE] =3D CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC | CPUID_XSAVE_XGETBV= 1, .features[FEAT_6_EAX] =3D @@ -3625,6 +3644,15 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { /* end of list */ }, }, }, + { + .version =3D 3, + .note =3D "XSAVES, no MPX, no MONITOR", + .props =3D (PropValue[]) { + { "xsaves", "on" }, + { "vmx-xsaves", "on" }, + { /* end of list */ }, + }, + }, { /* end of list */ }, }, }, @@ -3683,13 +3711,7 @@ static X86CPUDefinition builtin_x86_defs[] =3D { CPUID_7_0_EDX_CORE_CAPABILITY, .features[FEAT_CORE_CAPABILITY] =3D MSR_CORE_CAP_SPLIT_LOCK_DETECT, - /* - * Missing: XSAVES (not supported by some Linux versions, - * including v4.1 to v4.12). - * KVM doesn't yet expose any XSAVES state save component, - * and the only one defined in Skylake (processor tracing) - * probably will block migration anyway. - */ + /* XSAVES is is added in version 3 */ .features[FEAT_XSAVE] =3D CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC | CPUID_XSAVE_XGETBV1, @@ -3754,6 +3776,15 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { /* end of list */ }, }, }, + { + .version =3D 3, + .note =3D "XSAVES, no MPX", + .props =3D (PropValue[]) { + { "xsaves", "on" }, + { "vmx-xsaves", "on" }, + { /* end of list */ }, + }, + }, { /* end of list */ }, }, }, @@ -4035,11 +4066,7 @@ static X86CPUDefinition builtin_x86_defs[] =3D { CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_AV= X2 | CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_RDSEED= | CPUID_7_0_EBX_ADX | CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_CLFLUSH= OPT, - /* - * Missing: XSAVES (not supported by some Linux versions, - * including v4.1 to v4.12). - * KVM doesn't yet expose any XSAVES state save component. - */ + /* XSAVES is added in version 2 */ .features[FEAT_XSAVE] =3D CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC | CPUID_XSAVE_XGETBV1, @@ -4050,6 +4077,17 @@ static X86CPUDefinition builtin_x86_defs[] =3D { .xlevel =3D 0x8000001E, .model_id =3D "Hygon Dhyana Processor", .cache_info =3D &epyc_cache_info, + .versions =3D (X86CPUVersionDefinition[]) { + { .version =3D 1 }, + { .version =3D 2, + .note =3D "XSAVES", + .props =3D (PropValue[]) { + { "xsaves", "on" }, + { /* end of list */ } + }, + }, + { /* end of list */ } + } }, { .name =3D "EPYC-Rome", --=20 2.30.2