Hi Edgar,

While reviewing/auditing how each arch handles failed MMU
transactions, I noticed some confusing code regarding the
On-chip Peripheral Bus (OPB) interface which is currently
not implemented. I took some notes and re-ordered the code
a bit, resulting in this series.

Q: Should we exit gracefully in mb_cpu_realizefn() if the
user requests features that are not implemented?

Thanks,

Phil.

Philippe Mathieu-Daudé (6):
  target/microblaze: Use the IEC binary prefix definitions
  target/microblaze: Extract FPU helpers to fpu_helper.c
  target/microblaze: Assert transaction failures have exception enabled
  target/microblaze: Fix Exception Status Register 'Cause' definitions
  target/microblaze: Replace magic values by proper definitions
  target/microblaze: Set OPB bits in tlb_fill, not in transaction_failed

 target/microblaze/cpu.h        |   8 +-
 target/microblaze/fpu_helper.c | 308 +++++++++++++++++++++++++++++++++
 target/microblaze/helper.c     |  35 +++-
 target/microblaze/mmu.c        |   5 +-
 target/microblaze/op_helper.c  | 304 +-------------------------------
 target/microblaze/meson.build  |   1 +
 6 files changed, 349 insertions(+), 312 deletions(-)
 create mode 100644 target/microblaze/fpu_helper.c

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2.26.3