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Tsirkin" To: qemu-devel@nongnu.org Subject: [PULL v4 47/47] hw/acpi/microvm: turn on 8042 bit in FADT boot architecture flags if present Message-ID: <20220307224357.682101-48-mst@redhat.com> References: <20220307224357.682101-1-mst@redhat.com> MIME-Version: 1.0 In-Reply-To: <20220307224357.682101-1-mst@redhat.com> X-Mailer: git-send-email 2.27.0.106.g8ac3dc51b1 X-Mutt-Fcc: =sent Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=mst@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Disposition: inline Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , Peter Maydell , Richard Henderson , Ani Sinha , Paolo Bonzini Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1646694570882100001 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Ani Sinha The second bit of IAPC_BOOT_ARCH in FADT table indicates the presence of keyboard controller implemented as 8042 or equivalent micro controller. This change enables this flag for microvms if such a device exists (for example, when added explicitly from the QEMU commandline). Change 654701e292d98b308b0 ("hw/acpi: add indication for i8042 in IA-PC boot flags= of the FADT table") enabled this flag for i386 q35 based machines. The reason for doing the same for micro-vms is to make sure we provide the correct tables to the guest OS uniformly in all cases when an i8042 device is present. When this bit is not enabled, guest OSes has to find other indirect methods to detect the device which we would like to avoid. Signed-off-by: Ani Sinha Message-Id: <20220304154032.2071585-5-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/acpi-microvm.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/hw/i386/acpi-microvm.c b/hw/i386/acpi-microvm.c index 68ca7e7fc2..fb09185cbd 100644 --- a/hw/i386/acpi-microvm.c +++ b/hw/i386/acpi-microvm.c @@ -37,6 +37,7 @@ #include "hw/pci/pcie_host.h" #include "hw/usb/xhci.h" #include "hw/virtio/virtio-mmio.h" +#include "hw/input/i8042.h" =20 #include "acpi-common.h" #include "acpi-microvm.h" @@ -187,6 +188,11 @@ static void acpi_build_microvm(AcpiBuildTables *tables, .address =3D GED_MMIO_BASE_REGS + ACPI_GED_REG_RESET, }, .reset_val =3D ACPI_GED_RESET_VALUE, + /* + * ACPI v2, Table 5-10 - Fixed ACPI Description Table Boot Archite= cture + * Flags, bit offset 1 - 8042. + */ + .iapc_boot_arch =3D iapc_boot_arch_8042(), }; =20 table_offsets =3D g_array_new(false, true /* clear */, --=20 MST