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dkim=pass reason="pass (just generated, assumed good)" header.d=opensource.wdc.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d= opensource.wdc.com; h=content-transfer-encoding:mime-version :references:in-reply-to:x-mailer:message-id:date:subject:to :from; s=dkim; t=1650523067; x=1653115068; bh=iYb56uk7QkQsKRVbU7 X3OT4/rDP+/H7r/KJa/gw5Ij8=; b=sCKALq9SSeeQZ9nghpYhD/NrDfwFPPNaeP sZN2a7+WVm+rk1PxppVfmz8vc3YrGXADRD8gQwzOmG3ALl+fCXLcOrOZBRyHMen/ bfuJlyA8vFpxBLm5ij38XwZhgZcghTDWJdUqRYefFNvTfaslBwlpmkLOKM0KJaOI DcfRrzDh7lz6dDh/hpibA4h4Hoq2XURbWocB126LmpVtpmWkC/8PbFiAZfqarN7v DgUBp5Fdr9b6Qb11wB+I//Pmp0XbSjSmSjZFjdI+L44VbpDBMvnEVwAAft3SlkrQ qrpWajPe62Eq2YGG2ftZsXUfG5h1kni26b6/1GQ8bNtx2ziSIZFg== X-Virus-Scanned: amavisd-new at usg-ed-osssrv.wdc.com From: Alistair Francis To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Niklas Cassel , Bin Meng , Frank Chang , Alistair Francis Subject: [PULL 20/31] hw/riscv: virt: fix DT property mmu-type when CPU mmu option is disabled Date: Thu, 21 Apr 2022 16:36:19 +1000 Message-Id: <20220421063630.1033608-21-alistair.francis@opensource.wdc.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220421063630.1033608-1-alistair.francis@opensource.wdc.com> References: <20220421063630.1033608-1-alistair.francis@opensource.wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=68.232.143.124; envelope-from=prvs=10363b772=alistair.francis@opensource.wdc.com; helo=esa2.hgst.iphmx.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1650523994170100001 Content-Type: text/plain; charset="utf-8" From: Niklas Cassel The device tree property "mmu-type" is currently exported as either "riscv,sv32" or "riscv,sv48". However, the riscv cpu device tree binding [1] has a specific value "riscv,none" for a HART without a MMU. Set the device tree property "mmu-type" to "riscv,none" when the CPU mmu option is disabled using rv32,mmu=3Doff or rv64,mmu=3Doff. [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree= /Documentation/devicetree/bindings/riscv/cpus.yaml?h=3Dv5.17 Signed-off-by: Niklas Cassel Reviewed-by: Bin Meng Reviewed-by: Frank Chang Reviewed-by: Alistair Francis Message-Id: <20220414155510.1364147-1-niklas.cassel@wdc.com> Signed-off-by: Alistair Francis --- hw/riscv/virt.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 09609c96e8..b49c5361bd 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -230,8 +230,14 @@ static void create_fdt_socket_cpus(RISCVVirtState *s, = int socket, cpu_name =3D g_strdup_printf("/cpus/cpu@%d", s->soc[socket].hartid_base + cpu); qemu_fdt_add_subnode(mc->fdt, cpu_name); - qemu_fdt_setprop_string(mc->fdt, cpu_name, "mmu-type", - (is_32_bit) ? "riscv,sv32" : "riscv,sv48"); + if (riscv_feature(&s->soc[socket].harts[cpu].env, + RISCV_FEATURE_MMU)) { + qemu_fdt_setprop_string(mc->fdt, cpu_name, "mmu-type", + (is_32_bit) ? "riscv,sv32" : "riscv,sv= 48"); + } else { + qemu_fdt_setprop_string(mc->fdt, cpu_name, "mmu-type", + "riscv,none"); + } name =3D riscv_isa_string(&s->soc[socket].harts[cpu]); qemu_fdt_setprop_string(mc->fdt, cpu_name, "riscv,isa", name); g_free(name); --=20 2.35.1