From nobody Tue May 7 20:56:34 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650622278; cv=none; d=zohomail.com; s=zohoarc; b=W091XM7R/Ga392WcacTWNsrdP9uA+mumpLX8HYz+/LcAwDOzSj8vBwrBKDWAeCqoU3UrGh+rLcZS4uGX0puKMGOWVu8k14Uq1FzhKjA6T/MfQ5Vfeu0P6ZbCp1rEcZWC93iHouuIVW8UQzKDA6OG9/K6ZnwRoxY9OldP9VLm9Y4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650622278; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=lVHlaskVehb1HPwJaP5NZWEzj3D8wAIUBCqaFD2xjB0=; b=YPDWobsif045zybamfHDD4BVGbAwGhstYCb8QHK+quk/+OMiTAYFj1xxuIv3E27OshTpO+GgWKgpIFSedQ5BIeMUPX0wOiqjv5AM+J7XgMU/9PKwgaA8dgSQq7MiCU3jUKH5LduX8r+SoN1BTkY6h+TUzf1C1wCktz09eLTzS88= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650622278261957.4617738858586; Fri, 22 Apr 2022 03:11:18 -0700 (PDT) Received: from localhost ([::1]:35754 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhqFw-0001Bc-RM for importer2@patchew.org; Fri, 22 Apr 2022 06:11:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58184) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhq9Y-0004De-LW for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:42 -0400 Received: from mail-wr1-x434.google.com ([2a00:1450:4864:20::434]:40516) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhq9V-0002ZP-T6 for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:39 -0400 Received: by mail-wr1-x434.google.com with SMTP id e2so4041138wrh.7 for ; Fri, 22 Apr 2022 03:04:37 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.04.35 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:04:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=lVHlaskVehb1HPwJaP5NZWEzj3D8wAIUBCqaFD2xjB0=; b=WOE0K6wa8inglJFkch3bXsI7gZYHZ5ieCvIXBhWxauBhny7WR+0jIrxYuvfGc+Qeei DF4CY18apaBeTpxkCRLSSnoZvO0tY/bxFzwIWqO84xeE4KoWE7MKky+vgMO0WYaEy8h+ xOpKyqH/5bV69S+XgRCi8gwzSSC11kbkdZHgD4TeIFkmEAhAKKrQPtU4T4MryU/qj3TW fKGOtrlfdsl76fh4d6p7mWK1VOmiqAtLqJ9xhIFdRfmsm2hkW7lp4LYrwsExkNAHrL1x Pxp8JTYlzjsxEYEcynn5WdhJEgHCQcs+NM/aCFIVAbg3HJx59yTUud86TiYAjqB9SI92 o8XQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lVHlaskVehb1HPwJaP5NZWEzj3D8wAIUBCqaFD2xjB0=; b=p+vwKcJRuMY4cTaqdwzBvHOrk85BgP21wYqBmsdcJMQXbKzj5v3PWV4O2q2VFkU13X 5+jcaND1UIk6/X78XHVVZD3FOUTvB/YjTo++oVIhqu+cCd2QwDsEdltKIHhbog+gjWPz cDsWM9PMznsuFpbxLDpU+J2/sf6unQLaHKfvqBmXsJtmJpiQwtE62jdabY4nCF5Vn/Qy X2yqqJlgT7ZyUsscTvm95+8MwRXtt4l9sLLBRcMt03s9w6ywXHnBBEsrZ8wA7pt/LUFh 9C0nTD/QBp/fWoGGiDdDnYmOuH3SMD8GjXaGHc36/TTKjVSVE5tt72lmW23nMYmKW0DJ GnwQ== X-Gm-Message-State: AOAM532TW7dW9vc20Lv3WHKwSuI59n+TmVpy/8wRlU+cTIuQ2oELWsUp HrjESWLM1z0RdVC8ys0yS4hf38EdV6Pn2w== X-Google-Smtp-Source: ABdhPJzlOc5iJxVA2Up8XmgprdZ+fM1MUm7cMsnzHBncwdrVkfkhlo46x6JiebAfYlZt5c6Vq30xBg== X-Received: by 2002:a5d:4b45:0:b0:207:ab91:edd8 with SMTP id w5-20020a5d4b45000000b00207ab91edd8mr3098656wrs.168.1650621876389; Fri, 22 Apr 2022 03:04:36 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 01/61] hw/intc/arm_gicv3_its: Add missing blank line Date: Fri, 22 Apr 2022 11:03:32 +0100 Message-Id: <20220422100432.2288247-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650622280312100001 Content-Type: text/plain; charset="utf-8" In commit b6f96009acc we split do_process_its_cmd() from process_its_cmd(), but forgot the usual blank line between function definitions. Add it. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-2-peter.maydell@linaro.org --- hw/intc/arm_gicv3_its.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index 87466732139..44914f25780 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -380,6 +380,7 @@ static ItsCmdResult do_process_its_cmd(GICv3ITSState *s= , uint32_t devid, } return CMD_CONTINUE; } + static ItsCmdResult process_its_cmd(GICv3ITSState *s, const uint64_t *cmdp= kt, ItsCmdType cmd) { --=20 2.25.1 From nobody Tue May 7 20:56:34 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650622149; cv=none; d=zohomail.com; s=zohoarc; b=Nkakp7S6eSE+tJSrzlfLSnYujkJS3bPRq/NY8zdFWmXeqGEV3BeKHlv8K6A9C3QpdnJjmNSlWOAyaLr+L4tUP6jUUSRMn56xbqgUfeoxxwVYgtYJbO06kZZ7sLBIbZRTc5y9Cv9QjZAlT0KkZES5hQAQp8bJfc3lm3zsWQhM5CU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650622149; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=nusE4iJqKxuXxzxUwLDY6MVU16Qz+ioLkpoA1JeR0xQ=; b=NEBxHiLm0/JxMkxJqOORMedEvhPuf2LTDWnHHPbaZ9kg+Iz2Nv8lpYnM3mM3/wH6pBxCwMXok6nJlrHpqmVOKFhJVbb0nYUQqSlgn/cyvNr4CYPOoLEN8MC+escr88QaK6h3aDxpRePWvUYjV21LIC5AvS/VjQ7BHIQfy+8eloQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650622148982598.5450611086429; Fri, 22 Apr 2022 03:09:08 -0700 (PDT) Received: from localhost ([::1]:32978 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhqDr-0007e3-LY for importer2@patchew.org; Fri, 22 Apr 2022 06:09:07 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58252) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhq9b-0004E2-5Y for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:47 -0400 Received: from mail-wr1-x432.google.com ([2a00:1450:4864:20::432]:45965) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhq9Y-0002ZU-9M for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:42 -0400 Received: by mail-wr1-x432.google.com with SMTP id w4so10276646wrg.12 for ; Fri, 22 Apr 2022 03:04:38 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.04.36 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:04:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=nusE4iJqKxuXxzxUwLDY6MVU16Qz+ioLkpoA1JeR0xQ=; b=DVA1dWbTaTzwPJZN/KDd/Dd/1bpsQqjIKd/SdeMpwMb2bKLRkZPK9tVoB9n66h8Aqd /zyUFLbXWzad3idW90bRqJCHPvnqeBgE/YaQfvvR7et/1TGO4ZJrKY09FdDOhhm/vzYQ VOjkJ9+w0r7LnV2EDHJTE67zkkR99bdVE5KEbzx0c89bZ+9xpWzyO1Eif+h96aF1+BK9 /WHAjNvFqggKNWPUBhazv6ugIrfQgyhmgzMjXCIpZlwUu9YVUajXN4B/3ZipqV6iTCFi fyPPkZM5P0eAAqUTTmfKGnE6I3LSImX3OOdN70ARgbAicZa4vmy7C4G9Lc86wxNHm6Si q6vg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=nusE4iJqKxuXxzxUwLDY6MVU16Qz+ioLkpoA1JeR0xQ=; b=QiC7EwAWEbC2mr4JWmcSlaSvmGQkhqSE/HdKVZQuxPpSICQ3jKHPRHfaA27dt/a9Aq KkFoXXES92tFJioTSPWzpEUhyA9pG66eK0u9jrxUyjogrxoj2xX9YJH3GOKG+rF3foCj kJCv8Px9UAvwCeg15+DiRAI7p15Go48+FnNDd2GzZ5N2tVNwA62ivktKFiPVtM1zNGM8 UQsnyhqu6LI/Ahf2/q2k7ZP9TGfjX+i60sayWeyKejOvp8Ief2O/UUHGLSHPDyeAXbBe osXl6nCPE8VWH5V96vrckQtn92vHad4x3pt5TeruyBXI8KS2WwBsQJHaudK3AwpbLCnZ NhYg== X-Gm-Message-State: AOAM531mWK8WilTLXF8MmHSh7zrzM4VK/Jh53iJ4jyfVsssp9ybswZPQ AHs3WoCo2Fc9oNWxs+UaNRKj+uezd7kUUw== X-Google-Smtp-Source: ABdhPJwepCN8SXB8wYegZnzK/W7QFxfXI2i3vmEw8TUANIZwNSVrkxkeONo+y7oJ9i0xjEsEGgdcGA== X-Received: by 2002:adf:ebc7:0:b0:1ee:945a:ffb4 with SMTP id v7-20020adfebc7000000b001ee945affb4mr3050675wrn.641.1650621877103; Fri, 22 Apr 2022 03:04:37 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 02/61] hw/intc/arm_gicv3: Sanity-check num-cpu property Date: Fri, 22 Apr 2022 11:03:33 +0100 Message-Id: <20220422100432.2288247-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650622149386100001 Content-Type: text/plain; charset="utf-8" In the GICv3 code we implicitly rely on there being at least one CPU and thus at least one redistributor and CPU interface. Sanity-check that the property the board code sets is not zero. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-3-peter.maydell@linaro.org --- hw/intc/arm_gicv3_common.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c index 4ca5ae9bc56..90204be25b6 100644 --- a/hw/intc/arm_gicv3_common.c +++ b/hw/intc/arm_gicv3_common.c @@ -328,6 +328,10 @@ static void arm_gicv3_common_realize(DeviceState *dev,= Error **errp) s->num_irq, GIC_INTERNAL); return; } + if (s->num_cpu =3D=3D 0) { + error_setg(errp, "num-cpu must be at least 1"); + return; + } =20 /* ITLinesNumber is represented as (N / 32) - 1, so this is an * implementation imposed restriction, not an architectural one, --=20 2.25.1 From nobody Tue May 7 20:56:34 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650622591; cv=none; d=zohomail.com; s=zohoarc; b=kkvQfMRJHf7uoCiwFj5Krcc6ghtHrG4X+yu6G52Kx1Ru7HMswEt+0M1USD7/wueBDpDUMazBD/OHn0zr2koujxZQsnwp4AXkan8UfsEcD7o/uLZz+aEJzfm+21sfKM16cypeTI94ItzGyv9fGyFCBhigXMiv+0JPRZVyolBFeTA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650622591; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=C8wjiFGqRwiBdgaooMAg0hTWNbKduRpOV7Hjw4Kt2zU=; b=iDPgwzLiMuJ7Ii2Nu+wnBB5zH/5UZUOHfqDmz8uV7P2mogklvJUNOuVzfXWvif7cyx1b55OmqwQtg5a6sqDdMO8aRSOJlQi5L4WnpThQBD+RFfhQr3fnszKMSuUdTDG3gwXq/JFnSdIsLrdkeU/noybn0ZC83jOagm4sfjdayHc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650622591448566.1555204251316; Fri, 22 Apr 2022 03:16:31 -0700 (PDT) Received: from localhost ([::1]:44462 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhqL0-0007N5-Eo for importer2@patchew.org; Fri, 22 Apr 2022 06:16:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58220) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhq9Z-0004Dw-TZ for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:44 -0400 Received: from mail-wr1-x430.google.com ([2a00:1450:4864:20::430]:39604) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhq9Y-0002ZW-9H for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:41 -0400 Received: by mail-wr1-x430.google.com with SMTP id m14so10319455wrb.6 for ; Fri, 22 Apr 2022 03:04:38 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.04.37 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:04:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=C8wjiFGqRwiBdgaooMAg0hTWNbKduRpOV7Hjw4Kt2zU=; b=SEM4rSF875JoPfwvIsDtkoCpZ3KwO+zL+5DboekT+Bf2CWbO2j+44p5Snx7fRq4Av2 alhkiWMgYzPhYYYZUDLBwMIKGbm0r6hCYEOba4dJFL8PdS5cSVCBewud6wY26qMnptc2 rWK85TS9JP8sw1LuMWL8B0qAUzEdMh5ViLvhqPt2yMGBSRXbrEbQh6ZRcPE62XsisfI3 QJAJm2g45GRuzbcayZYC2JcUt+n1xR2mOy7BdxHRacqC+aFW3e5l1v+qq4XONHHB/Bgi ytVzzc7Gb2609DTFTbO5+/mCQn7/wIcsom3pC6JdIkD7ZnJ7zOaR/kWd0wUZ8wZQIfuJ Ht5Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=C8wjiFGqRwiBdgaooMAg0hTWNbKduRpOV7Hjw4Kt2zU=; b=zZh6BBTbr+c/Flxe2dNi3yOZaqONwMFOANYW7kRil5znhn/KjL4U9V5QZqmQi/rYwZ gvwCdMLwi8rgffIkinlDJy7pFplFh5dW1DXwcQJCZtbe67nsz4ttrTsFdgMblNqQ+yKV dVwn7oColQu5EJpb8iQRQBRsEzx7o1AQsUmIdyRhFHVVCdqL4SODsgMwn4WIuFOrH37K l3PdGkAdhq7F9LSR598ZqFlwu19FE8FECT4ACeRNrc2W9jkqq8wj2rzUnwEaUDfNk9g4 LSor028VvmyoE2B0pF+51KCWk4l3m5u/4yRBJkdpDXMwJqwLYDrjLr6AzOe+B1/FkhMe aR6g== X-Gm-Message-State: AOAM531ywoRJ8gV5/RKxA1ddrvHFOPJGyE6SSYpd0AEhtHcDu5VEK5WS FhC0ljHvf/w8wWKkRksOmY28wwZB05kgog== X-Google-Smtp-Source: ABdhPJys05Nx44k2/YA4bFn0lVmiyhiBkiiiUeVjbgCiblEFJcCoMJJeP5wroYvx6LTGnNfpwItZ2A== X-Received: by 2002:a05:6000:1a87:b0:20a:7ea5:2aef with SMTP id f7-20020a0560001a8700b0020a7ea52aefmr3034302wry.666.1650621877913; Fri, 22 Apr 2022 03:04:37 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 03/61] hw/intc/arm_gicv3: Insist that redist region capacity matches CPU count Date: Fri, 22 Apr 2022 11:03:34 +0100 Message-Id: <20220422100432.2288247-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650622592175100001 Content-Type: text/plain; charset="utf-8" Boards using the GICv3 need to configure it with both the total number of CPUs and also the sizes of all the memory regions which contain redistributors (one redistributor per CPU). At the moment the GICv3 checks that the number of CPUs specified is not too many to fit in the defined redistributor regions, but in fact the code assumes that the two match exactly. For instance when we set the GICR_TYPER.Last bit on the final redistributor in each region, we assume that we don't need to consider the possibility of a region being only half full of redistributors or even completely empty. We also assume in gicv3_redist_read() and gicv3_redist_write() that we can calculate the CPU index from the offset within the MemoryRegion and that this will always be in range. Fortunately all the board code sets the redistributor region sizes to exactly match the CPU count, so this isn't a visible bug. We could in theory make the GIC code handle non-full redistributor regions, or have it automatically reduce the provided region sizes to match the CPU count, but the simplest thing is just to strengthen the error check and insist that the CPU count and redistributor region size settings match exactly, since all the board code does that anyway. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-4-peter.maydell@linaro.org --- hw/intc/arm_gicv3_common.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c index 90204be25b6..c797c82786b 100644 --- a/hw/intc/arm_gicv3_common.c +++ b/hw/intc/arm_gicv3_common.c @@ -354,9 +354,9 @@ static void arm_gicv3_common_realize(DeviceState *dev, = Error **errp) for (i =3D 0; i < s->nb_redist_regions; i++) { rdist_capacity +=3D s->redist_region_count[i]; } - if (rdist_capacity < s->num_cpu) { + if (rdist_capacity !=3D s->num_cpu) { error_setg(errp, "Capacity of the redist regions(%d) " - "is less than number of vcpus(%d)", + "does not match the number of vcpus(%d)", rdist_capacity, s->num_cpu); return; } --=20 2.25.1 From nobody Tue May 7 20:56:34 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650622307; cv=none; d=zohomail.com; s=zohoarc; b=HBKf+6asPzjnVUgT/5Q3Apz3zEjiTvTpVsU0EUQftmwIHTfq5vhMVyt2auRRcrMMoaVcD39vXZYoS2gG/huSU5waiVVX16o0Jh7e/buHJJYGH84pzHkxtRsSpYGSRP3Hwcusu86dGMW1UnLFr4BV+Qykf/2qrbfW55bm3AdL8k8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650622307; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=wUfoPWvKhsZt0M/M5TnHwpw7PYiqD+FRJMBmRgeWQGE=; b=NXEfenlMWKe6q/rA30I34ZTW4IWWfS+UZUxaRanWPXavF8mcu/m9jW5b4XKbeyhfyko1KHD3LmhtDNg9ByGDA7dwSTRO/U766eCkRR/QM5WkEFh57k0VQD0GN0CgkYMRu9h2K7SCkreTcGPTVO8NBIUI0zBhQ19MJmVU5RGG9hE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 165062230705317.57960776861387; Fri, 22 Apr 2022 03:11:47 -0700 (PDT) Received: from localhost ([::1]:36436 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhqGP-0001eW-Vo for importer2@patchew.org; Fri, 22 Apr 2022 06:11:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58218) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhq9Z-0004Dv-Sx for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:42 -0400 Received: from mail-wr1-x429.google.com ([2a00:1450:4864:20::429]:44900) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhq9Y-0002Zd-9F for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:41 -0400 Received: by mail-wr1-x429.google.com with SMTP id b19so10279171wrh.11 for ; Fri, 22 Apr 2022 03:04:39 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.04.38 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:04:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=wUfoPWvKhsZt0M/M5TnHwpw7PYiqD+FRJMBmRgeWQGE=; b=XOAbAHsXgnrMJmjyQ8srma9P9TdFT5TpOcCPQi9sgfP+Tl+jfU/YqZ7HwpxeHnjo48 0cgMhEWfRiIpvFQ+ZX5SSRl1HCWLaZcrxZlAme1cTQBtHik9J13cn8mwI1QHufQtOBlw epYvTdJ8vlk1RvMmmCx+mUl+jp+JW07qsD6sXS1xJlbnSl2z1o5lItGOL+hRvBAdthdv H0QUl+yFqEvRaSiUazr9aEicRHqUyKHEKTH/KcDbIvPKqNdHfuo3qM1YmJnuh9fHTVFY g84NrczeFMfR4Gkf5hJA5IGWABu3+rEuE2ofT9f7DYkEc7oTKCd4g98+tTwBqarcfOZ1 kdDQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=wUfoPWvKhsZt0M/M5TnHwpw7PYiqD+FRJMBmRgeWQGE=; b=kPVMAWPii/Wn06vqFAT0yNKzzmWJ2xhPLbIlYbPwDWSALjKkRbAjDgbXLjL/ofYjhi T6ghVGPV0JQBR1xr9NiKRkWIYJRYIA9phuwoYo/akLWX8zPMSzzhTW313IxGc5oaWK/H m3zph6INgTDtcIr1PQtzbhYtQSOCHRjverxJmM/XpsPtYmKIT2b0z37VqQoMibz4U2Nv T6I5yL75zD06z8edlYw9XAUFJqwHf2jRwFzdEB0vE/TOg2kP5S56OPXQuE6zDozKtDnm 3dm/2L4pVUSwLIYQesj4xNAsprZHZLTvAEgfAKm5d/trvlBGHrjvYTFLde5lz4ZZ0sXf H5Yg== X-Gm-Message-State: AOAM533VbY4mUmYfBLw2Ztedlz9nRwAOogr+b3pBbA+g4sfE6fEcB8TL LwXRj3OWqh1wHtvMKdbOh2X3H7IC1T850w== X-Google-Smtp-Source: ABdhPJxkr8hFTVTvc4fIScyWGfMLxoUeDXdWsfYtW+VwwChvo8XhuWVs+8z2XK1odQRvIBUD1oTDlQ== X-Received: by 2002:adf:d1ce:0:b0:20a:992a:3b54 with SMTP id b14-20020adfd1ce000000b0020a992a3b54mr3004181wrd.270.1650621878736; Fri, 22 Apr 2022 03:04:38 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 04/61] hw/intc/arm_gicv3: Report correct PIDR0 values for ID registers Date: Fri, 22 Apr 2022 11:03:35 +0100 Message-Id: <20220422100432.2288247-5-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650622308635100001 Content-Type: text/plain; charset="utf-8" We use the common function gicv3_idreg() to supply the CoreSight ID register values for the GICv3 for the copies of these ID registers in the distributor, redistributor and ITS register frames. This isn't quite correct, because while most of the register values are the same, the PIDR0 value should vary to indicate which of these three frames it is. (You can see this and also the correct values of these PIDR0 registers by looking at the GIC-600 or GIC-700 TRMs, for example.) Make gicv3_idreg() take an extra argument for the PIDR0 value. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-5-peter.maydell@linaro.org --- hw/intc/gicv3_internal.h | 15 +++++++++++++-- hw/intc/arm_gicv3_dist.c | 2 +- hw/intc/arm_gicv3_its.c | 2 +- hw/intc/arm_gicv3_redist.c | 2 +- 4 files changed, 16 insertions(+), 5 deletions(-) diff --git a/hw/intc/gicv3_internal.h b/hw/intc/gicv3_internal.h index 2bf1baef047..dec413f7cfa 100644 --- a/hw/intc/gicv3_internal.h +++ b/hw/intc/gicv3_internal.h @@ -555,7 +555,12 @@ static inline uint32_t gicv3_iidr(void) return 0x43b; } =20 -static inline uint32_t gicv3_idreg(int regoffset) +/* CoreSight PIDR0 values for ARM GICv3 implementations */ +#define GICV3_PIDR0_DIST 0x92 +#define GICV3_PIDR0_REDIST 0x93 +#define GICV3_PIDR0_ITS 0x94 + +static inline uint32_t gicv3_idreg(int regoffset, uint8_t pidr0) { /* Return the value of the CoreSight ID register at the specified * offset from the first ID register (as found in the distributor @@ -565,7 +570,13 @@ static inline uint32_t gicv3_idreg(int regoffset) static const uint8_t gicd_ids[] =3D { 0x44, 0x00, 0x00, 0x00, 0x92, 0xB4, 0x3B, 0x00, 0x0D, 0xF0, 0x05, = 0xB1 }; - return gicd_ids[regoffset / 4]; + + regoffset /=3D 4; + + if (regoffset =3D=3D 4) { + return pidr0; + } + return gicd_ids[regoffset]; } =20 /** diff --git a/hw/intc/arm_gicv3_dist.c b/hw/intc/arm_gicv3_dist.c index 28d913b2114..7f6275363ea 100644 --- a/hw/intc/arm_gicv3_dist.c +++ b/hw/intc/arm_gicv3_dist.c @@ -557,7 +557,7 @@ static bool gicd_readl(GICv3State *s, hwaddr offset, } case GICD_IDREGS ... GICD_IDREGS + 0x2f: /* ID registers */ - *data =3D gicv3_idreg(offset - GICD_IDREGS); + *data =3D gicv3_idreg(offset - GICD_IDREGS, GICV3_PIDR0_DIST); return true; case GICD_SGIR: /* WO registers, return unknown value */ diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index 44914f25780..f8467b61ec5 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -1161,7 +1161,7 @@ static bool its_readl(GICv3ITSState *s, hwaddr offset, break; case GITS_IDREGS ... GITS_IDREGS + 0x2f: /* ID registers */ - *data =3D gicv3_idreg(offset - GITS_IDREGS); + *data =3D gicv3_idreg(offset - GITS_IDREGS, GICV3_PIDR0_ITS); break; case GITS_TYPER: *data =3D extract64(s->typer, 0, 32); diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c index 412a04f59cf..dc9729e8395 100644 --- a/hw/intc/arm_gicv3_redist.c +++ b/hw/intc/arm_gicv3_redist.c @@ -234,7 +234,7 @@ static MemTxResult gicr_readl(GICv3CPUState *cs, hwaddr= offset, *data =3D cs->gicr_nsacr; return MEMTX_OK; case GICR_IDREGS ... GICR_IDREGS + 0x2f: - *data =3D gicv3_idreg(offset - GICR_IDREGS); + *data =3D gicv3_idreg(offset - GICR_IDREGS, GICV3_PIDR0_REDIST); return MEMTX_OK; default: return MEMTX_ERROR; --=20 2.25.1 From nobody Tue May 7 20:56:34 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650622781; cv=none; d=zohomail.com; s=zohoarc; b=a2fiRfyp+t9NKdyqyXPmxIyiPTXHYSOWXUfMGZ1JCGW1SzieNbZa13KiMlqjM6XnFq8w8b/qW4diTob2KZcU5iAQUaric4AbxwyFB1YDR3D2BIjTzDL5tTriHdBk6ciMGYNz72sQm6+K4DyhLZVmDW2HcsqxMzPJnMY+5nPu2nM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650622781; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=LtCQjZwy+MRjUms9uMTdrmBqMtKUGnilvU+NhBGq9yg=; b=kTv7vDa/xQA/MXLt/c9vFOiyretzJUsPWdJEOZKdgnbwtqKRsSNKTM1V04b1ic9h7aG47Xnb0k+lvYqrIed+62o0nPc9yKhykqU2Bh4uCJte+aNRk6dyI8q1QnZ6LhObXHe5ojfCis54n4kgYAaVlSAHQhl/vSI8vLjRxTrXc44= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650622781335846.0109020057994; Fri, 22 Apr 2022 03:19:41 -0700 (PDT) Received: from localhost ([::1]:49958 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhqO2-0002ui-Ho for importer2@patchew.org; Fri, 22 Apr 2022 06:19:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58254) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhq9b-0004E3-A8 for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:47 -0400 Received: from mail-wr1-x42e.google.com ([2a00:1450:4864:20::42e]:36573) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhq9Y-0002Zi-Vq for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:43 -0400 Received: by mail-wr1-x42e.google.com with SMTP id u3so10334631wrg.3 for ; Fri, 22 Apr 2022 03:04:40 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.04.38 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:04:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=LtCQjZwy+MRjUms9uMTdrmBqMtKUGnilvU+NhBGq9yg=; b=smQ2s+/ho0xJoSSucvSUaEqSmHtBWj99DVg1pOvSzMcMZoOCTChZfO/uwQ9QaS/SML pTg5SMrKdreV+hGdZJsvL0p8/HShd4tvqYSNj+Kq//BZcBqV8EViZb3MQrlUEAIRM/O/ qdG0BAlaxD3P0XCI7MPwF6xIJH/b52nALXSgibMplC/K4Y03tyuRU6FqHLtSHgru8vuJ WwvF8t8IOW819OYU20/c277Lxv1w1cXUIxAjLi1P4cuTjOfCgm1R804Z+NdSZ1Ap9T3s iWkWsiypJHLrX+z8O2p6fTc1NPToeT2JSxBXE1p77VpcLDwGJ1H06j/Dv7kGV4XOSGW2 m3JA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LtCQjZwy+MRjUms9uMTdrmBqMtKUGnilvU+NhBGq9yg=; b=vBw/A2nS5RBUnEtDU0yGiWXxth7bZgZIQKcSFQYMJmGIoaHhPR/UU2Ey3KP1ekCgIE kPerXeUtT9jSGOjFTBiLJfQu6nEF0QxjiBR5QxR23uTL/U+g9WnIr1jBd5uAwXwvsj1/ rXCKeOI419Rk1DEkI5FYkd/HjvXfodueNvRPIXeGBU4qNT5yxZO7bSPvM+hTjSZOzbrS NuxBqcA271xrwfay5X47k9R+TH2CIU335uo/t1fK9EQGQAQuRsur2bK1WopokXJIRAPs l4Od56xiJxJpJeLJ7oeqzR5/y1rPW41gp6g8JVEkkgr/rp+wZ+8nDe6U0y6qd6G1SVCc QOag== X-Gm-Message-State: AOAM533bwBE3rhH5v8M9+E1eT3tfgbgR3/GUyB1OYJCeJXDskH+ZsSlY K9qUeW+fZ0LchbXzdu7ag3yES+yLc3F5iQ== X-Google-Smtp-Source: ABdhPJw0rRqidZPK6xXMdzF4Bl8mNbxRZxW5UFEPU1/ifI+4QQdsyGR46C3Y3CB5ZwAjnPKrt+zCDw== X-Received: by 2002:a05:6000:1a8a:b0:20a:af19:ad12 with SMTP id f10-20020a0560001a8a00b0020aaf19ad12mr3082692wry.4.1650621879520; Fri, 22 Apr 2022 03:04:39 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 05/61] target/arm/cpu.c: ignore VIRQ and VFIQ if no EL2 Date: Fri, 22 Apr 2022 11:03:36 +0100 Message-Id: <20220422100432.2288247-6-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650622783586100001 Content-Type: text/plain; charset="utf-8" In a GICv3, it is impossible for the GIC to deliver a VIRQ or VFIQ to the CPU unless the CPU has EL2, because VIRQ and VFIQ are only configurable via EL2-only system registers. Moreover, in our implementation we were only calculating and updating the state of the VIRQ and VFIQ lines in gicv3_cpuif_virt_irq_fiq_update() when those EL2 system registers changed. We were therefore able to assert in arm_cpu_set_irq() that we didn't see a VIRQ or VFIQ line update if EL2 wasn't present. This assumption no longer holds with GICv4: * even if the CPU does not have EL2 the guest is able to cause the GIC to deliver a virtual LPI by programming the ITS (which is a silly thing for it to do, but possible) * because we now need to recalculate the state of the VIRQ and VFIQ lines in more cases than just "some EL2 GIC sysreg was written", we will see calls to arm_cpu_set_irq() for "VIRQ is 0, VFIQ is 0" even if the guest is not using the virtual LPI parts of the ITS Remove the assertions, and instead simply ignore the state of the VIRQ and VFIQ lines if the CPU does not have EL2. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-6-peter.maydell@linaro.org --- target/arm/cpu.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 3609de08882..fa13fce355a 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -694,6 +694,16 @@ static void arm_cpu_set_irq(void *opaque, int irq, int= level) [ARM_CPU_VFIQ] =3D CPU_INTERRUPT_VFIQ }; =20 + if (!arm_feature(env, ARM_FEATURE_EL2) && + (irq =3D=3D ARM_CPU_VIRQ || irq =3D=3D ARM_CPU_VFIQ)) { + /* + * The GIC might tell us about VIRQ and VFIQ state, but if we don't + * have EL2 support we don't care. (Unless the guest is doing some= thing + * silly this will only be calls saying "level is still 0".) + */ + return; + } + if (level) { env->irq_line_state |=3D mask[irq]; } else { @@ -702,11 +712,9 @@ static void arm_cpu_set_irq(void *opaque, int irq, int= level) =20 switch (irq) { case ARM_CPU_VIRQ: - assert(arm_feature(env, ARM_FEATURE_EL2)); arm_cpu_update_virq(cpu); break; case ARM_CPU_VFIQ: - assert(arm_feature(env, ARM_FEATURE_EL2)); arm_cpu_update_vfiq(cpu); break; case ARM_CPU_IRQ: --=20 2.25.1 From nobody Tue May 7 20:56:34 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650623538; cv=none; d=zohomail.com; s=zohoarc; b=BornYTRzzeJf+Ci+BMO0GR1irBFhWBsXUsx+MUvZs08zkOKU4DA9Em9WyJG1vR8k3bA8J47Lb/re+hK4SYH8gN87wnrO5HSGitdWfJ4BHsAZjt+O9RTpDqvp7uRd8pwSD1+WBiKzrVTvEsU5mdHvrNCZHFmXf1q3w9qvhScCmkk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650623538; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=KP3EMe4IHC9X6u7x67z2Ghb+uxnwdwXPMr6nFHH0Zg4=; b=c/k6+Qax0LV0qREpfLcVH5vKsb+l9MpqTmZjgWknW05Jvz0q+lmmlSYO33BBoUQTsZJWHVllHiFiYinbYQLkwzYczqhl/lT5ErSLKiAmoJvpqT2nebxxxG9qGyNZXrl6OYnzTLo+vFuqRPKnJR3IYZToKKgOVJzkCi42dd7ISP8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650623538351182.27021661006916; Fri, 22 Apr 2022 03:32:18 -0700 (PDT) Received: from localhost ([::1]:39006 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhqaG-0006eT-L7 for importer2@patchew.org; Fri, 22 Apr 2022 06:32:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58256) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhq9b-0004E4-Ar for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:47 -0400 Received: from mail-wr1-x430.google.com ([2a00:1450:4864:20::430]:40513) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhq9Z-0002Zs-Gt for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:43 -0400 Received: by mail-wr1-x430.google.com with SMTP id e2so4041351wrh.7 for ; Fri, 22 Apr 2022 03:04:41 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.04.39 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:04:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=KP3EMe4IHC9X6u7x67z2Ghb+uxnwdwXPMr6nFHH0Zg4=; b=lpsm4YiMnsxOUzslWJMTZLakAC9jrY8ESrIASr6CXFDm1ADr32DzSbV7XGLARF8Wwf 18Vk7hEG9G2W4zXBJeLqE5glyTAyRoFDLNPo+pYJYwDLc1OpTpgI+ewMAU5h+ox2Nhgg i+52DZiAWfoENz1BOXZFYiqN/v4jqXz+ugGXY7umKnAQuVz/wzTQZFiZEuh5+9RPZYOg pQ9NCwB1cGV0UkkO7r5ipN+FebwKa33LoYqa/ttb7bV7ICjJHSn5FvPdKBLZ5rTU/+mX eGnVsGrtwcXJvnj0d33GFl/8q69Ybb80WHziPZxJA3L3rWrzzFg4kwkWGWwlEPTmatlZ YIbw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=KP3EMe4IHC9X6u7x67z2Ghb+uxnwdwXPMr6nFHH0Zg4=; b=4hefZUVq4E/MylQkE0ACr2w89x3YQMgQMwF4kKljl0LAU7wk11IQCYxMQwkIvSCdo9 UpppNFZPC0EMaKyRHhW+dnALu2cRl1/ZE+HU83ZxRZHQ5Ko1jD4lVQp9U8altGIvIoeo LNiFYvOjvRMij3hpRPQ5nnyeXtZ0M65AKGDnlM77xijCNBEcx7urZrrlF1GCuehX2AMX KTal5+p0GtrlFndo1jRkOh251upf5BlUAnmz0gNEGPGFnHUWAq/EV9enpcLz2+oCsGEP Rrp+MF/kEWLuz3Jkgjw+so959jyvfLUCoP9rHRVFqYtq7ZpZHXF0cOSQiM+xM4aqco5A RXBw== X-Gm-Message-State: AOAM532NRLPeU66MlSki8vC2RIM/qbkELGnHU9mznvugmRFBzgYIYSxg ovQI+7nh0F188YAVuQUGdmWzSbBLnC+ajw== X-Google-Smtp-Source: ABdhPJxyN5cNOXtXL3gyq1O8ZMGS55mn4TVpSPanS7agVje4YCXABBHV5cRN1uSbNtm/PoeOKJ8qxQ== X-Received: by 2002:a05:6000:1c8:b0:207:af9e:a4ec with SMTP id t8-20020a05600001c800b00207af9ea4ecmr3031721wrx.9.1650621880259; Fri, 22 Apr 2022 03:04:40 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 06/61] hw/intc/arm_gicv3_its: Factor out "is intid a valid LPI ID?" Date: Fri, 22 Apr 2022 11:03:37 +0100 Message-Id: <20220422100432.2288247-7-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650623539914100001 Content-Type: text/plain; charset="utf-8" In process_mapti() we check interrupt IDs to see whether they are in the valid LPI range. Factor this out into its own utility function, as we're going to want it elsewhere too for GICv4. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-7-peter.maydell@linaro.org --- hw/intc/arm_gicv3_its.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index f8467b61ec5..a2462098445 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -79,6 +79,12 @@ typedef enum ItsCmdResult { CMD_CONTINUE =3D 1, } ItsCmdResult; =20 +static inline bool intid_in_lpi_range(uint32_t id) +{ + return id >=3D GICV3_LPI_INTID_START && + id < (1 << (GICD_TYPER_IDBITS + 1)); +} + static uint64_t baser_base_addr(uint64_t value, uint32_t page_sz) { uint64_t result =3D 0; @@ -410,7 +416,6 @@ static ItsCmdResult process_mapti(GICv3ITSState *s, con= st uint64_t *cmdpkt, uint32_t devid, eventid; uint32_t pIntid =3D 0; uint64_t num_eventids; - uint32_t num_intids; uint16_t icid =3D 0; DTEntry dte; ITEntry ite; @@ -438,7 +443,6 @@ static ItsCmdResult process_mapti(GICv3ITSState *s, con= st uint64_t *cmdpkt, return CMD_STALL; } num_eventids =3D 1ULL << (dte.size + 1); - num_intids =3D 1ULL << (GICD_TYPER_IDBITS + 1); =20 if (icid >=3D s->ct.num_entries) { qemu_log_mask(LOG_GUEST_ERROR, @@ -460,7 +464,7 @@ static ItsCmdResult process_mapti(GICv3ITSState *s, con= st uint64_t *cmdpkt, return CMD_CONTINUE; } =20 - if (pIntid < GICV3_LPI_INTID_START || pIntid >=3D num_intids) { + if (!intid_in_lpi_range(pIntid)) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid interrupt ID 0x%x\n", __func__, pIntid); return CMD_CONTINUE; --=20 2.25.1 From nobody Tue May 7 20:56:34 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650622489; cv=none; d=zohomail.com; s=zohoarc; b=iTAnqHcx5/O3PTt812I40PWp7rhzXKqGtPCjXAnLQMMh5nsWZId+ZE6EAMSrWYow/q67nOs5Km+cubM/nvpQBPvj7PoVCZ8IsxscLpAsgS3KIeCs5KEst6YI/qGfmRF0WRlHIpschOjh3SUDtFjE1OhfvwDRZO8kDpPVJ9aCzL4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650622489; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=I+8r6HdyLDfSMNsAkocsqcRvO9Us4MwlveyivyaGjRg=; b=FgDrzb4AWLgwOsOgODkMs3VPDb2jz6IeEaieXalhGFIN9jJFdZpCHtffp2xVGfeqReSxkO133dmQa531sAcX6RLz58QEz6KyJK3I6kWH0YFdcBJdjDhneqWklubpWOQt71DW7Xe3jC1yc2DoqrL9NE2mYgltbQLcGMkKrMZuFu4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 165062248997689.42635438375828; Fri, 22 Apr 2022 03:14:49 -0700 (PDT) Received: from localhost ([::1]:41308 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhqJM-0004zR-Mm for importer2@patchew.org; Fri, 22 Apr 2022 06:14:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58278) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhq9c-0004EA-JP for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:47 -0400 Received: from mail-wm1-x334.google.com ([2a00:1450:4864:20::334]:55290) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhq9a-0002aA-Lr for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:44 -0400 Received: by mail-wm1-x334.google.com with SMTP id bg25so4090795wmb.4 for ; Fri, 22 Apr 2022 03:04:42 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.04.40 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:04:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=I+8r6HdyLDfSMNsAkocsqcRvO9Us4MwlveyivyaGjRg=; b=CA7xS+kSriE4laVRHcBgz5HnjlEsFovIwHepM6V6sMnggiKTjwS4ubnLMhwM4MiIng 2jnT7MlHPo+HaTUszasL/UlWuq/atYmFFbtF0I2z3tvDkaoH78JKeLi0JCZ32btqEE0W Mw0IkOo8fLswR3L3/hZAU/8Bp4FSJ+5/sUkQ2Ib5aNgi3I/hwzmQjzUDgI3gkck+AimZ /+VdAQ2rKQZ3mDRZx/LU8CYPctEcX5Dpm4yF0h8Wo6nV415KpGm4gbdWpCv9t+C8s5iZ 91VjF1GUBLUScyoI1Tq7wYswMIM8anIRw3dygL5kvWLXABm6Ohr1GWX6QDVPA/EpTqiq nGSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=I+8r6HdyLDfSMNsAkocsqcRvO9Us4MwlveyivyaGjRg=; b=VXvnQTwUaeBN3jN9uRdTx7kI+wVt2e/lUAY7xPoD7ecgY2n1N2eZ4Nf6cLktUHor2I pUwp2iVXavSF3chOpOT5xuwiix274zRJ3HjPY+J2xs9j37Yz7yPnTA/XYOlOBEbXHX61 wQvV/qDpwCN7LST9G7vIT2D1WMb8pU/q0yd5qhMCdPMBvt1haipB9NG4qJaJa/Lawzzn fPaZAC51HOgGkJ5l1+sWBB5OJmIBWUWFwOeaofmAOCPl0FpdTNB+n/FUWQtm39ttLLAx XPH3rV8Ke+j/APmhg74JgpKH+0xkNsG+t00f+jLIuWWsY0R0fFiNVhNCTMdBnK1AKfEW iBMA== X-Gm-Message-State: AOAM530YHnKbT6rCA6/HgPpEGOfdc1XMAjoFkylPaczmTwSYN6ZUAM1f piSHkEoT9waaleCDHpa6qII+dz6sZ4vq+Q== X-Google-Smtp-Source: ABdhPJz1ZQx0QhkqmhLyd+VbM19ATHAgkAwnEvlCWeGrN1vJQVH8hAlQ6ufZ3IgLvMTtVN8Oq8b04Q== X-Received: by 2002:a05:600c:25c5:b0:38f:f0b9:4c8c with SMTP id 5-20020a05600c25c500b0038ff0b94c8cmr3536873wml.20.1650621881097; Fri, 22 Apr 2022 03:04:41 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 07/61] hw/intc/arm_gicv3_its: Implement GITS_BASER2 for GICv4 Date: Fri, 22 Apr 2022 11:03:38 +0100 Message-Id: <20220422100432.2288247-8-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650622491973100001 Content-Type: text/plain; charset="utf-8" The GICv4 defines a new in-guest-memory table for the ITS: this is the vPE table. Implement the new GITS_BASER2 register which the guest uses to tell the ITS where the vPE table is located, including the decode of the register fields into the TableDesc structure which we do for the GITS_BASER when the guest enables the ITS. We guard provision of the new register with the its_feature_virtual() function, which does a check of the GITS_TYPER.Virtual bit which indicates presence of ITS support for virtual LPIs. Since this bit is currently always zero, GICv4-specific features will not be accessible to the guest yet. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-8-peter.maydell@linaro.org --- hw/intc/gicv3_internal.h | 16 ++++++++++++++++ include/hw/intc/arm_gicv3_its_common.h | 1 + hw/intc/arm_gicv3_its.c | 25 +++++++++++++++++++++++++ 3 files changed, 42 insertions(+) diff --git a/hw/intc/gicv3_internal.h b/hw/intc/gicv3_internal.h index dec413f7cfa..4613b9e59ba 100644 --- a/hw/intc/gicv3_internal.h +++ b/hw/intc/gicv3_internal.h @@ -280,6 +280,7 @@ FIELD(GITS_CTLR, ENABLED, 0, 1) FIELD(GITS_CTLR, QUIESCENT, 31, 1) =20 FIELD(GITS_TYPER, PHYSICAL, 0, 1) +FIELD(GITS_TYPER, VIRTUAL, 1, 1) FIELD(GITS_TYPER, ITT_ENTRY_SIZE, 4, 4) FIELD(GITS_TYPER, IDBITS, 8, 5) FIELD(GITS_TYPER, DEVBITS, 13, 5) @@ -298,6 +299,7 @@ FIELD(GITS_TYPER, CIL, 36, 1) #define GITS_BASER_PAGESIZE_64K 2 =20 #define GITS_BASER_TYPE_DEVICE 1ULL +#define GITS_BASER_TYPE_VPE 2ULL #define GITS_BASER_TYPE_COLLECTION 4ULL =20 #define GITS_PAGE_SIZE_4K 0x1000 @@ -419,6 +421,20 @@ FIELD(DTE, ITTADDR, 6, 44) FIELD(CTE, VALID, 0, 1) FIELD(CTE, RDBASE, 1, RDBASE_PROCNUM_LENGTH) =20 +/* + * 8 bytes VPE table entry size: + * Valid =3D 1 bit, VPTsize =3D 5 bits, VPTaddr =3D 36 bits, RDbase =3D 16= bits + * + * Field sizes for Valid and size are mandated; field sizes for RDbase + * and VPT_addr are IMPDEF. + */ +#define GITS_VPE_SIZE 0x8ULL + +FIELD(VTE, VALID, 0, 1) +FIELD(VTE, VPTSIZE, 1, 5) +FIELD(VTE, VPTADDR, 6, 36) +FIELD(VTE, RDBASE, 42, RDBASE_PROCNUM_LENGTH) + /* Special interrupt IDs */ #define INTID_SECURE 1020 #define INTID_NONSECURE 1021 diff --git a/include/hw/intc/arm_gicv3_its_common.h b/include/hw/intc/arm_g= icv3_its_common.h index 0f130494dd3..7d1cc0f7177 100644 --- a/include/hw/intc/arm_gicv3_its_common.h +++ b/include/hw/intc/arm_gicv3_its_common.h @@ -78,6 +78,7 @@ struct GICv3ITSState { =20 TableDesc dt; TableDesc ct; + TableDesc vpet; CmdQDesc cq; =20 Error *migration_blocker; diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index a2462098445..f9704c07591 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -79,6 +79,12 @@ typedef enum ItsCmdResult { CMD_CONTINUE =3D 1, } ItsCmdResult; =20 +/* True if the ITS supports the GICv4 virtual LPI feature */ +static bool its_feature_virtual(GICv3ITSState *s) +{ + return s->typer & R_GITS_TYPER_VIRTUAL_MASK; +} + static inline bool intid_in_lpi_range(uint32_t id) { return id >=3D GICV3_LPI_INTID_START && @@ -946,6 +952,15 @@ static void extract_table_params(GICv3ITSState *s) idbits =3D 16; } break; + case GITS_BASER_TYPE_VPE: + td =3D &s->vpet; + /* + * For QEMU vPEIDs are always 16 bits. (GICv4.1 allows an + * implementation to implement fewer bits and report this + * via GICD_TYPER2.) + */ + idbits =3D 16; + break; default: /* * GITS_BASER.TYPE is read-only, so GITS_BASER_RO_MASK @@ -1425,6 +1440,7 @@ static void gicv3_its_reset(DeviceState *dev) /* * setting GITS_BASER0.Type =3D 0b001 (Device) * GITS_BASER1.Type =3D 0b100 (Collection Table) + * GITS_BASER2.Type =3D 0b010 (vPE) for GICv4 and later * GITS_BASER.Type,where n =3D 3 to 7 are 0b00 (Unimplement= ed) * GITS_BASER<0,1>.Page_Size =3D 64KB * and default translation table entry size to 16 bytes @@ -1442,6 +1458,15 @@ static void gicv3_its_reset(DeviceState *dev) GITS_BASER_PAGESIZE_64K); s->baser[1] =3D FIELD_DP64(s->baser[1], GITS_BASER, ENTRYSIZE, GITS_CTE_SIZE - 1); + + if (its_feature_virtual(s)) { + s->baser[2] =3D FIELD_DP64(s->baser[2], GITS_BASER, TYPE, + GITS_BASER_TYPE_VPE); + s->baser[2] =3D FIELD_DP64(s->baser[2], GITS_BASER, PAGESIZE, + GITS_BASER_PAGESIZE_64K); + s->baser[2] =3D FIELD_DP64(s->baser[2], GITS_BASER, ENTRYSIZE, + GITS_VPE_SIZE - 1); + } } =20 static void gicv3_its_post_load(GICv3ITSState *s) --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650622993; cv=none; d=zohomail.com; s=zohoarc; b=mPeL5ye3PaSMJW2/jjnvtK4vjCdGyQCE+6Z9ofj168g8ciEm9aQQVwq77IvDFNPR9debGY8ajCE99Bh+dIpknLUL03qQ/hyrCfAss9idEvWZmBqXGTBwNZTPYOIWgNN0q4N1qqp2Hn1V4boXuHe6DzxPrL6nDx3X4b9v3TcM44s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650622993; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Iyy9EqxwlVZCqOVtM7LRAHzdMyn2Ivljkfto580g+2g=; b=bQgUXMeZEtoQ9dhEMIIgibs4yvHG0rUPf49ACxlMbjfeEViTS8z4Fk+Ybnilues2N4RhfMvbhBGuBa/qLqPRQGXiguV/VCY1NuTQqlYdCelgv0CU3bKVk1qpkbCW2howh9DWEpcCwA0+3UWCIur2ghhq5HbGNUsH3LUDI6zW8qk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650622993101909.9403675906744; Fri, 22 Apr 2022 03:23:13 -0700 (PDT) Received: from localhost ([::1]:58570 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhqRT-0000Mf-Mz for importer2@patchew.org; Fri, 22 Apr 2022 06:23:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58290) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhq9d-0004EB-Bm for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:48 -0400 Received: from mail-wr1-x433.google.com ([2a00:1450:4864:20::433]:39608) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhq9b-0002aH-GR for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:45 -0400 Received: by mail-wr1-x433.google.com with SMTP id m14so10319703wrb.6 for ; Fri, 22 Apr 2022 03:04:43 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.04.41 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:04:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=Iyy9EqxwlVZCqOVtM7LRAHzdMyn2Ivljkfto580g+2g=; b=V5ApZ4u71jJ8zljRy5kZSeA2kRKvjcwHbeefpY38/rUG747cmZoDUo15/KFPpCGxpY YSfbPhLfYdykesy/yxULWZfsESkY3/pA61vHA7hmZDTHMHcmwS6AwVpgKvG4LNnktAeL mfmdbNerrp9tW6FVSIdsTnowntfQ15Ga3qCNwlfHkGrp5WiiOTEm9D/QjHebtYkbQ+tB VoV7OdLdEGDeie4ERgeR38QeFUcoLlfGn1ACzaB4/3y21b4DQpegPKLbWagfZQoDU8Np bCSFNfusUjwWMvxq6IINzntIRmXX53As9rodoeBUWa9GVVmusoRmP+kSt3zO8jk75gW4 jHuA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Iyy9EqxwlVZCqOVtM7LRAHzdMyn2Ivljkfto580g+2g=; b=3zRTfZXYXzzOf7AOEd+q0gHIkPh81QHRPU5yEUXVkuCB6kx1l6HwR1KMwhI5YRPijI HaQC+fHySIiUlLJBsZfzI35ESmd8Tr0jagg+u0MJ3JPGEqMNUkv0fI9GPWqgd0mnCyAD sQ40QhGV/2jYFQdx95ybbd6K2PaTbQ7P/DKO58fhn/COur/wtOAU7EHsSNHbDGLTEkFu a3PJi7gOJpRF/baN2duo4VkHiwcUs9DpoGLfDJaujT8zpoY8YCYJUMMDtO1NHj1IHhqb 1NibdkE/Y5ZhOMVI+xn3kRtnXFXii4sejNEst58qL6HSVUgqu4+alfZ/BMMahEPg7uV2 CRGw== X-Gm-Message-State: AOAM531c4U9nLQFM1RLTCpy5MCFs8e7vG1ljI/53Pwdbp8EX598X3RJG I7lnjQ+eQoPL5OGwrDtDl1o5Fysjw68o6g== X-Google-Smtp-Source: ABdhPJxQ4d7vcuXl/+KeRxl73TcD36dcBXI4gKjDQULxTuPYqLr0ebWdj/mFI9938sA7AcsmlabcMg== X-Received: by 2002:a5d:4ed2:0:b0:207:b7f7:d02f with SMTP id s18-20020a5d4ed2000000b00207b7f7d02fmr3154723wrv.593.1650621882029; Fri, 22 Apr 2022 03:04:42 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 08/61] hw/intc/arm_gicv3_its: Implement VMAPI and VMAPTI Date: Fri, 22 Apr 2022 11:03:39 +0100 Message-Id: <20220422100432.2288247-9-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650622994425100001 Content-Type: text/plain; charset="utf-8" Implement the GICv4 VMAPI and VMAPTI commands. These write an interrupt translation table entry that maps (DeviceID,EventID) to (vPEID,vINTID,doorbell). The only difference between VMAPI and VMAPTI is that VMAPI assumes vINTID =3D=3D EventID rather than both being specified in the command packet. (This code won't be reachable until we allow the GIC version to be set to 4. Support for reading this new virtual-interrupt DTE and handling it correctly will be implemented in a later commit.) Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-9-peter.maydell@linaro.org --- hw/intc/gicv3_internal.h | 9 ++++ hw/intc/arm_gicv3_its.c | 91 ++++++++++++++++++++++++++++++++++++++++ hw/intc/trace-events | 2 + 3 files changed, 102 insertions(+) diff --git a/hw/intc/gicv3_internal.h b/hw/intc/gicv3_internal.h index 4613b9e59ba..d3670a8894e 100644 --- a/hw/intc/gicv3_internal.h +++ b/hw/intc/gicv3_internal.h @@ -329,6 +329,8 @@ FIELD(GITS_TYPER, CIL, 36, 1) #define GITS_CMD_INVALL 0x0D #define GITS_CMD_MOVALL 0x0E #define GITS_CMD_DISCARD 0x0F +#define GITS_CMD_VMAPTI 0x2A +#define GITS_CMD_VMAPI 0x2B =20 /* MAPC command fields */ #define ICID_LENGTH 16 @@ -368,6 +370,13 @@ FIELD(MOVI_0, DEVICEID, 32, 32) FIELD(MOVI_1, EVENTID, 0, 32) FIELD(MOVI_2, ICID, 0, 16) =20 +/* VMAPI, VMAPTI command fields */ +FIELD(VMAPTI_0, DEVICEID, 32, 32) +FIELD(VMAPTI_1, EVENTID, 0, 32) +FIELD(VMAPTI_1, VPEID, 32, 16) +FIELD(VMAPTI_2, VINTID, 0, 32) /* VMAPTI only */ +FIELD(VMAPTI_2, DOORBELL, 32, 32) + /* * 12 bytes Interrupt translation Table Entry size * as per Table 5.3 in GICv3 spec diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index f9704c07591..8aed57e7040 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -91,6 +91,12 @@ static inline bool intid_in_lpi_range(uint32_t id) id < (1 << (GICD_TYPER_IDBITS + 1)); } =20 +static inline bool valid_doorbell(uint32_t id) +{ + /* Doorbell fields may be an LPI, or 1023 to mean "no doorbell" */ + return id =3D=3D INTID_SPURIOUS || intid_in_lpi_range(id); +} + static uint64_t baser_base_addr(uint64_t value, uint32_t page_sz) { uint64_t result =3D 0; @@ -486,6 +492,85 @@ static ItsCmdResult process_mapti(GICv3ITSState *s, co= nst uint64_t *cmdpkt, return update_ite(s, eventid, &dte, &ite) ? CMD_CONTINUE : CMD_STALL; } =20 +static ItsCmdResult process_vmapti(GICv3ITSState *s, const uint64_t *cmdpk= t, + bool ignore_vintid) +{ + uint32_t devid, eventid, vintid, doorbell, vpeid; + uint32_t num_eventids; + DTEntry dte; + ITEntry ite; + + if (!its_feature_virtual(s)) { + return CMD_CONTINUE; + } + + devid =3D FIELD_EX64(cmdpkt[0], VMAPTI_0, DEVICEID); + eventid =3D FIELD_EX64(cmdpkt[1], VMAPTI_1, EVENTID); + vpeid =3D FIELD_EX64(cmdpkt[1], VMAPTI_1, VPEID); + doorbell =3D FIELD_EX64(cmdpkt[2], VMAPTI_2, DOORBELL); + if (ignore_vintid) { + vintid =3D eventid; + trace_gicv3_its_cmd_vmapi(devid, eventid, vpeid, doorbell); + } else { + vintid =3D FIELD_EX64(cmdpkt[2], VMAPTI_2, VINTID); + trace_gicv3_its_cmd_vmapti(devid, eventid, vpeid, vintid, doorbell= ); + } + + if (devid >=3D s->dt.num_entries) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: invalid DeviceID 0x%x (must be less than 0x%x)\= n", + __func__, devid, s->dt.num_entries); + return CMD_CONTINUE; + } + + if (get_dte(s, devid, &dte) !=3D MEMTX_OK) { + return CMD_STALL; + } + + if (!dte.valid) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: no entry in device table for DeviceID 0x%x\n", + __func__, devid); + return CMD_CONTINUE; + } + + num_eventids =3D 1ULL << (dte.size + 1); + + if (eventid >=3D num_eventids) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: EventID 0x%x too large for DeviceID 0x%x " + "(must be less than 0x%x)\n", + __func__, eventid, devid, num_eventids); + return CMD_CONTINUE; + } + if (!intid_in_lpi_range(vintid)) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: VIntID 0x%x not a valid LPI\n", + __func__, vintid); + return CMD_CONTINUE; + } + if (!valid_doorbell(doorbell)) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: Doorbell %d not 1023 and not a valid LPI\n", + __func__, doorbell); + return CMD_CONTINUE; + } + if (vpeid >=3D s->vpet.num_entries) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: VPEID 0x%x out of range (must be less than 0x%x= )\n", + __func__, vpeid, s->vpet.num_entries); + return CMD_CONTINUE; + } + /* add ite entry to interrupt translation table */ + ite.valid =3D true; + ite.inttype =3D ITE_INTTYPE_VIRTUAL; + ite.intid =3D vintid; + ite.icid =3D 0; + ite.doorbell =3D doorbell; + ite.vpeid =3D vpeid; + return update_ite(s, eventid, &dte, &ite) ? CMD_CONTINUE : CMD_STALL; +} + /* * Update the Collection Table entry for @icid to @cte. Returns true * on success, false if there was a memory access error. @@ -872,6 +957,12 @@ static void process_cmdq(GICv3ITSState *s) case GITS_CMD_MOVALL: result =3D process_movall(s, cmdpkt); break; + case GITS_CMD_VMAPTI: + result =3D process_vmapti(s, cmdpkt, false); + break; + case GITS_CMD_VMAPI: + result =3D process_vmapti(s, cmdpkt, true); + break; default: trace_gicv3_its_cmd_unknown(cmd); break; diff --git a/hw/intc/trace-events b/hw/intc/trace-events index 53414aa1979..c6b2b9ab459 100644 --- a/hw/intc/trace-events +++ b/hw/intc/trace-events @@ -187,6 +187,8 @@ gicv3_its_cmd_mapti(uint32_t devid, uint32_t eventid, u= int32_t icid, uint32_t in gicv3_its_cmd_inv(void) "GICv3 ITS: command INV or INVALL" gicv3_its_cmd_movall(uint64_t rd1, uint64_t rd2) "GICv3 ITS: command MOVAL= L RDbase1 0x%" PRIx64 " RDbase2 0x%" PRIx64 gicv3_its_cmd_movi(uint32_t devid, uint32_t eventid, uint32_t icid) "GICv3= ITS: command MOVI DeviceID 0x%x EventID 0x%x ICID 0x%x" +gicv3_its_cmd_vmapi(uint32_t devid, uint32_t eventid, uint32_t vpeid, uint= 32_t doorbell) "GICv3 ITS: command VMAPI DeviceID 0x%x EventID 0x%x vPEID 0= x%x Dbell_pINTID 0x%x" +gicv3_its_cmd_vmapti(uint32_t devid, uint32_t eventid, uint32_t vpeid, uin= t32_t vintid, uint32_t doorbell) "GICv3 ITS: command VMAPI DeviceID 0x%x Ev= entID 0x%x vPEID 0x%x vINTID 0x%x Dbell_pINTID 0x%x" gicv3_its_cmd_unknown(unsigned cmd) "GICv3 ITS: unknown command 0x%x" gicv3_its_cte_read(uint32_t icid, int valid, uint32_t rdbase) "GICv3 ITS: = Collection Table read for ICID 0x%x: valid %d RDBase 0x%x" gicv3_its_cte_write(uint32_t icid, int valid, uint32_t rdbase) "GICv3 ITS:= Collection Table write for ICID 0x%x: valid %d RDBase 0x%x" --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650622844; cv=none; d=zohomail.com; s=zohoarc; b=AgsgXIy1XS9go5gS0nrvHXa66tbp2zWcc8lka80E90ImqPRfS3vOCMXswrj3XZNY+1P5pLxx126tfrDFwuddWIoqtCbRAJgWJzRcw4XW4Q9/E8M4m12sVg5C2x+PIZDXljKhsmE41yM9xh1rjBPdyb5x9SRX8oJw5XGfCIjL7Zw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650622844; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=VXuFbzZjCf1PlSy1g0YLTlpUCyHi9JXwBsfwU+Cdrqg=; b=c8D8MYuJJmk+Mj407BW43o0YD3sFOrN04N4nQ/AywFFC84DY5XR/ECh2uuQpRB+lu25l/yINAaZ4y80tcSL6kklMT0J7GrL1ibFtkQ+DRRWO2W47xbYvgg2THA1e++4Hvj5GR8Fb5CWZu6FELajjG6QaU8BM4IKvhpjCsi9zvZM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650622844455905.126930513113; Fri, 22 Apr 2022 03:20:44 -0700 (PDT) Received: from localhost ([::1]:53008 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhqP5-0004yh-D1 for importer2@patchew.org; Fri, 22 Apr 2022 06:20:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58316) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhq9e-0004ET-Df for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:48 -0400 Received: from mail-wr1-x436.google.com ([2a00:1450:4864:20::436]:39611) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhq9c-0002aZ-Gw for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:46 -0400 Received: by mail-wr1-x436.google.com with SMTP id m14so10319762wrb.6 for ; Fri, 22 Apr 2022 03:04:44 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.04.42 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:04:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=VXuFbzZjCf1PlSy1g0YLTlpUCyHi9JXwBsfwU+Cdrqg=; b=bO+1ekqZMU2LeIKzIp1NmCncTZcV9ZDm4zJly0P96IO8njJ4IZAK8Qe5s76v9DXL9l Ytl3+kp5DNnK9skLslU1FTtJyHj3K8xJzQPYdXG1rraVJKqCCT1kneoGRrmEuK4o+5v/ GQo2NhF0BcvLbGO6n9Qz+jptqsbc/gq5UeVpC6ygv5s3z4CKpJypULu6Hj2+yPVHAen7 QFBCeqhLOBwARwZUWva421weNMgJCO07FdPnDovkX61HeUc/794DzAJFWEWOHHsdENRt rnwX9x8IP9ew5lb2rhaV77B0JwssM0SgkDuyz6LNI3utzOpbdMoHqfgoCWZCyjLr0+5r Kj1w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=VXuFbzZjCf1PlSy1g0YLTlpUCyHi9JXwBsfwU+Cdrqg=; b=KdFHiXNXBMEwIDOWuMQwM8zPAJZXXSqar75Itz8XmtS6N5h2IWpxdrsVu4ZCImz7d+ XMzLyLsv7ZLLrXeUG6mBMIL1sj+WLfUKfbQV6DO3Mxd2E84WbLbNLqE2LGCOWMygi4Ab 8a4+F3qrWE4DN2WnEliQPsYsfHkEpaFBwvKMOqmwGTqVEY0sQgMbeupM38O/JOs+tYiG OnVsi+fO5k168p5aPf8aB6wjN7pEV25lfuOnrOKzNOv0vhmqseErtXEtVdIQaOiu1Dtk XwTljQqB2oHj5yETw0rZ31SFAS0QviWzWeukAtY+lz6eU4brQv0TEY/3cTGRc3bunale dW8A== X-Gm-Message-State: AOAM532DeBXqBs6gzAMpvcehDNXbuccP+oziqkSWm0xbDZEcBecJK4eg PK4jGJpCfz+KqGZJMtHli4zpd4lrn1PYmQ== X-Google-Smtp-Source: ABdhPJzbrhwDY5S5d3kiQmKDMIC3vHWmwO+lwv9uA2KKqkBqQlYqTIm5LYvbVgYPr95bJpc9KmikWw== X-Received: by 2002:a05:6000:8b:b0:207:b80e:c711 with SMTP id m11-20020a056000008b00b00207b80ec711mr3121689wrx.178.1650621883200; Fri, 22 Apr 2022 03:04:43 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 09/61] hw/intc/arm_gicv3_its: Implement VMAPP Date: Fri, 22 Apr 2022 11:03:40 +0100 Message-Id: <20220422100432.2288247-10-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650622845469100003 Content-Type: text/plain; charset="utf-8" Implement the GICv4 VMAPP command, which writes an entry to the vPE table. For GICv4.1 this command has extra fields in the command packet and additional behaviour. We define the 4.1-only fields with the FIELD macro, but only implement the GICv4.0 version of the command. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-10-peter.maydell@linaro.org --- hw/intc/gicv3_internal.h | 12 ++++++ hw/intc/arm_gicv3_its.c | 88 ++++++++++++++++++++++++++++++++++++++++ hw/intc/trace-events | 2 + 3 files changed, 102 insertions(+) diff --git a/hw/intc/gicv3_internal.h b/hw/intc/gicv3_internal.h index d3670a8894e..bbb8a20ce61 100644 --- a/hw/intc/gicv3_internal.h +++ b/hw/intc/gicv3_internal.h @@ -329,6 +329,7 @@ FIELD(GITS_TYPER, CIL, 36, 1) #define GITS_CMD_INVALL 0x0D #define GITS_CMD_MOVALL 0x0E #define GITS_CMD_DISCARD 0x0F +#define GITS_CMD_VMAPP 0x29 #define GITS_CMD_VMAPTI 0x2A #define GITS_CMD_VMAPI 0x2B =20 @@ -377,6 +378,17 @@ FIELD(VMAPTI_1, VPEID, 32, 16) FIELD(VMAPTI_2, VINTID, 0, 32) /* VMAPTI only */ FIELD(VMAPTI_2, DOORBELL, 32, 32) =20 +/* VMAPP command fields */ +FIELD(VMAPP_0, ALLOC, 8, 1) /* GICv4.1 only */ +FIELD(VMAPP_0, PTZ, 9, 1) /* GICv4.1 only */ +FIELD(VMAPP_0, VCONFADDR, 16, 36) /* GICv4.1 only */ +FIELD(VMAPP_1, DEFAULT_DOORBELL, 0, 32) /* GICv4.1 only */ +FIELD(VMAPP_1, VPEID, 32, 16) +FIELD(VMAPP_2, RDBASE, 16, 36) +FIELD(VMAPP_2, V, 63, 1) +FIELD(VMAPP_3, VPTSIZE, 0, 8) /* For GICv4.0, bits [7:6] are RES0 */ +FIELD(VMAPP_3, VPTADDR, 16, 36) + /* * 12 bytes Interrupt translation Table Entry size * as per Table 5.3 in GICv3 spec diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index 8aed57e7040..880bc6f647c 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -61,6 +61,12 @@ typedef struct ITEntry { uint32_t vpeid; } ITEntry; =20 +typedef struct VTEntry { + bool valid; + unsigned vptsize; + uint32_t rdbase; + uint64_t vptaddr; +} VTEntry; =20 /* * The ITS spec permits a range of CONSTRAINED UNPREDICTABLE options @@ -842,6 +848,85 @@ static ItsCmdResult process_movi(GICv3ITSState *s, con= st uint64_t *cmdpkt) return update_ite(s, eventid, &dte, &old_ite) ? CMD_CONTINUE : CMD_STA= LL; } =20 +/* + * Update the vPE Table entry at index @vpeid with the entry @vte. + * Returns true on success, false if there was a memory access error. + */ +static bool update_vte(GICv3ITSState *s, uint32_t vpeid, const VTEntry *vt= e) +{ + AddressSpace *as =3D &s->gicv3->dma_as; + uint64_t entry_addr; + uint64_t vteval =3D 0; + MemTxResult res =3D MEMTX_OK; + + trace_gicv3_its_vte_write(vpeid, vte->valid, vte->vptsize, vte->vptadd= r, + vte->rdbase); + + if (vte->valid) { + vteval =3D FIELD_DP64(vteval, VTE, VALID, 1); + vteval =3D FIELD_DP64(vteval, VTE, VPTSIZE, vte->vptsize); + vteval =3D FIELD_DP64(vteval, VTE, VPTADDR, vte->vptaddr); + vteval =3D FIELD_DP64(vteval, VTE, RDBASE, vte->rdbase); + } + + entry_addr =3D table_entry_addr(s, &s->vpet, vpeid, &res); + if (res !=3D MEMTX_OK) { + return false; + } + if (entry_addr =3D=3D -1) { + /* No L2 table for this index: discard write and continue */ + return true; + } + address_space_stq_le(as, entry_addr, vteval, MEMTXATTRS_UNSPECIFIED, &= res); + return res =3D=3D MEMTX_OK; +} + +static ItsCmdResult process_vmapp(GICv3ITSState *s, const uint64_t *cmdpkt) +{ + VTEntry vte; + uint32_t vpeid; + + if (!its_feature_virtual(s)) { + return CMD_CONTINUE; + } + + vpeid =3D FIELD_EX64(cmdpkt[1], VMAPP_1, VPEID); + vte.rdbase =3D FIELD_EX64(cmdpkt[2], VMAPP_2, RDBASE); + vte.valid =3D FIELD_EX64(cmdpkt[2], VMAPP_2, V); + vte.vptsize =3D FIELD_EX64(cmdpkt[3], VMAPP_3, VPTSIZE); + vte.vptaddr =3D FIELD_EX64(cmdpkt[3], VMAPP_3, VPTADDR); + + trace_gicv3_its_cmd_vmapp(vpeid, vte.rdbase, vte.valid, + vte.vptaddr, vte.vptsize); + + /* + * For GICv4.0 the VPT_size field is only 5 bits, whereas we + * define our field macros to include the full GICv4.1 8 bits. + * The range check on VPT_size will catch the cases where + * the guest set the RES0-in-GICv4.0 bits [7:6]. + */ + if (vte.vptsize > FIELD_EX64(s->typer, GITS_TYPER, IDBITS)) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: invalid VPT_size 0x%x\n", __func__, vte.vptsize= ); + return CMD_CONTINUE; + } + + if (vte.valid && vte.rdbase >=3D s->gicv3->num_cpu) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: invalid rdbase 0x%x\n", __func__, vte.rdbase); + return CMD_CONTINUE; + } + + if (vpeid >=3D s->vpet.num_entries) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: VPEID 0x%x out of range (must be less than 0x%x= )\n", + __func__, vpeid, s->vpet.num_entries); + return CMD_CONTINUE; + } + + return update_vte(s, vpeid, &vte) ? CMD_CONTINUE : CMD_STALL; +} + /* * Current implementation blocks until all * commands are processed @@ -963,6 +1048,9 @@ static void process_cmdq(GICv3ITSState *s) case GITS_CMD_VMAPI: result =3D process_vmapti(s, cmdpkt, true); break; + case GITS_CMD_VMAPP: + result =3D process_vmapp(s, cmdpkt); + break; default: trace_gicv3_its_cmd_unknown(cmd); break; diff --git a/hw/intc/trace-events b/hw/intc/trace-events index c6b2b9ab459..2fcc9e40e55 100644 --- a/hw/intc/trace-events +++ b/hw/intc/trace-events @@ -189,6 +189,7 @@ gicv3_its_cmd_movall(uint64_t rd1, uint64_t rd2) "GICv3= ITS: command MOVALL RDba gicv3_its_cmd_movi(uint32_t devid, uint32_t eventid, uint32_t icid) "GICv3= ITS: command MOVI DeviceID 0x%x EventID 0x%x ICID 0x%x" gicv3_its_cmd_vmapi(uint32_t devid, uint32_t eventid, uint32_t vpeid, uint= 32_t doorbell) "GICv3 ITS: command VMAPI DeviceID 0x%x EventID 0x%x vPEID 0= x%x Dbell_pINTID 0x%x" gicv3_its_cmd_vmapti(uint32_t devid, uint32_t eventid, uint32_t vpeid, uin= t32_t vintid, uint32_t doorbell) "GICv3 ITS: command VMAPI DeviceID 0x%x Ev= entID 0x%x vPEID 0x%x vINTID 0x%x Dbell_pINTID 0x%x" +gicv3_its_cmd_vmapp(uint32_t vpeid, uint64_t rdbase, int valid, uint64_t v= ptaddr, uint32_t vptsize) "GICv3 ITS: command VMAPP vPEID 0x%x RDbase 0x%" = PRIx64 " V %d VPT_addr 0x%" PRIx64 " VPT_size 0x%x" gicv3_its_cmd_unknown(unsigned cmd) "GICv3 ITS: unknown command 0x%x" gicv3_its_cte_read(uint32_t icid, int valid, uint32_t rdbase) "GICv3 ITS: = Collection Table read for ICID 0x%x: valid %d RDBase 0x%x" gicv3_its_cte_write(uint32_t icid, int valid, uint32_t rdbase) "GICv3 ITS:= Collection Table write for ICID 0x%x: valid %d RDBase 0x%x" @@ -199,6 +200,7 @@ gicv3_its_ite_write(uint64_t ittaddr, uint32_t eventid,= int valid, int inttype, gicv3_its_dte_read(uint32_t devid, int valid, uint32_t size, uint64_t itta= ddr) "GICv3 ITS: Device Table read for DeviceID 0x%x: valid %d size 0x%x IT= Taddr 0x%" PRIx64 gicv3_its_dte_write(uint32_t devid, int valid, uint32_t size, uint64_t itt= addr) "GICv3 ITS: Device Table write for DeviceID 0x%x: valid %d size 0x%x = ITTaddr 0x%" PRIx64 gicv3_its_dte_read_fault(uint32_t devid) "GICv3 ITS: Device Table read for= DeviceID 0x%x: faulted" +gicv3_its_vte_write(uint32_t vpeid, int valid, uint32_t vptsize, uint64_t = vptaddr, uint32_t rdbase) "GICv3 ITS: vPE Table write for vPEID 0x%x: valid= %d VPTsize 0x%x VPTaddr 0x%" PRIx64 " RDbase 0x%x" =20 # armv7m_nvic.c nvic_recompute_state(int vectpending, int vectpending_prio, int exception_= prio) "NVIC state recomputed: vectpending %d vectpending_prio %d exception_= prio %d" --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650623712; cv=none; d=zohomail.com; s=zohoarc; b=QU3I4xuVRIPqP1zeltMTxPUPWdxPAZp4Mp2FLd5LMrN2lv5RDigeR6EkswGGrn2R09I2XyzBTR/7EdqAB0znn5q5/c78zUaTrZ8CYSrXKfNN5cmwv4C6kxH1MnAK8mPnr25PPV4BTYCoxB5dfwI2zjuxfV+5wqr8xKQ1sNuqqNw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650623712; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=5uD+m1v7OaY8Vt76UhAAZWA6827cTfQzBkx7Ps8s2No=; b=Q/W42kRjmco1Zz7HUdRmbdljWrMU0NvdcRB3MlRzgsSNcHQS2AJZ62tMLoq3PsyvHCquJcFa2G6R5Bp5lIQmakwxM01Mep5S1jLrh6iw+wdAHrj5n4r4DMS4XUm1BpE6S3W1Vysd4O+warUN9pe3SNOzfuUxm0cj99x9Qic8Low= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650623712814472.81278401194186; Fri, 22 Apr 2022 03:35:12 -0700 (PDT) Received: from localhost ([::1]:41824 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhqd4-0000yk-Vp for importer2@patchew.org; Fri, 22 Apr 2022 06:35:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58324) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhq9f-0004Eg-6C for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:49 -0400 Received: from mail-wr1-x42e.google.com ([2a00:1450:4864:20::42e]:34763) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhq9d-0002ah-F1 for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:46 -0400 Received: by mail-wr1-x42e.google.com with SMTP id c10so10334541wrb.1 for ; Fri, 22 Apr 2022 03:04:45 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.04.43 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:04:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=5uD+m1v7OaY8Vt76UhAAZWA6827cTfQzBkx7Ps8s2No=; b=J9ddXcVxdyYgoyQintDV4POXii7agiIKzE+ReamVH9m9COd3zGDyGBCbcptb6Vtzl1 696/BAFlN7Zi2ViRv9SfYdn9lHv3o0d+JdYectPdr9GIREVAbAxzei/VH2OLoYyEoTQE KaKlUUPvycfOZpBhyf6zdFU30XdJtTgD6bzd+MQc3ZidERPs3Att8SdGDqnxt0WqJMlt eEsxQxPu3fzfqKrgQmklKvJqL4V5hQ8DfGgAArs163d1b4HhaBvvARCcuuxcpr4remUH kQR5E4NasQ9VzBWtSscJSM6nYl1+aFNoN7Qa4eAC0P+l2xmTRQlJvQfyWZu79nZqnp/r LYSQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5uD+m1v7OaY8Vt76UhAAZWA6827cTfQzBkx7Ps8s2No=; b=LmTwJ7UjTIj3zmGo2ITt+ytxYXq4t6gFbT4ZCekg7YgYi0dMxzxq9q5JVVqpaY4oeo UGZwNN31Wzvev2OZJxxxOXZBzG1eqz4XgQi4/7fs3pVYOcsAHy20G4tgPujoS3kp64B0 LI0350tJXZgbiHCJT/90dD4le8zZ3IH/kaWZCn5GNGw4BdFQr9i5ZM712qDjxn4jVpPn vPhOkf1yiO2g9fAecW0PyK5pgVVtjnjLsBkJcqTByQQFbPRWj2dhji9ExkKFsv22+o1m qjJcYAVl0lTYDn50NYhZKCOy6FYkQkK0nET8WZjAMklbQkCJKgdcyffHPFTAPIitlCA0 wxdw== X-Gm-Message-State: AOAM5327Pn4RA0ugiCLod7W8ovhbK/s7HwxfVLIKQ6wglGTkLbiIxLDj yozB7/BtGWrK93qYD3NaG6CpxlsxCV9STg== X-Google-Smtp-Source: ABdhPJz0x9i5HECqVF3/aPi7uLwlT6iE+pbn4SnPd5rCSLkLBxw3BsCWZOH5Tc31H6QvcTyZij7/sg== X-Received: by 2002:a5d:48ce:0:b0:20a:bb9b:62a3 with SMTP id p14-20020a5d48ce000000b0020abb9b62a3mr3050360wrs.307.1650621883994; Fri, 22 Apr 2022 03:04:43 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 10/61] hw/intc/arm_gicv3_its: Distinguish success and error cases of CMD_CONTINUE Date: Fri, 22 Apr 2022 11:03:41 +0100 Message-Id: <20220422100432.2288247-11-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650623714916100001 Content-Type: text/plain; charset="utf-8" In the ItsCmdResult enum, we currently distinguish only CMD_STALL (failure, stall processing of the command queue) and CMD_CONTINUE (keep processing the queue), and we use the latter both for "there was a parameter error, go on to the next command" and "the command succeeded, go on to the next command". Sometimes we would like to distinguish those two cases, so add CMD_CONTINUE_OK to the enum to represent the success situation, and use it in the relevant places. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-11-peter.maydell@linaro.org --- hw/intc/arm_gicv3_its.c | 29 ++++++++++++++++------------- 1 file changed, 16 insertions(+), 13 deletions(-) diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index 880bc6f647c..179a9b032c2 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -78,11 +78,13 @@ typedef struct VTEntry { * and continue processing. * The process_* functions which handle individual ITS commands all * return an ItsCmdResult which tells process_cmdq() whether it should - * stall or keep going. + * stall, keep going because of an error, or keep going because the + * command was a success. */ typedef enum ItsCmdResult { CMD_STALL =3D 0, CMD_CONTINUE =3D 1, + CMD_CONTINUE_OK =3D 2, } ItsCmdResult; =20 /* True if the ITS supports the GICv4 virtual LPI feature */ @@ -400,9 +402,9 @@ static ItsCmdResult do_process_its_cmd(GICv3ITSState *s= , uint32_t devid, ITEntry ite =3D {}; /* remove mapping from interrupt translation table */ ite.valid =3D false; - return update_ite(s, eventid, &dte, &ite) ? CMD_CONTINUE : CMD_STA= LL; + return update_ite(s, eventid, &dte, &ite) ? CMD_CONTINUE_OK : CMD_= STALL; } - return CMD_CONTINUE; + return CMD_CONTINUE_OK; } =20 static ItsCmdResult process_its_cmd(GICv3ITSState *s, const uint64_t *cmdp= kt, @@ -495,7 +497,7 @@ static ItsCmdResult process_mapti(GICv3ITSState *s, con= st uint64_t *cmdpkt, ite.icid =3D icid; ite.doorbell =3D INTID_SPURIOUS; ite.vpeid =3D 0; - return update_ite(s, eventid, &dte, &ite) ? CMD_CONTINUE : CMD_STALL; + return update_ite(s, eventid, &dte, &ite) ? CMD_CONTINUE_OK : CMD_STAL= L; } =20 static ItsCmdResult process_vmapti(GICv3ITSState *s, const uint64_t *cmdpk= t, @@ -574,7 +576,7 @@ static ItsCmdResult process_vmapti(GICv3ITSState *s, co= nst uint64_t *cmdpkt, ite.icid =3D 0; ite.doorbell =3D doorbell; ite.vpeid =3D vpeid; - return update_ite(s, eventid, &dte, &ite) ? CMD_CONTINUE : CMD_STALL; + return update_ite(s, eventid, &dte, &ite) ? CMD_CONTINUE_OK : CMD_STAL= L; } =20 /* @@ -635,7 +637,7 @@ static ItsCmdResult process_mapc(GICv3ITSState *s, cons= t uint64_t *cmdpkt) return CMD_CONTINUE; } =20 - return update_cte(s, icid, &cte) ? CMD_CONTINUE : CMD_STALL; + return update_cte(s, icid, &cte) ? CMD_CONTINUE_OK : CMD_STALL; } =20 /* @@ -696,7 +698,7 @@ static ItsCmdResult process_mapd(GICv3ITSState *s, cons= t uint64_t *cmdpkt) return CMD_CONTINUE; } =20 - return update_dte(s, devid, &dte) ? CMD_CONTINUE : CMD_STALL; + return update_dte(s, devid, &dte) ? CMD_CONTINUE_OK : CMD_STALL; } =20 static ItsCmdResult process_movall(GICv3ITSState *s, const uint64_t *cmdpk= t) @@ -725,13 +727,13 @@ static ItsCmdResult process_movall(GICv3ITSState *s, = const uint64_t *cmdpkt) =20 if (rd1 =3D=3D rd2) { /* Move to same target must succeed as a no-op */ - return CMD_CONTINUE; + return CMD_CONTINUE_OK; } =20 /* Move all pending LPIs from redistributor 1 to redistributor 2 */ gicv3_redist_movall_lpis(&s->gicv3->cpu[rd1], &s->gicv3->cpu[rd2]); =20 - return CMD_CONTINUE; + return CMD_CONTINUE_OK; } =20 static ItsCmdResult process_movi(GICv3ITSState *s, const uint64_t *cmdpkt) @@ -845,7 +847,7 @@ static ItsCmdResult process_movi(GICv3ITSState *s, cons= t uint64_t *cmdpkt) =20 /* Update the ICID field in the interrupt translation table entry */ old_ite.icid =3D new_icid; - return update_ite(s, eventid, &dte, &old_ite) ? CMD_CONTINUE : CMD_STA= LL; + return update_ite(s, eventid, &dte, &old_ite) ? CMD_CONTINUE_OK : CMD_= STALL; } =20 /* @@ -924,7 +926,7 @@ static ItsCmdResult process_vmapp(GICv3ITSState *s, con= st uint64_t *cmdpkt) return CMD_CONTINUE; } =20 - return update_vte(s, vpeid, &vte) ? CMD_CONTINUE : CMD_STALL; + return update_vte(s, vpeid, &vte) ? CMD_CONTINUE_OK : CMD_STALL; } =20 /* @@ -963,7 +965,7 @@ static void process_cmdq(GICv3ITSState *s) } =20 while (wr_offset !=3D rd_offset) { - ItsCmdResult result =3D CMD_CONTINUE; + ItsCmdResult result =3D CMD_CONTINUE_OK; void *hostmem; hwaddr buflen; uint64_t cmdpkt[GITS_CMDQ_ENTRY_WORDS]; @@ -1055,7 +1057,8 @@ static void process_cmdq(GICv3ITSState *s) trace_gicv3_its_cmd_unknown(cmd); break; } - if (result =3D=3D CMD_CONTINUE) { + if (result !=3D CMD_STALL) { + /* CMD_CONTINUE or CMD_CONTINUE_OK */ rd_offset++; rd_offset %=3D s->cq.num_entries; s->creadr =3D FIELD_DP64(s->creadr, GITS_CREADR, OFFSET, rd_of= fset); --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650622606; cv=none; d=zohomail.com; s=zohoarc; b=VpC7UdcoGELduJuTcAiYWpKtV9ZCR6lPIUmcp+sGDnSEf7yNYAe625OAXEnyE1rnw5K73h8F18LldigSHPeme592kJV6RZcXNo3yQLDTJDaOqS0rEwJpA0IRxuTUQSSmruxvn/Y3sZglcWVgoaPgGDAN0KX9X2XPY17Oa0dH7lo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650622606; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=jWdp/zYXmce0jcV8IFNr0A3WhWo/fJGJjHVaToScuuU=; b=f4/fgSTUQvZ0gmiGFMmcWn5Oh63an+VqZJbhEPrJlVrBMqtNw/8pnkIciqY818F4W5UIQmaRSrS0ZawA4fzLTlg16Oe8DtF9MFxAHJVi8CtPm8qo9OJkd7lmSpYyVao9WqOOOyE5BBD4VE+7cNk77WNd070AVMTENGe9PRg7d4s= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650622606746629.0611416299427; Fri, 22 Apr 2022 03:16:46 -0700 (PDT) Received: from localhost ([::1]:45012 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhqLF-0007lI-N1 for importer2@patchew.org; Fri, 22 Apr 2022 06:16:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58340) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhq9f-0004Ei-VW for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:50 -0400 Received: from mail-wr1-x436.google.com ([2a00:1450:4864:20::436]:33690) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhq9e-0002ar-7U for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:47 -0400 Received: by mail-wr1-x436.google.com with SMTP id x18so10354818wrc.0 for ; Fri, 22 Apr 2022 03:04:45 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.04.44 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:04:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=jWdp/zYXmce0jcV8IFNr0A3WhWo/fJGJjHVaToScuuU=; b=WpitD8p+xH3MqcBqvNdfqAoOI9S9fK9JCeRxNPDjnYMU2VnWpj51ggPPGxhGrMuuMy BYPs/Ykl1e1Tw07KsF+gL5nRuUyuIwKKNnPGu/7u5D3YASgi/Z6Jnvmlqx3wOqrn9+69 mxC8f5JheI3CQ+ANz45j/hpyyJSG+RMahukhP4zr/7gpAJLu0ie+bD2Qc7TKdnKrdp9f i6APQ+5fqMywabb1veLNpTg8cO3U0RKW3nSPmQUWuPD8P8afNgTVz6dafo30dpD9xQXt 3YtMTs1wqcVvqd1su0QtDhZaot2SVgR+gtg32CqdWXMZ9wK5MChyiibvkXFX5wKcesrM PXRQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=jWdp/zYXmce0jcV8IFNr0A3WhWo/fJGJjHVaToScuuU=; b=2B8NgAd+fPf327JVEJ8xJ6F5ad/EZcmu4e3UOKlGFmaTGgzwS/MPdvu37+up+NaUPC vhkUxoRWEc+d+qShA1emymxsnxklkiw4P1ABSlzHtMznMa9dzNiocG2vrCZoZtQCPBGv Fa7hP5xHAzJRbMCIRC10amRHIo3qZalLz84SRWgBvKccJp2SIbp7r3b5ZTyAYL64Djao isubWJIrjmkY2gojN+3746wJWlpzI4BvIfp+61SiR/0XAwLFp6k335NDzvN8L2G5GH5E 1lFm1PC2l/pFt9jzE5X0SHL3j4o3moqArqKZNO2MoMHmHmr6WZ16zNsbhTWfj6PksG/S oJig== X-Gm-Message-State: AOAM532k7zhphzU6D40NguO2Rvt4acwyFOa1szc4RYdjd75W/Bl9e8We l98M6rXtjFdawk8x0WzyIe95FEiXyClYNQ== X-Google-Smtp-Source: ABdhPJydqqaqF2xWSsBjCJPjyAjsZTRvAdxVrShqybn/AZregDfcmrL26B2WTXknYiShZ1yJ0bAFbQ== X-Received: by 2002:a05:6000:1809:b0:20a:cafc:fd39 with SMTP id m9-20020a056000180900b0020acafcfd39mr1441204wrh.255.1650621884952; Fri, 22 Apr 2022 03:04:44 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 11/61] hw/intc/arm_gicv3_its: Factor out "find ITE given devid, eventid" Date: Fri, 22 Apr 2022 11:03:42 +0100 Message-Id: <20220422100432.2288247-12-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650622608347100001 Content-Type: text/plain; charset="utf-8" The operation of finding an interrupt table entry given a (DeviceID, EventID) pair is necessary in multiple different ITS commands. The process requires first using the DeviceID as an index into the device table to find the DTE, and then useng the EventID as an index into the interrupt table specified by that DTE to find the ITE. We also need to handle all the possible error cases: indexes out of range, table memory not readable, table entries not valid. Factor this out into a separate lookup_ite() function which we can then call from the places where we were previously open-coding this sequence. We'll also need this for some of the new GICv4.0 commands. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-12-peter.maydell@linaro.org --- hw/intc/arm_gicv3_its.c | 124 +++++++++++++++++++++------------------- 1 file changed, 64 insertions(+), 60 deletions(-) diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index 179a9b032c2..4a029d754ad 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -314,6 +314,60 @@ out: return res; } =20 +/* + * Given a (DeviceID, EventID), look up the corresponding ITE, including + * checking for the various invalid-value cases. If we find a valid ITE, + * fill in @ite and @dte and return CMD_CONTINUE_OK. Otherwise return + * CMD_STALL or CMD_CONTINUE as appropriate (and the contents of @ite + * should not be relied on). + * + * The string @who is purely for the LOG_GUEST_ERROR messages, + * and should indicate the name of the calling function or similar. + */ +static ItsCmdResult lookup_ite(GICv3ITSState *s, const char *who, + uint32_t devid, uint32_t eventid, ITEntry *= ite, + DTEntry *dte) +{ + uint64_t num_eventids; + + if (devid >=3D s->dt.num_entries) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: invalid command attributes: devid %d>=3D%d", + who, devid, s->dt.num_entries); + return CMD_CONTINUE; + } + + if (get_dte(s, devid, dte) !=3D MEMTX_OK) { + return CMD_STALL; + } + if (!dte->valid) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: invalid command attributes: " + "invalid dte for %d\n", who, devid); + return CMD_CONTINUE; + } + + num_eventids =3D 1ULL << (dte->size + 1); + if (eventid >=3D num_eventids) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: invalid command attributes: eventid %d >=3D %" + PRId64 "\n", who, eventid, num_eventids); + return CMD_CONTINUE; + } + + if (get_ite(s, eventid, dte, ite) !=3D MEMTX_OK) { + return CMD_STALL; + } + + if (!ite->valid) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: invalid command attributes: invalid ITE\n", who= ); + return CMD_CONTINUE; + } + + return CMD_CONTINUE_OK; +} + /* * This function handles the processing of following commands based on * the ItsCmdType parameter passed:- @@ -325,42 +379,17 @@ out: static ItsCmdResult do_process_its_cmd(GICv3ITSState *s, uint32_t devid, uint32_t eventid, ItsCmdType cmd) { - uint64_t num_eventids; DTEntry dte; CTEntry cte; ITEntry ite; + ItsCmdResult cmdres; =20 - if (devid >=3D s->dt.num_entries) { - qemu_log_mask(LOG_GUEST_ERROR, - "%s: invalid command attributes: devid %d>=3D%d", - __func__, devid, s->dt.num_entries); - return CMD_CONTINUE; + cmdres =3D lookup_ite(s, __func__, devid, eventid, &ite, &dte); + if (cmdres !=3D CMD_CONTINUE_OK) { + return cmdres; } =20 - if (get_dte(s, devid, &dte) !=3D MEMTX_OK) { - return CMD_STALL; - } - if (!dte.valid) { - qemu_log_mask(LOG_GUEST_ERROR, - "%s: invalid command attributes: " - "invalid dte for %d\n", __func__, devid); - return CMD_CONTINUE; - } - - num_eventids =3D 1ULL << (dte.size + 1); - if (eventid >=3D num_eventids) { - qemu_log_mask(LOG_GUEST_ERROR, - "%s: invalid command attributes: eventid %d >=3D %" - PRId64 "\n", - __func__, eventid, num_eventids); - return CMD_CONTINUE; - } - - if (get_ite(s, eventid, &dte, &ite) !=3D MEMTX_OK) { - return CMD_STALL; - } - - if (!ite.valid || ite.inttype !=3D ITE_INTTYPE_PHYSICAL) { + if (ite.inttype !=3D ITE_INTTYPE_PHYSICAL) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid command attributes: invalid ITE\n", __func__); @@ -740,10 +769,10 @@ static ItsCmdResult process_movi(GICv3ITSState *s, co= nst uint64_t *cmdpkt) { uint32_t devid, eventid; uint16_t new_icid; - uint64_t num_eventids; DTEntry dte; CTEntry old_cte, new_cte; ITEntry old_ite; + ItsCmdResult cmdres; =20 devid =3D FIELD_EX64(cmdpkt[0], MOVI_0, DEVICEID); eventid =3D FIELD_EX64(cmdpkt[1], MOVI_1, EVENTID); @@ -751,37 +780,12 @@ static ItsCmdResult process_movi(GICv3ITSState *s, co= nst uint64_t *cmdpkt) =20 trace_gicv3_its_cmd_movi(devid, eventid, new_icid); =20 - if (devid >=3D s->dt.num_entries) { - qemu_log_mask(LOG_GUEST_ERROR, - "%s: invalid command attributes: devid %d>=3D%d", - __func__, devid, s->dt.num_entries); - return CMD_CONTINUE; - } - if (get_dte(s, devid, &dte) !=3D MEMTX_OK) { - return CMD_STALL; + cmdres =3D lookup_ite(s, __func__, devid, eventid, &old_ite, &dte); + if (cmdres !=3D CMD_CONTINUE_OK) { + return cmdres; } =20 - if (!dte.valid) { - qemu_log_mask(LOG_GUEST_ERROR, - "%s: invalid command attributes: " - "invalid dte for %d\n", __func__, devid); - return CMD_CONTINUE; - } - - num_eventids =3D 1ULL << (dte.size + 1); - if (eventid >=3D num_eventids) { - qemu_log_mask(LOG_GUEST_ERROR, - "%s: invalid command attributes: eventid %d >=3D %" - PRId64 "\n", - __func__, eventid, num_eventids); - return CMD_CONTINUE; - } - - if (get_ite(s, eventid, &dte, &old_ite) !=3D MEMTX_OK) { - return CMD_STALL; - } - - if (!old_ite.valid || old_ite.inttype !=3D ITE_INTTYPE_PHYSICAL) { + if (old_ite.inttype !=3D ITE_INTTYPE_PHYSICAL) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid command attributes: invalid ITE\n", __func__); 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.04.45 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:04:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=oE4dJBqIPuYMUXDEJtYKoOIm9KCvHl6Yg1E7509GUMc=; b=PsPu23K77z2tyhpGM7sn2OMSoAQP+jjqJgU6WGh415xdJbwVdG6ZKB/2RIXsXB7i1/ /L8uQZ/8yoKFfr1VpQA+gozcT9BjYsm854MwkzHUgJNJeDlBamabVPNyMv/fob/5hEai WfZNr0Y8zt5HZ4L3QH6Ub+cgXJ+Ltdqw8ycNNR8eoh8aWJDQzy3E7Yp/a8PbvXoZVedH dW1NoSi0tQ2EN8zsdJ/e+WUPBhdTEKmF+Qdf1omo9BPpIuYYuh8FXlkXD0yMm9+YyJ9R yj9bjwEj55lJ49FWYvpF6glknbdX+RDDwlR4ZPlJi/wafGS/7oAYaj3pFilgAvdyaTwb +dpQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=oE4dJBqIPuYMUXDEJtYKoOIm9KCvHl6Yg1E7509GUMc=; b=ve1/6unCcVKH4EqKfQ/2VmHYlWYg5KEXgv1TIqFhtKhfHkGypMqrEQcUFyPBZF9APo yJJmxjCBqclrcv1+5dwwAWJw3WLndgogwXsKZ19bkQdNAS+qDqWJLYfiTpggf7FIdayt KEnW1HdzPu7eNuaf3oTuVKdAPSrvNmuHiuvVyCbqOlS5uM9aE/r5/LfMpoK6uAbAJ8uT oFJFOz5hCZAdvSLG8o2IdHcPRs9iReAW9+gZeWygCCgZcXTuy9dbTXVO3TDcoplySPNM qlIlOlk0Vb5AMVhO+uyMWcKEZjAeqgQUBf+ursAAdSD+e9VMgBxj/LfzA6jbRGv8N1sU JvWw== X-Gm-Message-State: AOAM531TnNuIo8AHszF5TDcDdzxgByHCuXU0h9veANH7vsycl2hpSEzU aqMu34pxpvDNW6lG/fZ0CgjyWQV2Fjvocg== X-Google-Smtp-Source: ABdhPJx1SKHBLAPjJVCDX92GlpkBK7LRDkOXrcdVz6gW+ZwQ/+ul1LBBsnxmo9ewKW7+mEPlAPHoUg== X-Received: by 2002:a5d:4b45:0:b0:207:ab91:edd8 with SMTP id w5-20020a5d4b45000000b00207ab91edd8mr3099278wrs.168.1650621885766; Fri, 22 Apr 2022 03:04:45 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 12/61] hw/intc/arm_gicv3_its: Factor out CTE lookup sequence Date: Fri, 22 Apr 2022 11:03:43 +0100 Message-Id: <20220422100432.2288247-13-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650623086945100001 Content-Type: text/plain; charset="utf-8" Factor out the sequence of looking up a CTE from an ICID including the validity and error checks. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-13-peter.maydell@linaro.org --- hw/intc/arm_gicv3_its.c | 109 ++++++++++++++-------------------------- 1 file changed, 39 insertions(+), 70 deletions(-) diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index 4a029d754ad..a2a4e3de56e 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -368,6 +368,36 @@ static ItsCmdResult lookup_ite(GICv3ITSState *s, const= char *who, return CMD_CONTINUE_OK; } =20 +/* + * Given an ICID, look up the corresponding CTE, including checking for va= rious + * invalid-value cases. If we find a valid CTE, fill in @cte and return + * CMD_CONTINUE_OK; otherwise return CMD_STALL or CMD_CONTINUE (and the + * contents of @cte should not be relied on). + * + * The string @who is purely for the LOG_GUEST_ERROR messages, + * and should indicate the name of the calling function or similar. + */ +static ItsCmdResult lookup_cte(GICv3ITSState *s, const char *who, + uint32_t icid, CTEntry *cte) +{ + if (icid >=3D s->ct.num_entries) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid ICID 0x%x\n", who, ici= d); + return CMD_CONTINUE; + } + if (get_cte(s, icid, cte) !=3D MEMTX_OK) { + return CMD_STALL; + } + if (!cte->valid) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid CTE\n", who); + return CMD_CONTINUE; + } + if (cte->rdbase >=3D s->gicv3->num_cpu) { + return CMD_CONTINUE; + } + return CMD_CONTINUE_OK; +} + + /* * This function handles the processing of following commands based on * the ItsCmdType parameter passed:- @@ -396,29 +426,9 @@ static ItsCmdResult do_process_its_cmd(GICv3ITSState *= s, uint32_t devid, return CMD_CONTINUE; } =20 - if (ite.icid >=3D s->ct.num_entries) { - qemu_log_mask(LOG_GUEST_ERROR, - "%s: invalid ICID 0x%x in ITE (table corrupted?)\n", - __func__, ite.icid); - return CMD_CONTINUE; - } - - if (get_cte(s, ite.icid, &cte) !=3D MEMTX_OK) { - return CMD_STALL; - } - if (!cte.valid) { - qemu_log_mask(LOG_GUEST_ERROR, - "%s: invalid command attributes: invalid CTE\n", - __func__); - return CMD_CONTINUE; - } - - /* - * Current implementation only supports rdbase =3D=3D procnum - * Hence rdbase physical address is ignored - */ - if (cte.rdbase >=3D s->gicv3->num_cpu) { - return CMD_CONTINUE; + cmdres =3D lookup_cte(s, __func__, ite.icid, &cte); + if (cmdres !=3D CMD_CONTINUE_OK) { + return cmdres; } =20 if ((cmd =3D=3D CLEAR) || (cmd =3D=3D DISCARD)) { @@ -792,54 +802,13 @@ static ItsCmdResult process_movi(GICv3ITSState *s, co= nst uint64_t *cmdpkt) return CMD_CONTINUE; } =20 - if (old_ite.icid >=3D s->ct.num_entries) { - qemu_log_mask(LOG_GUEST_ERROR, - "%s: invalid ICID 0x%x in ITE (table corrupted?)\n", - __func__, old_ite.icid); - return CMD_CONTINUE; + cmdres =3D lookup_cte(s, __func__, old_ite.icid, &old_cte); + if (cmdres !=3D CMD_CONTINUE_OK) { + return cmdres; } - - if (new_icid >=3D s->ct.num_entries) { - qemu_log_mask(LOG_GUEST_ERROR, - "%s: invalid command attributes: ICID 0x%x\n", - __func__, new_icid); - return CMD_CONTINUE; - } - - if (get_cte(s, old_ite.icid, &old_cte) !=3D MEMTX_OK) { - return CMD_STALL; - } - if (!old_cte.valid) { - qemu_log_mask(LOG_GUEST_ERROR, - "%s: invalid command attributes: " - "invalid CTE for old ICID 0x%x\n", - __func__, old_ite.icid); - return CMD_CONTINUE; - } - - if (get_cte(s, new_icid, &new_cte) !=3D MEMTX_OK) { - return CMD_STALL; - } - if (!new_cte.valid) { - qemu_log_mask(LOG_GUEST_ERROR, - "%s: invalid command attributes: " - "invalid CTE for new ICID 0x%x\n", - __func__, new_icid); - return CMD_CONTINUE; - } - - if (old_cte.rdbase >=3D s->gicv3->num_cpu) { - qemu_log_mask(LOG_GUEST_ERROR, - "%s: CTE has invalid rdbase 0x%x\n", - __func__, old_cte.rdbase); - return CMD_CONTINUE; - } - - if (new_cte.rdbase >=3D s->gicv3->num_cpu) { - qemu_log_mask(LOG_GUEST_ERROR, - "%s: CTE has invalid rdbase 0x%x\n", - __func__, new_cte.rdbase); - return CMD_CONTINUE; + cmdres =3D lookup_cte(s, __func__, new_icid, &new_cte); + if (cmdres !=3D CMD_CONTINUE_OK) { + return cmdres; } =20 if (old_cte.rdbase !=3D new_cte.rdbase) { --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650622491; cv=none; d=zohomail.com; s=zohoarc; b=MriwfiJ7n3bEtOAeGK3EjRpMQK+wrnBAldJUgvVxyWCxYJNiaUvLpf7bQIdtZp0WRGUFidXCZaLFNkgk/qWyhvpeiWmFdt+99KDIMWIf+vK/xSAzHele6hFplxqAILFMZQTDq/V+Qc3mbzDl+i5rJSMs0svUoBvFpZts1cru3QU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.04.45 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:04:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=OtRB/R8Eaisib9dHQMdldij6U8w9ALtuwnHTBkYALOQ=; b=FehyDWsEEgYSg5WIaq3bp0r9T9KKZcHTAsN+3XpOP69kHn61e3fXAR2x94KGTvAhf7 soOGqUeKkGcGR4OuvM2flLk1rLKK0ct9DEq0bOfgOrwisv+6EHc8lXFLHKdU4jYt+0MF gQsC2BT0olgZO4iBWpznEIFOy+OIxr2FTbK93lcxyxwCqc7ulwP6S3TZhi57lK51XN5K CC2jPFfm74oa8sS9BYKAcNOd1tnWobiI9OVf4CsLf45zm19bR93gVbwEfKhweLTJJE5x gBojETDNyNxMasBwK5QxdkUlKW6uGei/pkmN4tupHAp54d9XgNvjWMOfuaqz2cIOxQf9 xeSw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=OtRB/R8Eaisib9dHQMdldij6U8w9ALtuwnHTBkYALOQ=; b=jZ6Mk6C9mlq/v/iUDzF41hiPQZJ4m1oui1o5uHUAZR9X7fUpSESJ1sPuS+G6yDtYlK ylSCLAVp6PBIYLCA4NsJ9TMr8ocbuEIj8by/wBau0cTlhe6q34kJgXWKRmAxmA31SdDg FdeyvaYYbOcOiOOA4HVbI53gkkR8zD8nZNzm3tedhq4LMOccUtO0osMo/QdGrogNlfmq ZCCtEK3E0PXx/Iit+nwPU7q5zRIfvBqKyCz/ZAe72YLm+G3BoNtCLLhdiU9pE8UQv6uH S2fG5Nuae5SRsBFgzQ4nTOLRkQw6OY3hZuaGs9b22WQ0n+x6InLz6PpqdW2U3R1lMvLn K3dg== X-Gm-Message-State: AOAM532vPYhUSHSB2BCe+H+J4QBLsKtElNYsiBOS/K8QtVe0GdKLykDQ XCRavX2Uf7+4MIlmQDuXcVUNwuZmLLp7uw== X-Google-Smtp-Source: ABdhPJwRTBizb3d6IabYKrY92cJU8fUgkrzUJ0Fh6OGu/+EiiMVNMEizRRfUqAoQnm/hBixTxBv7ZQ== X-Received: by 2002:adf:fb48:0:b0:203:f986:874a with SMTP id c8-20020adffb48000000b00203f986874amr3089835wrs.614.1650621886607; Fri, 22 Apr 2022 03:04:46 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 13/61] hw/intc/arm_gicv3_its: Split out process_its_cmd() physical interrupt code Date: Fri, 22 Apr 2022 11:03:44 +0100 Message-Id: <20220422100432.2288247-14-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650622493717100003 Content-Type: text/plain; charset="utf-8" Split the part of process_its_cmd() which is specific to physical interrupts into its own function. This is the part which starts by taking the ICID and looking it up in the collection table. The handling of virtual interrupts is significantly different (involving a lookup in the vPE table) so structuring the code with one sub-function for the physical interrupt case and one for the virtual interrupt case will be clearer than putting both cases in one large function. The code for handling the "remove mapping from ITE" for the DISCARD command remains in process_its_cmd() because it is common to both virtual and physical interrupts. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-14-peter.maydell@linaro.org --- hw/intc/arm_gicv3_its.c | 51 ++++++++++++++++++++++++++--------------- 1 file changed, 33 insertions(+), 18 deletions(-) diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index a2a4e3de56e..e7e1769fa41 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -397,6 +397,19 @@ static ItsCmdResult lookup_cte(GICv3ITSState *s, const= char *who, return CMD_CONTINUE_OK; } =20 +static ItsCmdResult process_its_cmd_phys(GICv3ITSState *s, const ITEntry *= ite, + int irqlevel) +{ + CTEntry cte; + ItsCmdResult cmdres; + + cmdres =3D lookup_cte(s, __func__, ite->icid, &cte); + if (cmdres !=3D CMD_CONTINUE_OK) { + return cmdres; + } + gicv3_redist_process_lpi(&s->gicv3->cpu[cte.rdbase], ite->intid, irqle= vel); + return CMD_CONTINUE_OK; +} =20 /* * This function handles the processing of following commands based on @@ -410,34 +423,36 @@ static ItsCmdResult do_process_its_cmd(GICv3ITSState = *s, uint32_t devid, uint32_t eventid, ItsCmdType cmd) { DTEntry dte; - CTEntry cte; ITEntry ite; ItsCmdResult cmdres; + int irqlevel; =20 cmdres =3D lookup_ite(s, __func__, devid, eventid, &ite, &dte); if (cmdres !=3D CMD_CONTINUE_OK) { return cmdres; } =20 - if (ite.inttype !=3D ITE_INTTYPE_PHYSICAL) { - qemu_log_mask(LOG_GUEST_ERROR, - "%s: invalid command attributes: invalid ITE\n", - __func__); - return CMD_CONTINUE; + irqlevel =3D (cmd =3D=3D CLEAR || cmd =3D=3D DISCARD) ? 0 : 1; + + switch (ite.inttype) { + case ITE_INTTYPE_PHYSICAL: + cmdres =3D process_its_cmd_phys(s, &ite, irqlevel); + break; + case ITE_INTTYPE_VIRTUAL: + if (!its_feature_virtual(s)) { + /* Can't happen unless guest is illegally writing to table mem= ory */ + qemu_log_mask(LOG_GUEST_ERROR, + "%s: invalid type %d in ITE (table corrupted?)\n= ", + __func__, ite.inttype); + return CMD_CONTINUE; + } + /* The GICv4 virtual interrupt handling will go here */ + g_assert_not_reached(); + default: + g_assert_not_reached(); } =20 - cmdres =3D lookup_cte(s, __func__, ite.icid, &cte); - if (cmdres !=3D CMD_CONTINUE_OK) { - return cmdres; - } - - if ((cmd =3D=3D CLEAR) || (cmd =3D=3D DISCARD)) { - gicv3_redist_process_lpi(&s->gicv3->cpu[cte.rdbase], ite.intid, 0); - } else { - gicv3_redist_process_lpi(&s->gicv3->cpu[cte.rdbase], ite.intid, 1); - } - - if (cmd =3D=3D DISCARD) { + if (cmdres =3D=3D CMD_CONTINUE_OK && cmd =3D=3D DISCARD) { ITEntry ite =3D {}; /* remove mapping from interrupt translation table */ ite.valid =3D false; --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650623868; cv=none; d=zohomail.com; s=zohoarc; b=jH5PEdFgZxcLQ04gcC4hkLmDFrVdP6Rxh5MrL/r3r0Tk6zsdYg8c2Mx5DNwkBfE+rrV/ltAjFZQgdnM08L3NByYjhNey/3cemDbaAdrw6WmajbKRHFpD5YNbYRTgsSW8EIB/GmIyvzKt1Q2swI5WR+2k04wMk4CnqUcHbTi6K2w= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650623868; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=DJiY/tgKJhJy8+LIvxeHxLLKq7rqsAI2KRSR0lukesA=; b=bVhawQq8ynoHHrnn2RmYELEwIbZvqm1dPKHbJXhkZoYgnnyoF7GFqmbWBcx9zHCDjQfBqf9Pv6LBcq/7w103FW+kmvDd+IhLi+SwU78gIZIaHM1QJFUfoILM5YjZB1jn6X15r865PQHaMrJAt6b1qQi4E05JXmpkP5N3Ko2OAfw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650623868729240.56659498204658; Fri, 22 Apr 2022 03:37:48 -0700 (PDT) Received: from localhost ([::1]:47566 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhqfb-0005Y1-6W for importer2@patchew.org; Fri, 22 Apr 2022 06:37:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58402) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhq9k-0004I3-1w for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:52 -0400 Received: from mail-wr1-x42d.google.com ([2a00:1450:4864:20::42d]:44905) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhq9h-0002bM-VU for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:51 -0400 Received: by mail-wr1-x42d.google.com with SMTP id b19so10279727wrh.11 for ; Fri, 22 Apr 2022 03:04:48 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.04.46 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:04:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=DJiY/tgKJhJy8+LIvxeHxLLKq7rqsAI2KRSR0lukesA=; b=pyQy12zNdPlJp75X97973Usa8Q11fAliqGLkKs9Srdx+dpkBHvp8m97SmQz4wY+dEE RTGfPrA7nvfoPIR2P2/u+TG9ISxrpKWs5V9N/7Z41T2KbUJD6CF0LADjsBNf9/BTXKQ/ jjYbvGFzfesMnaSSfQEUOl52J9uTOJ4fbGMYYce6jRGDCejd8Qlev9IOB2KRTpxqCgeL cIFXW4JMxv6dBDj1ISGm+Tr63zcawaPmv6CplUoBwBFXbQFN5/jj0gjvq8L+1o3QKW6n nswdIlpH0HA8NCJedJyqRQNS2RWxfBqv5CP9HctYWJMl1NfI0PwOV5c1MyPm6BbQH6pg k1rQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DJiY/tgKJhJy8+LIvxeHxLLKq7rqsAI2KRSR0lukesA=; b=IcM4w2Ay53rbSU/vcgUHNkksf2AJFv3x6s0WjCkF8C4lQLMfvM2Y9eBySrSPYXR1I1 TZ5TI2c1Gnhvo5kySt2OREYJWFCFiDkpzajHnohQP6jsFIHMLrhFV+HGLjsbf3g4X265 eNwit0RZLMFBkklevpPjx1tJifaMUHsJSOEUy9DuotxbNR8iKD7uUHQHMlvr/tmSvueg 9hCjp6HkCKezBTOF3qtc4hBiJru5emObu4la4uxPDx+7EyxUWrm+pUrncYXjSPC0zn2M SIJ4/KUYSEv9bvWky8t6OtOrrgUJRlCSfcSH3itNycc7dA/MD99MrwPB1nPncRC1T9B2 zhSQ== X-Gm-Message-State: AOAM532TLv/O4jt/TkRxWFOr5I7G1GXABSpH+P+FgenozGMjdV9r04of gxdvTQaHM/zpmrO3KQlA5u+Uq93FgwgUhA== X-Google-Smtp-Source: ABdhPJzKAPtj1XnPsZXkZmMmukhnjsTXRrmE6bD+5IzI9kV30rpCx7Kx1p7mVcY182on9JJlCEhvsA== X-Received: by 2002:adf:e346:0:b0:205:97d0:50db with SMTP id n6-20020adfe346000000b0020597d050dbmr3071854wrj.257.1650621887429; Fri, 22 Apr 2022 03:04:47 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 14/61] hw/intc/arm_gicv3_its: Handle virtual interrupts in process_its_cmd() Date: Fri, 22 Apr 2022 11:03:45 +0100 Message-Id: <20220422100432.2288247-15-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650623869185100001 Content-Type: text/plain; charset="utf-8" For GICv4, interrupt table entries read by process_its_cmd() may indicate virtual LPIs which are to be directly injected into a VM. Implement the ITS side of the code for handling this. This is similar to the existing handling of physical LPIs, but instead of looking up a collection ID in a collection table, we look up a vPEID in a vPE table. As with the physical LPIs, we leave the rest of the work to code in the redistributor device. The redistributor half will be implemented in a later commit; for now we just provide a stub function which does nothing. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-15-peter.maydell@linaro.org --- hw/intc/gicv3_internal.h | 17 +++++++ hw/intc/arm_gicv3_its.c | 99 +++++++++++++++++++++++++++++++++++++- hw/intc/arm_gicv3_redist.c | 9 ++++ hw/intc/trace-events | 2 + 4 files changed, 125 insertions(+), 2 deletions(-) diff --git a/hw/intc/gicv3_internal.h b/hw/intc/gicv3_internal.h index bbb8a20ce61..6e22c8072e9 100644 --- a/hw/intc/gicv3_internal.h +++ b/hw/intc/gicv3_internal.h @@ -527,6 +527,23 @@ MemTxResult gicv3_redist_write(void *opaque, hwaddr of= fset, uint64_t data, void gicv3_dist_set_irq(GICv3State *s, int irq, int level); void gicv3_redist_set_irq(GICv3CPUState *cs, int irq, int level); void gicv3_redist_process_lpi(GICv3CPUState *cs, int irq, int level); +/** + * gicv3_redist_process_vlpi: + * @cs: GICv3CPUState + * @irq: (virtual) interrupt number + * @vptaddr: (guest) address of VLPI table + * @doorbell: doorbell (physical) interrupt number (1023 for "no doorbell") + * @level: level to set @irq to + * + * Process a virtual LPI being directly injected by the ITS. This function + * will update the VLPI table specified by @vptaddr and @vptsize. If the + * vCPU corresponding to that VLPI table is currently running on + * the CPU associated with this redistributor, directly inject the VLPI + * @irq. If the vCPU is not running on this CPU, raise the doorbell + * interrupt instead. + */ +void gicv3_redist_process_vlpi(GICv3CPUState *cs, int irq, uint64_t vptadd= r, + int doorbell, int level); void gicv3_redist_lpi_pending(GICv3CPUState *cs, int irq, int level); /** * gicv3_redist_update_lpi: diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index e7e1769fa41..d2c0ca5f726 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -314,6 +314,42 @@ out: return res; } =20 +/* + * Read the vPE Table entry at index @vpeid. On success (including + * successfully determining that there is no valid entry for this index), + * we return MEMTX_OK and populate the VTEntry struct accordingly. + * If there is an error reading memory then we return the error code. + */ +static MemTxResult get_vte(GICv3ITSState *s, uint32_t vpeid, VTEntry *vte) +{ + MemTxResult res =3D MEMTX_OK; + AddressSpace *as =3D &s->gicv3->dma_as; + uint64_t entry_addr =3D table_entry_addr(s, &s->vpet, vpeid, &res); + uint64_t vteval; + + if (entry_addr =3D=3D -1) { + /* No L2 table entry, i.e. no valid VTE, or a memory error */ + vte->valid =3D false; + goto out; + } + vteval =3D address_space_ldq_le(as, entry_addr, MEMTXATTRS_UNSPECIFIED= , &res); + if (res !=3D MEMTX_OK) { + goto out; + } + vte->valid =3D FIELD_EX64(vteval, VTE, VALID); + vte->vptsize =3D FIELD_EX64(vteval, VTE, VPTSIZE); + vte->vptaddr =3D FIELD_EX64(vteval, VTE, VPTADDR); + vte->rdbase =3D FIELD_EX64(vteval, VTE, RDBASE); +out: + if (res !=3D MEMTX_OK) { + trace_gicv3_its_vte_read_fault(vpeid); + } else { + trace_gicv3_its_vte_read(vpeid, vte->valid, vte->vptsize, + vte->vptaddr, vte->rdbase); + } + return res; +} + /* * Given a (DeviceID, EventID), look up the corresponding ITE, including * checking for the various invalid-value cases. If we find a valid ITE, @@ -397,6 +433,38 @@ static ItsCmdResult lookup_cte(GICv3ITSState *s, const= char *who, return CMD_CONTINUE_OK; } =20 +/* + * Given a VPEID, look up the corresponding VTE, including checking + * for various invalid-value cases. if we find a valid VTE, fill in @vte + * and return CMD_CONTINUE_OK; otherwise return CMD_STALL or CMD_CONTINUE + * (and the contents of @vte should not be relied on). + * + * The string @who is purely for the LOG_GUEST_ERROR messages, + * and should indicate the name of the calling function or similar. + */ +static ItsCmdResult lookup_vte(GICv3ITSState *s, const char *who, + uint32_t vpeid, VTEntry *vte) +{ + if (vpeid >=3D s->vpet.num_entries) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid VPEID 0x%x\n", who, vp= eid); + return CMD_CONTINUE; + } + + if (get_vte(s, vpeid, vte) !=3D MEMTX_OK) { + return CMD_STALL; + } + if (!vte->valid) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: invalid VTE for VPEID 0x%x\n", who, vpeid); + return CMD_CONTINUE; + } + + if (vte->rdbase >=3D s->gicv3->num_cpu) { + return CMD_CONTINUE; + } + return CMD_CONTINUE_OK; +} + static ItsCmdResult process_its_cmd_phys(GICv3ITSState *s, const ITEntry *= ite, int irqlevel) { @@ -411,6 +479,33 @@ static ItsCmdResult process_its_cmd_phys(GICv3ITSState= *s, const ITEntry *ite, return CMD_CONTINUE_OK; } =20 +static ItsCmdResult process_its_cmd_virt(GICv3ITSState *s, const ITEntry *= ite, + int irqlevel) +{ + VTEntry vte; + ItsCmdResult cmdres; + + cmdres =3D lookup_vte(s, __func__, ite->vpeid, &vte); + if (cmdres !=3D CMD_CONTINUE_OK) { + return cmdres; + } + + if (!intid_in_lpi_range(ite->intid) || + ite->intid >=3D (1ULL << (vte.vptsize + 1))) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: intid 0x%x out of range\n", + __func__, ite->intid); + return CMD_CONTINUE; + } + + /* + * For QEMU the actual pending of the vLPI is handled in the + * redistributor code + */ + gicv3_redist_process_vlpi(&s->gicv3->cpu[vte.rdbase], ite->intid, + vte.vptaddr << 16, ite->doorbell, irqlevel); + return CMD_CONTINUE_OK; +} + /* * This function handles the processing of following commands based on * the ItsCmdType parameter passed:- @@ -446,8 +541,8 @@ static ItsCmdResult do_process_its_cmd(GICv3ITSState *s= , uint32_t devid, __func__, ite.inttype); return CMD_CONTINUE; } - /* The GICv4 virtual interrupt handling will go here */ - g_assert_not_reached(); + cmdres =3D process_its_cmd_virt(s, &ite, irqlevel); + break; default: g_assert_not_reached(); } diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c index dc9729e8395..b08b599c887 100644 --- a/hw/intc/arm_gicv3_redist.c +++ b/hw/intc/arm_gicv3_redist.c @@ -788,6 +788,15 @@ void gicv3_redist_movall_lpis(GICv3CPUState *src, GICv= 3CPUState *dest) gicv3_redist_update_lpi(dest); } =20 +void gicv3_redist_process_vlpi(GICv3CPUState *cs, int irq, uint64_t vptadd= r, + int doorbell, int level) +{ + /* + * The redistributor handling for being handed a VLPI by the ITS + * will be added in a subsequent commit. + */ +} + void gicv3_redist_set_irq(GICv3CPUState *cs, int irq, int level) { /* Update redistributor state for a change in an external PPI input li= ne */ diff --git a/hw/intc/trace-events b/hw/intc/trace-events index 2fcc9e40e55..d529914eca2 100644 --- a/hw/intc/trace-events +++ b/hw/intc/trace-events @@ -200,6 +200,8 @@ gicv3_its_ite_write(uint64_t ittaddr, uint32_t eventid,= int valid, int inttype, gicv3_its_dte_read(uint32_t devid, int valid, uint32_t size, uint64_t itta= ddr) "GICv3 ITS: Device Table read for DeviceID 0x%x: valid %d size 0x%x IT= Taddr 0x%" PRIx64 gicv3_its_dte_write(uint32_t devid, int valid, uint32_t size, uint64_t itt= addr) "GICv3 ITS: Device Table write for DeviceID 0x%x: valid %d size 0x%x = ITTaddr 0x%" PRIx64 gicv3_its_dte_read_fault(uint32_t devid) "GICv3 ITS: Device Table read for= DeviceID 0x%x: faulted" +gicv3_its_vte_read(uint32_t vpeid, int valid, uint32_t vptsize, uint64_t v= ptaddr, uint32_t rdbase) "GICv3 ITS: vPE Table read for vPEID 0x%x: valid %= d VPTsize 0x%x VPTaddr 0x%" PRIx64 " RDbase 0x%x" +gicv3_its_vte_read_fault(uint32_t vpeid) "GICv3 ITS: vPE Table read for vP= EID 0x%x: faulted" gicv3_its_vte_write(uint32_t vpeid, int valid, uint32_t vptsize, uint64_t = vptaddr, uint32_t rdbase) "GICv3 ITS: vPE Table write for vPEID 0x%x: valid= %d VPTsize 0x%x VPTaddr 0x%" PRIx64 " RDbase 0x%x" =20 # armv7m_nvic.c --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.04.47 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:04:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=I7pSO+EBd/yh29lG2tTeORRFQM+zqHoD6Z5G9/i+n7o=; b=otr7nirSXi4cADsvwacUJzdRJv2U2+LYilUEsCBYBMWPWj7ycSIhzwIgfigBt87pB+ +WobJwbU8xBut16okixZFS1VniaKcZb9muBOnvZeFBzJ1gsmWOEq47sbULMTQMKR87aS VYDfWrYe42n5kz3Y77UzRsUqMv9KkawrWK3wJ/GYTWpG3bpUb7eLvLDgooZ0DwFlrqQq YPF8IiAjifyvD6t82fHGxHTVR/Z+tsB9TcQhT2iqnJCRK1T3l3eC2/C2ec7nHUnzMIqI wW3aGy9v6sciS/Ev78FgpzBLlchm75J+fIzUrP35ZYLO7raGzuy3lMt9Ms8k1ZiYXLt3 TRPw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=I7pSO+EBd/yh29lG2tTeORRFQM+zqHoD6Z5G9/i+n7o=; b=INES+vwGnppKeYzba6kp7Zeyo0A3vtzpyfiMQl6VXF4KxIUKqQ3yB4meYjyq6s3aG/ KbIqbR5h3q8LIDzKWtiGHPPuz/juC2M66acoMDG18J+STHiwQzpJbt7I2FxeZbZ/Ojk9 zTr1dL4gZZL/DbsZTzplQthkIX8qGLRxpOHvl8EMP4sIIaQ09TacpwbDZ+V7TNasL5du BOt7QRDoaH9q7meFgTwYzF4xOIcJgDzu3Ks94XkEGSjBAvHLXrz9QMqtgbHK1KKOsJSa aRF9aVCnJJiP7dT5Z2xSRHXOe2xJORWoQzrkJ8iWmofkndLLxqUl5VpS3OMqC7KI4FXK gFOw== X-Gm-Message-State: AOAM531gP8HtEF0FA6kEyxEFI6fVvbDsesc8Jyu+o8IpNqT6r8MDKGBT DcMKXfdmN59bAudrCnzzJsx6acBuIdZAGA== X-Google-Smtp-Source: ABdhPJxEngKqHYQnTAPmwW4xPP2CMn7AhbPvvMuHAdQKsXVt4g7Z4gHUgUIcF6HwfAMop2pIR03ATQ== X-Received: by 2002:adf:eacf:0:b0:20a:c8c4:ac51 with SMTP id o15-20020adfeacf000000b0020ac8c4ac51mr2077086wrn.510.1650621888302; Fri, 22 Apr 2022 03:04:48 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 15/61] hw/intc/arm_gicv3: Keep pointers to every connected ITS Date: Fri, 22 Apr 2022 11:03:46 +0100 Message-Id: <20220422100432.2288247-16-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650624193194100001 Content-Type: text/plain; charset="utf-8" The GICv4 ITS VMOVP command's semantics require it to perform the operation on every ITS connected to the same GIC that the ITS that received the command is attached to. This means that the GIC object needs to keep a pointer to every ITS that is connected to it (previously it was sufficient for the ITS to have a pointer to its GIC). Add a glib ptrarray to the GICv3 object which holds pointers to every connected ITS, and make the ITS add itself to the array for the GIC it is connected to when it is realized. Note that currently all QEMU machine types with an ITS have exactly one ITS in the system, so typically the length of this ptrarray will be 1. Multiple ITSes are typically used to improve performance on real hardware, so we wouldn't need to have more than one unless we were modelling a real machine type that had multile ITSes. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-16-peter.maydell@linaro.org --- hw/intc/gicv3_internal.h | 9 +++++++++ include/hw/intc/arm_gicv3_common.h | 2 ++ hw/intc/arm_gicv3_common.c | 2 ++ hw/intc/arm_gicv3_its.c | 2 ++ hw/intc/arm_gicv3_its_kvm.c | 2 ++ 5 files changed, 17 insertions(+) diff --git a/hw/intc/gicv3_internal.h b/hw/intc/gicv3_internal.h index 6e22c8072e9..69a59daf867 100644 --- a/hw/intc/gicv3_internal.h +++ b/hw/intc/gicv3_internal.h @@ -709,4 +709,13 @@ static inline void gicv3_cache_all_target_cpustates(GI= Cv3State *s) =20 void gicv3_set_gicv3state(CPUState *cpu, GICv3CPUState *s); =20 +/* + * The ITS should call this when it is realized to add itself + * to its GIC's list of connected ITSes. + */ +static inline void gicv3_add_its(GICv3State *s, DeviceState *its) +{ + g_ptr_array_add(s->itslist, its); +} + #endif /* QEMU_ARM_GICV3_INTERNAL_H */ diff --git a/include/hw/intc/arm_gicv3_common.h b/include/hw/intc/arm_gicv3= _common.h index fc38e4b7dca..08b27789385 100644 --- a/include/hw/intc/arm_gicv3_common.h +++ b/include/hw/intc/arm_gicv3_common.h @@ -272,6 +272,8 @@ struct GICv3State { uint32_t gicd_nsacr[DIV_ROUND_UP(GICV3_MAXIRQ, 16)]; =20 GICv3CPUState *cpu; + /* List of all ITSes connected to this GIC */ + GPtrArray *itslist; }; =20 #define GICV3_BITMAP_ACCESSORS(BMP) \ diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c index c797c82786b..dcc5ce28c6a 100644 --- a/hw/intc/arm_gicv3_common.c +++ b/hw/intc/arm_gicv3_common.c @@ -414,6 +414,8 @@ static void arm_gicv3_common_realize(DeviceState *dev, = Error **errp) cpuidx +=3D s->redist_region_count[i]; s->cpu[cpuidx - 1].gicr_typer |=3D GICR_TYPER_LAST; } + + s->itslist =3D g_ptr_array_new(); } =20 static void arm_gicv3_finalize(Object *obj) diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index d2c0ca5f726..46d9e0169f9 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -1680,6 +1680,8 @@ static void gicv3_arm_its_realize(DeviceState *dev, E= rror **errp) } } =20 + gicv3_add_its(s->gicv3, dev); + gicv3_its_init_mmio(s, &gicv3_its_control_ops, &gicv3_its_translation_= ops); =20 /* set the ITS default features supported */ diff --git a/hw/intc/arm_gicv3_its_kvm.c b/hw/intc/arm_gicv3_its_kvm.c index 0b4cbed28b3..529c7bd4946 100644 --- a/hw/intc/arm_gicv3_its_kvm.c +++ b/hw/intc/arm_gicv3_its_kvm.c @@ -106,6 +106,8 @@ static void kvm_arm_its_realize(DeviceState *dev, Error= **errp) kvm_arm_register_device(&s->iomem_its_cntrl, -1, KVM_DEV_ARM_VGIC_GRP_= ADDR, KVM_VGIC_ITS_ADDR_TYPE, s->dev_fd, 0); =20 + gicv3_add_its(s->gicv3, dev); + gicv3_its_init_mmio(s, NULL, NULL); =20 if (!kvm_device_check_attr(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS, --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650624483; cv=none; d=zohomail.com; s=zohoarc; b=R5/EkeK5H6O/9/1MTXAqlS4easppKhns7MN2ROcPJ1Ixvn97SxkZQywzUG449XK3fmI943RpEJ0ACZzNvw3YfV3R1soXrKihXqiKzw25GJizxf8D3YiNs4skASfyWpblUJf2IdBpVn+kZNl2yTykS0EilE1f8IOCH56ZwE3kqmI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650624483; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.04.48 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:04:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=9JIpRBTm63udjzml/qD9iCIGqEv/JkcdC9XjAHuZkOE=; b=FFPSsRmBZe7M8PMD8ERKoAdoQlu8NOnmSPokplAgiAg/w8fzf/TAlxXRrhmz411inL keBJSx+TV8bI0Ijg/laFf/8uQXAkbxbUf9Oh62FvFul9PjjtYkiO7YCxNbW32TdCFtHi f9hv3xus06BKZF7/KSYio2fcqLsJnSjOJJW7tD3WudGOx2IV6aByR29cL/DVO6dOK9Ih dHl7aEsT+lkaYI5p6oEj1t40vMyU1JGaGsvpLDLUb84AvEduxiHecCS/OVrFl/GcmCJf jn23q+EzWl/FeOHmMUErrqJaWF2XidQXKYV1AYRnYLvpew/20dlpzcHJeEou2/OXe6i7 +Zpw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9JIpRBTm63udjzml/qD9iCIGqEv/JkcdC9XjAHuZkOE=; b=dtnlDmQ8xBH342qntCiwePc+I03fa+niO4HD66PIdzZb431JOc7I6O5ao5EHDs5MR/ ASCkXU9jw5vbiSaQ6qLRWR6Zj7qN1qbs9JumJ3YtHJz/h2jwC6QE8QrwpLEy+aBsb00B fdUhLstmDOyy5aNfYirx74r6hOV+rqQpoiBriYR22hQNlIlNMOYiIgyJz4zzqh4KDLk7 4zAPmu4rLwQo9ovcgVUnNFECLpn/DGIcQ0zG4M96dn9jthKk6pE66QuMWWaiGoCOmAvA CVuunR7lA7Y7KDtzHoUot39QLXiyUT/Ywr38nwUHsvhClxYB/pEhW+DFOo/qdD8mV209 QkqQ== X-Gm-Message-State: AOAM532cDFX3K8sHW2njPsi0N8JJjOEUGetQBV77nA4Zuwre2v+vp3vI yec/wY9LNS8bV3m5S2fzm/wSfbcQMRg0Ww== X-Google-Smtp-Source: ABdhPJxxa+gz+//SHZct2GsflPsaF98uWRItXupbFFzfVDnp2JXt8aryCVPgnAOL4BoRSlqFrH0u1Q== X-Received: by 2002:a5d:48c7:0:b0:20a:c72d:279b with SMTP id p7-20020a5d48c7000000b0020ac72d279bmr2808761wrs.379.1650621889271; Fri, 22 Apr 2022 03:04:49 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 16/61] hw/intc/arm_gicv3_its: Implement VMOVP Date: Fri, 22 Apr 2022 11:03:47 +0100 Message-Id: <20220422100432.2288247-17-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650624485401100001 Content-Type: text/plain; charset="utf-8" Implement the GICv4 VMOVP command, which updates an entry in the vPE table to change its rdbase field. This command is unique in the ITS command set because its effects must be propagated to all the other ITSes connected to the same GIC as the ITS which executes the VMOVP command. The GICv4 spec allows two implementation choices for handling the propagation to other ITSes: * If GITS_TYPER.VMOVP is 1, the guest only needs to issue the command on one ITS, and the implementation handles the propagation to all ITSes * If GITS_TYPER.VMOVP is 0, the guest must issue the command on every ITS, and arrange for the ITSes to synchronize the updates with each other by setting ITSList and Sequence Number fields in the command packets We choose the GITS_TYPER.VMOVP =3D 1 approach, and synchronously execute the update on every ITS. For GICv4.1 this command has extra fields in the command packet and additional behaviour. We define the 4.1-only fields with the FIELD macro, but only implement the GICv4.0 version of the command. Note that we don't update the reported GITS_TYPER value here; we'll do that later in a commit which updates all the reported feature bit and ID register values for GICv4. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-17-peter.maydell@linaro.org --- hw/intc/gicv3_internal.h | 18 ++++++++++ hw/intc/arm_gicv3_its.c | 75 ++++++++++++++++++++++++++++++++++++++++ hw/intc/trace-events | 1 + 3 files changed, 94 insertions(+) diff --git a/hw/intc/gicv3_internal.h b/hw/intc/gicv3_internal.h index 69a59daf867..c1467ce7263 100644 --- a/hw/intc/gicv3_internal.h +++ b/hw/intc/gicv3_internal.h @@ -329,6 +329,7 @@ FIELD(GITS_TYPER, CIL, 36, 1) #define GITS_CMD_INVALL 0x0D #define GITS_CMD_MOVALL 0x0E #define GITS_CMD_DISCARD 0x0F +#define GITS_CMD_VMOVP 0x22 #define GITS_CMD_VMAPP 0x29 #define GITS_CMD_VMAPTI 0x2A #define GITS_CMD_VMAPI 0x2B @@ -389,6 +390,14 @@ FIELD(VMAPP_2, V, 63, 1) FIELD(VMAPP_3, VPTSIZE, 0, 8) /* For GICv4.0, bits [7:6] are RES0 */ FIELD(VMAPP_3, VPTADDR, 16, 36) =20 +/* VMOVP command fields */ +FIELD(VMOVP_0, SEQNUM, 32, 16) /* not used for GITS_TYPER.VMOVP =3D=3D 1 */ +FIELD(VMOVP_1, ITSLIST, 0, 16) /* not used for GITS_TYPER.VMOVP =3D=3D 1 */ +FIELD(VMOVP_1, VPEID, 32, 16) +FIELD(VMOVP_2, RDBASE, 16, 36) +FIELD(VMOVP_2, DB, 63, 1) /* GICv4.1 only */ +FIELD(VMOVP_3, DEFAULT_DOORBELL, 0, 32) /* GICv4.1 only */ + /* * 12 bytes Interrupt translation Table Entry size * as per Table 5.3 in GICv3 spec @@ -718,4 +727,13 @@ static inline void gicv3_add_its(GICv3State *s, Device= State *its) g_ptr_array_add(s->itslist, its); } =20 +/* + * The ITS can use this for operations that must be performed on + * every ITS connected to the same GIC that it is + */ +static inline void gicv3_foreach_its(GICv3State *s, GFunc func, void *opaq= ue) +{ + g_ptr_array_foreach(s->itslist, func, opaque); +} + #endif /* QEMU_ARM_GICV3_INTERNAL_H */ diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index 46d9e0169f9..8bc93295fb5 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -1012,6 +1012,78 @@ static ItsCmdResult process_vmapp(GICv3ITSState *s, = const uint64_t *cmdpkt) return update_vte(s, vpeid, &vte) ? CMD_CONTINUE_OK : CMD_STALL; } =20 +typedef struct VmovpCallbackData { + uint64_t rdbase; + uint32_t vpeid; + /* + * Overall command result. If more than one callback finds an + * error, STALL beats CONTINUE. + */ + ItsCmdResult result; +} VmovpCallbackData; + +static void vmovp_callback(gpointer data, gpointer opaque) +{ + /* + * This function is called to update the VPEID field in a VPE + * table entry for this ITS. This might be because of a VMOVP + * command executed on any ITS that is connected to the same GIC + * as this ITS. We need to read the VPE table entry for the VPEID + * and update its RDBASE field. + */ + GICv3ITSState *s =3D data; + VmovpCallbackData *cbdata =3D opaque; + VTEntry vte; + ItsCmdResult cmdres; + + cmdres =3D lookup_vte(s, __func__, cbdata->vpeid, &vte); + switch (cmdres) { + case CMD_STALL: + cbdata->result =3D CMD_STALL; + return; + case CMD_CONTINUE: + if (cbdata->result !=3D CMD_STALL) { + cbdata->result =3D CMD_CONTINUE; + } + return; + case CMD_CONTINUE_OK: + break; + } + + vte.rdbase =3D cbdata->rdbase; + if (!update_vte(s, cbdata->vpeid, &vte)) { + cbdata->result =3D CMD_STALL; + } +} + +static ItsCmdResult process_vmovp(GICv3ITSState *s, const uint64_t *cmdpkt) +{ + VmovpCallbackData cbdata; + + if (!its_feature_virtual(s)) { + return CMD_CONTINUE; + } + + cbdata.vpeid =3D FIELD_EX64(cmdpkt[1], VMOVP_1, VPEID); + cbdata.rdbase =3D FIELD_EX64(cmdpkt[2], VMOVP_2, RDBASE); + + trace_gicv3_its_cmd_vmovp(cbdata.vpeid, cbdata.rdbase); + + if (cbdata.rdbase >=3D s->gicv3->num_cpu) { + return CMD_CONTINUE; + } + + /* + * Our ITS implementation reports GITS_TYPER.VMOVP =3D=3D 1, which mea= ns + * that when the VMOVP command is executed on an ITS to change the + * VPEID field in a VPE table entry the change must be propagated + * to all the ITSes connected to the same GIC. + */ + cbdata.result =3D CMD_CONTINUE_OK; + gicv3_foreach_its(s->gicv3, vmovp_callback, &cbdata); + return cbdata.result; +} + /* * Current implementation blocks until all * commands are processed @@ -1136,6 +1208,9 @@ static void process_cmdq(GICv3ITSState *s) case GITS_CMD_VMAPP: result =3D process_vmapp(s, cmdpkt); break; + case GITS_CMD_VMOVP: + result =3D process_vmovp(s, cmdpkt); + break; default: trace_gicv3_its_cmd_unknown(cmd); break; diff --git a/hw/intc/trace-events b/hw/intc/trace-events index d529914eca2..a2dd1bdb6c3 100644 --- a/hw/intc/trace-events +++ b/hw/intc/trace-events @@ -190,6 +190,7 @@ gicv3_its_cmd_movi(uint32_t devid, uint32_t eventid, ui= nt32_t icid) "GICv3 ITS: gicv3_its_cmd_vmapi(uint32_t devid, uint32_t eventid, uint32_t vpeid, uint= 32_t doorbell) "GICv3 ITS: command VMAPI DeviceID 0x%x EventID 0x%x vPEID 0= x%x Dbell_pINTID 0x%x" gicv3_its_cmd_vmapti(uint32_t devid, uint32_t eventid, uint32_t vpeid, uin= t32_t vintid, uint32_t doorbell) "GICv3 ITS: command VMAPI DeviceID 0x%x Ev= entID 0x%x vPEID 0x%x vINTID 0x%x Dbell_pINTID 0x%x" gicv3_its_cmd_vmapp(uint32_t vpeid, uint64_t rdbase, int valid, uint64_t v= ptaddr, uint32_t vptsize) "GICv3 ITS: command VMAPP vPEID 0x%x RDbase 0x%" = PRIx64 " V %d VPT_addr 0x%" PRIx64 " VPT_size 0x%x" +gicv3_its_cmd_vmovp(uint32_t vpeid, uint64_t rdbase) "GICv3 ITS: command V= MOVP vPEID 0x%x RDbase 0x%" PRIx64 gicv3_its_cmd_unknown(unsigned cmd) "GICv3 ITS: unknown command 0x%x" gicv3_its_cte_read(uint32_t icid, int valid, uint32_t rdbase) "GICv3 ITS: = Collection Table read for ICID 0x%x: valid %d RDBase 0x%x" gicv3_its_cte_write(uint32_t icid, int valid, uint32_t rdbase) "GICv3 ITS:= Collection Table write for ICID 0x%x: valid %d RDBase 0x%x" --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.04.49 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:04:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=bF2VxJju+9YWyEUIW0SitG+F9+86cJzwUXdO302ijVA=; b=TsNezgKtO5E0odcdgJ/9efnHdoRqShKIkrEZUfyirqxilbvHkmi9FYX3l2AfH3YoVq WCwYRWI9Pwq9k2tBqtNvL891j4n6kiXZRPVD+FAg6tLiHPAjBMqPvkLDxj1N3fpA0uK6 1IorTwa3BVxi3vCLGoziQA8XTfsQhFMShKzRs9Av17YoWSCxUkkFdNVjPz5++ZwiSKC2 8ZX8VrG4NnJfkYM9TwIKusrXTnAflv6KluaUy25Mg2Y3nDQvR4g0ILYWqIJtOBHcj17W tnoeSum8uRFy/vc/7nOP/L5yPxEaS1vYKC6LNe52uf+yM7h1S8nOx3vmJ9//pbKAZHUa ZsRw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bF2VxJju+9YWyEUIW0SitG+F9+86cJzwUXdO302ijVA=; b=UN6T8gBn1TIp2RG45xgqc9bm8so0401OY+t81T7p2P0CTR8xB9QbYvnCXoWJ5iCuok zFaM786TiV+e6+4wXTLbU12dYqnY2bD4K8wbqhmCZTHyJpPMSwcDldtrXe5VKs8rj0ug vP30rgekBa7u6ugrjoLzXmru5HGQigEy2qnPYp7Mt71yN6DqLSfOaNYvz2i3N4PWqjoV j1G/ksueTW+ZTOrzolWvA5XKOaycj/MF+hcp5hYNflk5H3248KeYjLzQl3JgW9kcDtyc n2pCyee15Vyax6Hn1qTwWGlnGUv0nohmaRoXHwvI+KDwn9mq6wY92HRX/dVZ38ZsNF/Y tR1A== X-Gm-Message-State: AOAM531lmvowG+0CmpSjZQ8vu8zO3e2FOD3SwybHI1NvNVQGSEmhNrAR yEQGZ/ukuZ1gQKOl9595lk+Jh0JbqYuoSw== X-Google-Smtp-Source: ABdhPJzkStkXNpxk3c1uB1M2myg7fUmQO8HOT5gczTI3UnwMdmaV8ymqLCYvlxf0v7vjBFVT52PnbQ== X-Received: by 2002:a5d:6e87:0:b0:206:452:5b87 with SMTP id k7-20020a5d6e87000000b0020604525b87mr2987031wrz.473.1650621889996; Fri, 22 Apr 2022 03:04:49 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 17/61] hw/intc/arm_gicv3_its: Implement VSYNC Date: Fri, 22 Apr 2022 11:03:48 +0100 Message-Id: <20220422100432.2288247-18-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650622847468100005 Content-Type: text/plain; charset="utf-8" The VSYNC command forces the ITS to synchronize all outstanding ITS operations for the specified vPEID, so that subsequent writes to GITS_TRANSLATER honour them. The QEMU implementation is always in sync, so for us this is a nop, like the existing SYNC command. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-18-peter.maydell@linaro.org --- hw/intc/gicv3_internal.h | 1 + hw/intc/arm_gicv3_its.c | 11 +++++++++++ hw/intc/trace-events | 1 + 3 files changed, 13 insertions(+) diff --git a/hw/intc/gicv3_internal.h b/hw/intc/gicv3_internal.h index c1467ce7263..ef1d75b3cf4 100644 --- a/hw/intc/gicv3_internal.h +++ b/hw/intc/gicv3_internal.h @@ -330,6 +330,7 @@ FIELD(GITS_TYPER, CIL, 36, 1) #define GITS_CMD_MOVALL 0x0E #define GITS_CMD_DISCARD 0x0F #define GITS_CMD_VMOVP 0x22 +#define GITS_CMD_VSYNC 0x25 #define GITS_CMD_VMAPP 0x29 #define GITS_CMD_VMAPTI 0x2A #define GITS_CMD_VMAPI 0x2B diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index 8bc93295fb5..a3f5bac5513 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -1165,6 +1165,17 @@ static void process_cmdq(GICv3ITSState *s) */ trace_gicv3_its_cmd_sync(); break; + case GITS_CMD_VSYNC: + /* + * VSYNC also is a nop, because our implementation is always + * in sync. + */ + if (!its_feature_virtual(s)) { + result =3D CMD_CONTINUE; + break; + } + trace_gicv3_its_cmd_vsync(); + break; case GITS_CMD_MAPD: result =3D process_mapd(s, cmdpkt); break; diff --git a/hw/intc/trace-events b/hw/intc/trace-events index a2dd1bdb6c3..b9efe14c690 100644 --- a/hw/intc/trace-events +++ b/hw/intc/trace-events @@ -191,6 +191,7 @@ gicv3_its_cmd_vmapi(uint32_t devid, uint32_t eventid, u= int32_t vpeid, uint32_t d gicv3_its_cmd_vmapti(uint32_t devid, uint32_t eventid, uint32_t vpeid, uin= t32_t vintid, uint32_t doorbell) "GICv3 ITS: command VMAPI DeviceID 0x%x Ev= entID 0x%x vPEID 0x%x vINTID 0x%x Dbell_pINTID 0x%x" gicv3_its_cmd_vmapp(uint32_t vpeid, uint64_t rdbase, int valid, uint64_t v= ptaddr, uint32_t vptsize) "GICv3 ITS: command VMAPP vPEID 0x%x RDbase 0x%" = PRIx64 " V %d VPT_addr 0x%" PRIx64 " VPT_size 0x%x" gicv3_its_cmd_vmovp(uint32_t vpeid, uint64_t rdbase) "GICv3 ITS: command V= MOVP vPEID 0x%x RDbase 0x%" PRIx64 +gicv3_its_cmd_vsync(void) "GICv3 ITS: command VSYNC" gicv3_its_cmd_unknown(unsigned cmd) "GICv3 ITS: unknown command 0x%x" gicv3_its_cte_read(uint32_t icid, int valid, uint32_t rdbase) "GICv3 ITS: = Collection Table read for ICID 0x%x: valid %d RDBase 0x%x" gicv3_its_cte_write(uint32_t icid, int valid, uint32_t rdbase) "GICv3 ITS:= Collection Table write for ICID 0x%x: valid %d RDBase 0x%x" --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650623979; cv=none; d=zohomail.com; s=zohoarc; b=FXnGlBsc7BhwOV64DQMyGriAn54dlotjwNHmgaVEpKm5wKcPPa+N0imSA2jua173MYhzCkTOrWSU85UtLlroD/4+w8Qc/gEBg3dSug2j6GhekeXwjSthks0yzcJ6F+DXg3tHPzKbnUs88Ep9UnaZK0uGRGPJzRq/gwnohFxwx00= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650623979; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=PcdPPQOjNbwfXaTfJK9YXBBIueNNQIzSTQ868HQOcpY=; b=mT9iCXFmnXzgU+fUvFu2n7+CaoS6h9UTU2G3KfC2x1WySxMUUolUjtgdsFqPY9VIqT6MFCPwYR5XvaRduBlxg94fOoei2HZskGJHZDXz/GYJJ3ehYxAfcZvhHx3jDnOA3XVHQrOFsY28NFrkiOV4ry3TCwjTetuDJPVX4x2qs4M= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650623979795428.98678660290295; Fri, 22 Apr 2022 03:39:39 -0700 (PDT) Received: from localhost ([::1]:50434 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhqhO-0007Ym-As for importer2@patchew.org; Fri, 22 Apr 2022 06:39:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58474) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhq9m-0004MJ-KD for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:54 -0400 Received: from mail-wr1-x42d.google.com ([2a00:1450:4864:20::42d]:33683) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhq9k-0002c6-JJ for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:54 -0400 Received: by mail-wr1-x42d.google.com with SMTP id x18so10355246wrc.0 for ; Fri, 22 Apr 2022 03:04:52 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.04.50 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:04:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=PcdPPQOjNbwfXaTfJK9YXBBIueNNQIzSTQ868HQOcpY=; b=L6qR13FDEhkLKu3UzcpPteU7R2IoNr6C6mNWnaNN4bfqsvN/ZA9FReKJMtnkby3mL4 8iaeBi44LWK8UB+UAAqe961EoHEYccqUuFnuTkC39A/9U2JKZoQG574dZJl/UKy2esL4 dG98we/clnuCQM/uCap/liu8LTdFvm560VqYsEbjUW2AczAYM6HRFVgPy+hERIFPFStx Y0OP6LWSoakCA+9n3JJs24INl1v94PICmg1hmPzLCI+hDhYdGa6TNNtltBR9Do/LfTZd u7v8qayUYEtX3h7sCb0lyX/LlIn3r434YuA5U+cmMMy+83JhZqeoimbzzrGBjI7yMZfh 8SWA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PcdPPQOjNbwfXaTfJK9YXBBIueNNQIzSTQ868HQOcpY=; b=KbYY8ixcdqhnjtEFcculhBIq0U3sm3c98cRniKMPYS183dg431lr30342slz7eQGzf Xgoc80gEPJKyqRHQpQpwLkl7zZcbpACAAFRo7R4XasjzgnZfIrMuIC5o87ImRkn5xstZ Jp7bX6NC00Z8WGCp0fQaoBoMgQ1fGYOAee4U+WyTMiBAAVolxo0jgvOrVRl8W7wXe8ji 85YwOTcT2eBzFZmmxxg03w4bWB3m83Y0taBTTfwHCw7spwWnzf1LQqmU5lrOBHicEvcL iPWC8DoJaJ0C8C6SAl0QxsgCp7Ed9e3CtCy/z56EbO0EU4bd1XYsa5wWt4rIZwhU05dJ 2L2Q== X-Gm-Message-State: AOAM532Cm2HwSg/zdqSVZIoeEvddProdhBWqFGWU9mv+Y/vfKlZwPbdR bcQDD7UBgniMb+dvBCEL+yBnh6hHDw992w== X-Google-Smtp-Source: ABdhPJxBZ6PkYVxBZ/wS+P46YhmI1FhntWKdQWZf/3tO28OjuaDiDBhIbnQVY7bAiyj+iJVUmkVH1w== X-Received: by 2002:a05:6000:2c5:b0:20a:9675:d26c with SMTP id o5-20020a05600002c500b0020a9675d26cmr3019749wry.185.1650621890987; Fri, 22 Apr 2022 03:04:50 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 18/61] hw/intc/arm_gicv3_its: Implement INV command properly Date: Fri, 22 Apr 2022 11:03:49 +0100 Message-Id: <20220422100432.2288247-19-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650623981723100003 Content-Type: text/plain; charset="utf-8" We were previously implementing INV (like INVALL) to just blow away cached highest-priority-pending-LPI information on all connected redistributors. For GICv4.0, this isn't going to be sufficient, because the LPI we are invalidating cached information for might be either physical or virtual, and the required action is different for those two cases. So we need to do the full process of looking up the ITE from the devid and eventid. This also means we can do the error checks that the spec lists for this command. Split out INV handling into a process_inv() function like our other command-processing functions. For the moment, stick to handling only physical LPIs; we will add the vLPI parts later. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-19-peter.maydell@linaro.org --- hw/intc/gicv3_internal.h | 12 +++++++++ hw/intc/arm_gicv3_its.c | 50 +++++++++++++++++++++++++++++++++++++- hw/intc/arm_gicv3_redist.c | 11 +++++++++ hw/intc/trace-events | 3 ++- 4 files changed, 74 insertions(+), 2 deletions(-) diff --git a/hw/intc/gicv3_internal.h b/hw/intc/gicv3_internal.h index ef1d75b3cf4..25ea19de385 100644 --- a/hw/intc/gicv3_internal.h +++ b/hw/intc/gicv3_internal.h @@ -373,6 +373,10 @@ FIELD(MOVI_0, DEVICEID, 32, 32) FIELD(MOVI_1, EVENTID, 0, 32) FIELD(MOVI_2, ICID, 0, 16) =20 +/* INV command fields */ +FIELD(INV_0, DEVICEID, 32, 32) +FIELD(INV_1, EVENTID, 0, 32) + /* VMAPI, VMAPTI command fields */ FIELD(VMAPTI_0, DEVICEID, 32, 32) FIELD(VMAPTI_1, EVENTID, 0, 32) @@ -573,6 +577,14 @@ void gicv3_redist_update_lpi(GICv3CPUState *cs); * an incoming migration has loaded new state. */ void gicv3_redist_update_lpi_only(GICv3CPUState *cs); +/** + * gicv3_redist_inv_lpi: + * @cs: GICv3CPUState + * @irq: LPI to invalidate cached information for + * + * Forget or update any cached information associated with this LPI. + */ +void gicv3_redist_inv_lpi(GICv3CPUState *cs, int irq); /** * gicv3_redist_mov_lpi: * @src: source redistributor diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index a3f5bac5513..aa0a62510e5 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -1084,6 +1084,50 @@ static ItsCmdResult process_vmovp(GICv3ITSState *s, = const uint64_t *cmdpkt) return cbdata.result; } =20 +static ItsCmdResult process_inv(GICv3ITSState *s, const uint64_t *cmdpkt) +{ + uint32_t devid, eventid; + ITEntry ite; + DTEntry dte; + CTEntry cte; + ItsCmdResult cmdres; + + devid =3D FIELD_EX64(cmdpkt[0], INV_0, DEVICEID); + eventid =3D FIELD_EX64(cmdpkt[1], INV_1, EVENTID); + + trace_gicv3_its_cmd_inv(devid, eventid); + + cmdres =3D lookup_ite(s, __func__, devid, eventid, &ite, &dte); + if (cmdres !=3D CMD_CONTINUE_OK) { + return cmdres; + } + + switch (ite.inttype) { + case ITE_INTTYPE_PHYSICAL: + cmdres =3D lookup_cte(s, __func__, ite.icid, &cte); + if (cmdres !=3D CMD_CONTINUE_OK) { + return cmdres; + } + gicv3_redist_inv_lpi(&s->gicv3->cpu[cte.rdbase], ite.intid); + break; + case ITE_INTTYPE_VIRTUAL: + if (!its_feature_virtual(s)) { + /* Can't happen unless guest is illegally writing to table mem= ory */ + qemu_log_mask(LOG_GUEST_ERROR, + "%s: invalid type %d in ITE (table corrupted?)\n= ", + __func__, ite.inttype); + return CMD_CONTINUE; + } + /* We will implement the vLPI invalidation in a later commit */ + g_assert_not_reached(); + break; + default: + g_assert_not_reached(); + } + + return CMD_CONTINUE_OK; +} + /* * Current implementation blocks until all * commands are processed @@ -1192,14 +1236,18 @@ static void process_cmdq(GICv3ITSState *s) result =3D process_its_cmd(s, cmdpkt, DISCARD); break; case GITS_CMD_INV: + result =3D process_inv(s, cmdpkt); + break; case GITS_CMD_INVALL: /* * Current implementation doesn't cache any ITS tables, * but the calculated lpi priority information. We only * need to trigger lpi priority re-calculation to be in * sync with LPI config table or pending table changes. + * INVALL operates on a collection specified by ICID so + * it only affects physical LPIs. */ - trace_gicv3_its_cmd_inv(); + trace_gicv3_its_cmd_invall(); for (i =3D 0; i < s->gicv3->num_cpu; i++) { gicv3_redist_update_lpi(&s->gicv3->cpu[i]); } diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c index b08b599c887..78650a3bb4c 100644 --- a/hw/intc/arm_gicv3_redist.c +++ b/hw/intc/arm_gicv3_redist.c @@ -681,6 +681,17 @@ void gicv3_redist_process_lpi(GICv3CPUState *cs, int i= rq, int level) gicv3_redist_lpi_pending(cs, irq, level); } =20 +void gicv3_redist_inv_lpi(GICv3CPUState *cs, int irq) +{ + /* + * The only cached information for LPIs we have is the HPPLPI. + * We could be cleverer about identifying when we don't need + * to do a full rescan of the pending table, but until we find + * this is a performance issue, just always recalculate. + */ + gicv3_redist_update_lpi(cs); +} + void gicv3_redist_mov_lpi(GICv3CPUState *src, GICv3CPUState *dest, int irq) { /* diff --git a/hw/intc/trace-events b/hw/intc/trace-events index b9efe14c690..ae4a3cfb004 100644 --- a/hw/intc/trace-events +++ b/hw/intc/trace-events @@ -184,7 +184,8 @@ gicv3_its_cmd_mapd(uint32_t devid, uint32_t size, uint6= 4_t ittaddr, int valid) " gicv3_its_cmd_mapc(uint32_t icid, uint64_t rdbase, int valid) "GICv3 ITS: = command MAPC ICID 0x%x RDbase 0x%" PRIx64 " V %d" gicv3_its_cmd_mapi(uint32_t devid, uint32_t eventid, uint32_t icid) "GICv3= ITS: command MAPI DeviceID 0x%x EventID 0x%x ICID 0x%x" gicv3_its_cmd_mapti(uint32_t devid, uint32_t eventid, uint32_t icid, uint3= 2_t intid) "GICv3 ITS: command MAPTI DeviceID 0x%x EventID 0x%x ICID 0x%x p= INTID 0x%x" -gicv3_its_cmd_inv(void) "GICv3 ITS: command INV or INVALL" +gicv3_its_cmd_inv(uint32_t devid, uint32_t eventid) "GICv3 ITS: command IN= V DeviceID 0x%x EventID 0x%x" +gicv3_its_cmd_invall(void) "GICv3 ITS: command INVALL" gicv3_its_cmd_movall(uint64_t rd1, uint64_t rd2) "GICv3 ITS: command MOVAL= L RDbase1 0x%" PRIx64 " RDbase2 0x%" PRIx64 gicv3_its_cmd_movi(uint32_t devid, uint32_t eventid, uint32_t icid) "GICv3= ITS: command MOVI DeviceID 0x%x EventID 0x%x ICID 0x%x" gicv3_its_cmd_vmapi(uint32_t devid, uint32_t eventid, uint32_t vpeid, uint= 32_t doorbell) "GICv3 ITS: command VMAPI DeviceID 0x%x EventID 0x%x vPEID 0= x%x Dbell_pINTID 0x%x" --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650623087; cv=none; d=zohomail.com; s=zohoarc; b=CC2dUaoFqho9LVyzMaQtONtMPE2aVUDDhiknzKh6xDzBTUJnr+XVYGtwVMPAd3Frpf/vbCTmtPTL+L33C6JY/KYQosw1oS7WTG7lQ3XylNY8LfVtC0VHiG1Kd9sS6nv4zU0aKRadv2c8IqIZZ7y35wxGZ41V6GwxHrBf1ghej64= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650623087; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=wi2fGPBxkZ6i5KbZuM7Jvw/j5gXrJnvmG9yJChG88LE=; b=SaFFp6a/tZjYs8OcSnUFnD0u6Q1QImIlKbD4HszLU/ibOJWaUeIy85fwEPAxEGDcxh6B+9tG1YC0z/cfDbgIPh8xGlsoyNDbYhQlOHCUSrVNEzla9jXkWsCtaEa/tktSiSfjHxRFf3E91E7ahK/iocHOIbo32qbyDcADziNQG0k= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650623087774943.2869461199213; Fri, 22 Apr 2022 03:24:47 -0700 (PDT) Received: from localhost ([::1]:33492 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhqT0-0002ZS-OR for importer2@patchew.org; Fri, 22 Apr 2022 06:24:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58478) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhq9n-0004NQ-8w for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:55 -0400 Received: from mail-wr1-x42b.google.com ([2a00:1450:4864:20::42b]:39602) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhq9l-0002cV-Gq for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:54 -0400 Received: by mail-wr1-x42b.google.com with SMTP id m14so10320308wrb.6 for ; Fri, 22 Apr 2022 03:04:52 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.04.51 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:04:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=wi2fGPBxkZ6i5KbZuM7Jvw/j5gXrJnvmG9yJChG88LE=; b=LyuES/afO9uQgr9431a6ZqVpd2IgD95wzC17/xrplFaDNpXBofL+gyVOqqzTWaJn7l 9wfLF53mUmjkTQhQKv8QMtRkcoVrnf7mV1M9p+SE1/aoHIe5vEW6UuUlJLW2W4ERdPj9 dH1sXQFXNNKSAogur2Xo1//66Tv5nsmukGkRLAjRsQfUYkewBnMrYvoY9147Jl776Vav rG8s+L2P1VxKz4R5AA6UsOyC/o79Bfzbf/hQmCd0XE/4+YefDCfBwjUOBSYi+5NW2uyI 6myAGzembiQHhL7lGjHhgizYZl3sAjLzg3s6mG6q+p3AILL3t6vcJw5+gK5lX7y8w23L wccw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=wi2fGPBxkZ6i5KbZuM7Jvw/j5gXrJnvmG9yJChG88LE=; b=sctpKIYEunazIHgIzCWmydorRZWP+buSLkcistLJJ4ZYeLmOj754CirwltHeUmkq7Z QMN1fPKMvsRayE6GDhQjVHWiUW1ov4evVwnsEClc8LwL3wF/5YyUDsAH5T8LuDvOUJQ1 E6+mSPXB+0MJqFrPy17FWtBVoxM7H9SDxB+7FK6X4S2oz81/3cC+OBFFRiN8krwD9vD5 /ycISOoQS1H1xjI+fzwv4fCt19qhltqi3Oe9lAnoTAe9VtytFoD/2CU6IPk7VZ13dQCL PQbrBjYv/tPzWkBR4m/Xeg5U57XYtDAadsUIVnI+1IFHzSd+v0IaAMyKJkkzkNCbchRw Wp/Q== X-Gm-Message-State: AOAM530TkNdF0GhxroEmIHImGhOXcr5+jF4PamcAaJsoptY46OvLnsdg lyNCoKLz/RzO9cjH4O/G3Qb40sBIyvoZEg== X-Google-Smtp-Source: ABdhPJwWROb7sVc1yP7/2nWUd/9JeORxS5J/vlFGly2Xcg8a68EsETGAsRuUF5xYvdmJF8asSSvZMA== X-Received: by 2002:a05:6000:18a8:b0:20a:8a58:1639 with SMTP id b8-20020a05600018a800b0020a8a581639mr3020545wri.483.1650621891820; Fri, 22 Apr 2022 03:04:51 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 19/61] hw/intc/arm_gicv3_its: Implement INV for virtual interrupts Date: Fri, 22 Apr 2022 11:03:50 +0100 Message-Id: <20220422100432.2288247-20-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650623088886100003 Content-Type: text/plain; charset="utf-8" Implement the ITS side of the handling of the INV command for virtual interrupts; as usual this calls into a redistributor function which we leave as a stub to fill in later. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-20-peter.maydell@linaro.org --- hw/intc/gicv3_internal.h | 9 +++++++++ hw/intc/arm_gicv3_its.c | 16 ++++++++++++++-- hw/intc/arm_gicv3_redist.c | 8 ++++++++ 3 files changed, 31 insertions(+), 2 deletions(-) diff --git a/hw/intc/gicv3_internal.h b/hw/intc/gicv3_internal.h index 25ea19de385..2f653a9b917 100644 --- a/hw/intc/gicv3_internal.h +++ b/hw/intc/gicv3_internal.h @@ -585,6 +585,15 @@ void gicv3_redist_update_lpi_only(GICv3CPUState *cs); * Forget or update any cached information associated with this LPI. */ void gicv3_redist_inv_lpi(GICv3CPUState *cs, int irq); +/** + * gicv3_redist_inv_vlpi: + * @cs: GICv3CPUState + * @irq: vLPI to invalidate cached information for + * @vptaddr: (guest) address of vLPI table + * + * Forget or update any cached information associated with this vLPI. + */ +void gicv3_redist_inv_vlpi(GICv3CPUState *cs, int irq, uint64_t vptaddr); /** * gicv3_redist_mov_lpi: * @src: source redistributor diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index aa0a62510e5..f7c01c2be19 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -1090,6 +1090,7 @@ static ItsCmdResult process_inv(GICv3ITSState *s, con= st uint64_t *cmdpkt) ITEntry ite; DTEntry dte; CTEntry cte; + VTEntry vte; ItsCmdResult cmdres; =20 devid =3D FIELD_EX64(cmdpkt[0], INV_0, DEVICEID); @@ -1118,8 +1119,19 @@ static ItsCmdResult process_inv(GICv3ITSState *s, co= nst uint64_t *cmdpkt) __func__, ite.inttype); return CMD_CONTINUE; } - /* We will implement the vLPI invalidation in a later commit */ - g_assert_not_reached(); + + cmdres =3D lookup_vte(s, __func__, ite.vpeid, &vte); + if (cmdres !=3D CMD_CONTINUE_OK) { + return cmdres; + } + if (!intid_in_lpi_range(ite.intid) || + ite.intid >=3D (1ULL << (vte.vptsize + 1))) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: intid 0x%x out of range\n", + __func__, ite.intid); + return CMD_CONTINUE; + } + gicv3_redist_inv_vlpi(&s->gicv3->cpu[vte.rdbase], ite.intid, + vte.vptaddr << 16); break; default: g_assert_not_reached(); diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c index 78650a3bb4c..856494b4e8f 100644 --- a/hw/intc/arm_gicv3_redist.c +++ b/hw/intc/arm_gicv3_redist.c @@ -808,6 +808,14 @@ void gicv3_redist_process_vlpi(GICv3CPUState *cs, int = irq, uint64_t vptaddr, */ } =20 +void gicv3_redist_inv_vlpi(GICv3CPUState *cs, int irq, uint64_t vptaddr) +{ + /* + * The redistributor handling for invalidating cached information + * about a VLPI will be added in a subsequent commit. + */ +} + void gicv3_redist_set_irq(GICv3CPUState *cs, int irq, int level) { /* Update redistributor state for a change in an external PPI input li= ne */ --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.04.51 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:04:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=8RgWYhgKur6Ax4yz2dzmYZrqxwZTXpBGbv3xdnrc6bE=; b=VlnFJ792NRBN7jywmFqgn8v6wunMHPCXHCPmHCsLGBjzOeSN8O/ne3B4ZOyW9FBSpc flw3j8RDgcNK0lyZ7yd7bvvhdKKLEJCECN26fxE0j2I/b6DLF/J0Cgae/xrs5w3Abeiz 7iOl4Nfd+k+o9QEz8c9mT3zyeIGu31WObvMW/U2tqr5+mngSCdgUC/dlMMunM16tVv52 /Qkhlhb9tD2d64TgIGBfISWhirHMBGbWixtXlboHSNdVG/ni24v6AnNm+rvUQSNdkZBn Da3fv06xI0vK5H5zbjIuB4SZfIsmk91UqKf13UYctoNxYhewTEdr0cV6Kt3cOjaPBVNb BkOA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=8RgWYhgKur6Ax4yz2dzmYZrqxwZTXpBGbv3xdnrc6bE=; b=wTfdqT3UuDfUmjeBZkF/UHm70jB6cRyCD9Cf0drjkQbXPcqLOvwVcNz7aF32KApT1j pyBqXZQ2VOAp9eOpFhSqkrC07JvYx6PAsZFVs5x8YWzJ+9lejc+PNT32Tyr5fXx6zvfP R3B9+rOYSIIeay7Pe/Xzz/YmkRkr+mulTPyBQMgLyilMMCfMFznDc0otdoKtR1CQWmJG Js5eQd9OqaJrrJnpZpBRB7PWchuBkUtJV9Oa4kspxqL+7022IU0kT+iLPbdlQrz49LDs qHwRpkJioliXT89+dh+eR4wDnlKTPWCVgRuREqwoG1fcepLIJ9m70it1ChspB3njTWVp g6yQ== X-Gm-Message-State: AOAM531mbcbwVkIngI0BXuXmKz+7ccHjx97mGWLR6MzWOtU1y2M/agZa GiYc16vrBnB+1WmXGXakAd6w8DRVgUqGuA== X-Google-Smtp-Source: ABdhPJzFfjGsaIv+Tx2uNLV53sVzVlt+s6wRdh/0x9SdVrNHlDzxTiFKUDQ9rRfnS8kRKZ2HaOsk0w== X-Received: by 2002:a05:600c:a06:b0:392:a4f2:2097 with SMTP id z6-20020a05600c0a0600b00392a4f22097mr12706179wmp.97.1650621892808; Fri, 22 Apr 2022 03:04:52 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 20/61] hw/intc/arm_gicv3_its: Implement VMOVI Date: Fri, 22 Apr 2022 11:03:51 +0100 Message-Id: <20220422100432.2288247-21-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650624265563100001 Content-Type: text/plain; charset="utf-8" Implement the GICv4 VMOVI command, which moves the pending state of a virtual interrupt from one redistributor to another. As with MOVI, we handle the "parse and validate command arguments and table lookups" part in the ITS source file, and pass the final results to a function in the redistributor which will do the actual operation. As with the "make a VLPI pending" change, for the moment we leave that redistributor function as a stub, to be implemented in a later commit. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-21-peter.maydell@linaro.org --- hw/intc/gicv3_internal.h | 23 +++++++++++ hw/intc/arm_gicv3_its.c | 82 ++++++++++++++++++++++++++++++++++++++ hw/intc/arm_gicv3_redist.c | 10 +++++ hw/intc/trace-events | 1 + 4 files changed, 116 insertions(+) diff --git a/hw/intc/gicv3_internal.h b/hw/intc/gicv3_internal.h index 2f653a9b917..050e19d133b 100644 --- a/hw/intc/gicv3_internal.h +++ b/hw/intc/gicv3_internal.h @@ -329,6 +329,7 @@ FIELD(GITS_TYPER, CIL, 36, 1) #define GITS_CMD_INVALL 0x0D #define GITS_CMD_MOVALL 0x0E #define GITS_CMD_DISCARD 0x0F +#define GITS_CMD_VMOVI 0x21 #define GITS_CMD_VMOVP 0x22 #define GITS_CMD_VSYNC 0x25 #define GITS_CMD_VMAPP 0x29 @@ -403,6 +404,13 @@ FIELD(VMOVP_2, RDBASE, 16, 36) FIELD(VMOVP_2, DB, 63, 1) /* GICv4.1 only */ FIELD(VMOVP_3, DEFAULT_DOORBELL, 0, 32) /* GICv4.1 only */ =20 +/* VMOVI command fields */ +FIELD(VMOVI_0, DEVICEID, 32, 32) +FIELD(VMOVI_1, EVENTID, 0, 32) +FIELD(VMOVI_1, VPEID, 32, 16) +FIELD(VMOVI_2, D, 0, 1) +FIELD(VMOVI_2, DOORBELL, 32, 32) + /* * 12 bytes Interrupt translation Table Entry size * as per Table 5.3 in GICv3 spec @@ -614,6 +622,21 @@ void gicv3_redist_mov_lpi(GICv3CPUState *src, GICv3CPU= State *dest, int irq); * by the ITS MOVALL command. */ void gicv3_redist_movall_lpis(GICv3CPUState *src, GICv3CPUState *dest); +/** + * gicv3_redist_mov_vlpi: + * @src: source redistributor + * @src_vptaddr: (guest) address of source VLPI table + * @dest: destination redistributor + * @dest_vptaddr: (guest) address of destination VLPI table + * @irq: VLPI to update + * @doorbell: doorbell for destination (1023 for "no doorbell") + * + * Move the pending state of the specified VLPI from @src to @dest, + * as required by the ITS VMOVI command. + */ +void gicv3_redist_mov_vlpi(GICv3CPUState *src, uint64_t src_vptaddr, + GICv3CPUState *dest, uint64_t dest_vptaddr, + int irq, int doorbell); =20 void gicv3_redist_send_sgi(GICv3CPUState *cs, int grp, int irq, bool ns); void gicv3_init_cpuif(GICv3State *s); diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index f7c01c2be19..c718ef2ff92 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -1084,6 +1084,85 @@ static ItsCmdResult process_vmovp(GICv3ITSState *s, = const uint64_t *cmdpkt) return cbdata.result; } =20 +static ItsCmdResult process_vmovi(GICv3ITSState *s, const uint64_t *cmdpkt) +{ + uint32_t devid, eventid, vpeid, doorbell; + bool doorbell_valid; + DTEntry dte; + ITEntry ite; + VTEntry old_vte, new_vte; + ItsCmdResult cmdres; + + if (!its_feature_virtual(s)) { + return CMD_CONTINUE; + } + + devid =3D FIELD_EX64(cmdpkt[0], VMOVI_0, DEVICEID); + eventid =3D FIELD_EX64(cmdpkt[1], VMOVI_1, EVENTID); + vpeid =3D FIELD_EX64(cmdpkt[1], VMOVI_1, VPEID); + doorbell_valid =3D FIELD_EX64(cmdpkt[2], VMOVI_2, D); + doorbell =3D FIELD_EX64(cmdpkt[2], VMOVI_2, DOORBELL); + + trace_gicv3_its_cmd_vmovi(devid, eventid, vpeid, doorbell_valid, doorb= ell); + + if (doorbell_valid && !valid_doorbell(doorbell)) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: invalid doorbell 0x%x\n", __func__, doorbell); + return CMD_CONTINUE; + } + + cmdres =3D lookup_ite(s, __func__, devid, eventid, &ite, &dte); + if (cmdres !=3D CMD_CONTINUE_OK) { + return cmdres; + } + + if (ite.inttype !=3D ITE_INTTYPE_VIRTUAL) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: ITE is not for virtual interru= pt\n", + __func__); + return CMD_CONTINUE; + } + + cmdres =3D lookup_vte(s, __func__, ite.vpeid, &old_vte); + if (cmdres !=3D CMD_CONTINUE_OK) { + return cmdres; + } + cmdres =3D lookup_vte(s, __func__, vpeid, &new_vte); + if (cmdres !=3D CMD_CONTINUE_OK) { + return cmdres; + } + + if (!intid_in_lpi_range(ite.intid) || + ite.intid >=3D (1ULL << (old_vte.vptsize + 1)) || + ite.intid >=3D (1ULL << (new_vte.vptsize + 1))) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: ITE intid 0x%x out of range\n", + __func__, ite.intid); + return CMD_CONTINUE; + } + + ite.vpeid =3D vpeid; + if (doorbell_valid) { + ite.doorbell =3D doorbell; + } + + /* + * Move the LPI from the old redistributor to the new one. We don't + * need to do anything if the guest somehow specified the + * same pending table for source and destination. + */ + if (old_vte.vptaddr !=3D new_vte.vptaddr) { + gicv3_redist_mov_vlpi(&s->gicv3->cpu[old_vte.rdbase], + old_vte.vptaddr << 16, + &s->gicv3->cpu[new_vte.rdbase], + new_vte.vptaddr << 16, + ite.intid, + ite.doorbell); + } + + /* Update the ITE to the new VPEID and possibly doorbell values */ + return update_ite(s, eventid, &dte, &ite) ? CMD_CONTINUE_OK : CMD_STAL= L; +} + static ItsCmdResult process_inv(GICv3ITSState *s, const uint64_t *cmdpkt) { uint32_t devid, eventid; @@ -1282,6 +1361,9 @@ static void process_cmdq(GICv3ITSState *s) case GITS_CMD_VMOVP: result =3D process_vmovp(s, cmdpkt); break; + case GITS_CMD_VMOVI: + result =3D process_vmovi(s, cmdpkt); + break; default: trace_gicv3_its_cmd_unknown(cmd); break; diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c index 856494b4e8f..dc25997d1f9 100644 --- a/hw/intc/arm_gicv3_redist.c +++ b/hw/intc/arm_gicv3_redist.c @@ -808,6 +808,16 @@ void gicv3_redist_process_vlpi(GICv3CPUState *cs, int = irq, uint64_t vptaddr, */ } =20 +void gicv3_redist_mov_vlpi(GICv3CPUState *src, uint64_t src_vptaddr, + GICv3CPUState *dest, uint64_t dest_vptaddr, + int irq, int doorbell) +{ + /* + * The redistributor handling for moving a VLPI will be added + * in a subsequent commit. + */ +} + void gicv3_redist_inv_vlpi(GICv3CPUState *cs, int irq, uint64_t vptaddr) { /* diff --git a/hw/intc/trace-events b/hw/intc/trace-events index ae4a3cfb004..9894756e55a 100644 --- a/hw/intc/trace-events +++ b/hw/intc/trace-events @@ -193,6 +193,7 @@ gicv3_its_cmd_vmapti(uint32_t devid, uint32_t eventid, = uint32_t vpeid, uint32_t gicv3_its_cmd_vmapp(uint32_t vpeid, uint64_t rdbase, int valid, uint64_t v= ptaddr, uint32_t vptsize) "GICv3 ITS: command VMAPP vPEID 0x%x RDbase 0x%" = PRIx64 " V %d VPT_addr 0x%" PRIx64 " VPT_size 0x%x" gicv3_its_cmd_vmovp(uint32_t vpeid, uint64_t rdbase) "GICv3 ITS: command V= MOVP vPEID 0x%x RDbase 0x%" PRIx64 gicv3_its_cmd_vsync(void) "GICv3 ITS: command VSYNC" +gicv3_its_cmd_vmovi(uint32_t devid, uint32_t eventid, uint32_t vpeid, int= dbvalid, uint32_t doorbell) "GICv3 ITS: command VMOVI DeviceID 0x%x EventI= D 0x%x vPEID 0x%x D %d Dbell_pINTID 0x%x" gicv3_its_cmd_unknown(unsigned cmd) "GICv3 ITS: unknown command 0x%x" gicv3_its_cte_read(uint32_t icid, int valid, uint32_t rdbase) "GICv3 ITS: = Collection Table read for ICID 0x%x: valid %d RDBase 0x%x" gicv3_its_cte_write(uint32_t icid, int valid, uint32_t rdbase) "GICv3 ITS:= Collection Table write for ICID 0x%x: valid %d RDBase 0x%x" --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650624805; cv=none; d=zohomail.com; s=zohoarc; b=PShHM/ynEHgc4fvAu+07xsQpOofPacCSPzLKoeDqSew9HSVCELMvrxtqkF3Sr5B7HdtCdC28yzp+iNMaeXnCQFMl+rF8J026HuVQDrFMmj32FtMf1jcnjMviYEI9K47qAqkuGzRtMsMHzkAAxYWV0tpjeEz+jPl6Dio7UIKuwTQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650624805; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=WIST8kjiIGq+L/1mU+YgaPeTPxejflCj2X2BV/ommNc=; b=kUHIjehGbXIfuHIrho+mdU/mgV7KMiYjgC5k7N6OP4E5kE3SqN0qpxFfZ2FkY9XkZ8wSwG/1CJ1PNN92Bq/AkmcMpEQWbksAaOdLDbi7+LpkLecQz+uSP0EC2L0FxdgvSImVa9oql3ompHUkbGRqSFHyhpRL7J2z6E7xTdR6/Gk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650624805894248.57872178172954; Fri, 22 Apr 2022 03:53:25 -0700 (PDT) Received: from localhost ([::1]:45056 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhqui-0001v7-DP for importer2@patchew.org; Fri, 22 Apr 2022 06:53:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58516) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhq9p-0004TQ-2i for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:57 -0400 Received: from mail-wm1-x32e.google.com ([2a00:1450:4864:20::32e]:51054) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhq9n-0002cr-96 for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:56 -0400 Received: by mail-wm1-x32e.google.com with SMTP id r19so4805219wmq.0 for ; Fri, 22 Apr 2022 03:04:54 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.04.52 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:04:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=WIST8kjiIGq+L/1mU+YgaPeTPxejflCj2X2BV/ommNc=; b=eUabf6FYm6XHFWyEhI8QYYDKGptEjsdraJtgoiqkwExudh04nhCbR1EONTSxQ48sHM bVHE+VcTvAIZTkYwFNjFED5hjND/rLbqMnMLeis12B8FQiAmJ2b7Dnku/0xXcT0hoDmD SFeFpYjsmd+8Bjll1mfOqJvcZTCjnPqefR8OZ3Vlvejb9rULwCiFScc+EzAXgn9JjcBF crycMaVvZGDepjFUereq2aKVnpzVDSajGXkHhTAnm4vMUx/Xwl8QOb2JejT49PhFAMx/ EfxKEi+10syD2I3F9yIm3yWCxL5J31ElW24qrnn8TIcIsWKUSRPLWDrtTxKMsmqG8sx2 /s1w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=WIST8kjiIGq+L/1mU+YgaPeTPxejflCj2X2BV/ommNc=; b=TtUXMkkhoZDgsHZxpFP3bCJMNov2JkVMoK/JbSmeVF8QUth50z7dMqdm+4nZCJdNf8 onOvF2FwvDmfgXAz/Uiyhpa3yTDPmio2dnpVXPw3M0IBImPusmomVFG5IOEaYLvzjFqI +vPJLvSxNCH7e+ymxYIflbdtIWDQ79uQ0F515VtpvptJWZ9VwyVFChcmwkGcF5RLkGM7 Py+fQRiT57a3cv97SpIEovXTbCIFmivxC2T72OaD/qAaSsCmIaxI4TgQyyyTDUe+B40Q Pab+Ir4OWVBXzOiQnn/Y8h425UA6DLzIAgyIActDycJ28lmgCz2qTJYGcvhfc/qbYOMt mgng== X-Gm-Message-State: AOAM531WfMxDsRWXpvO4Q7hwdI3AjJtbO6PUvlI5Tiwphd0D7KeAE0H9 yppeq1vZbx9FmYQdMXuaxHpn78WbVdvO0A== X-Google-Smtp-Source: ABdhPJzY5fN+GqbtLXdfhpoXBjjTq3b4nXtfl5hAnApRwqASWuw06dmsJ/0/w4Z8i8JokGa8jislSQ== X-Received: by 2002:a05:600c:1e85:b0:391:ca59:76be with SMTP id be5-20020a05600c1e8500b00391ca5976bemr12411734wmb.184.1650621893686; Fri, 22 Apr 2022 03:04:53 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 21/61] hw/intc/arm_gicv3_its: Implement VINVALL Date: Fri, 22 Apr 2022 11:03:52 +0100 Message-Id: <20220422100432.2288247-22-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650624807158100001 Content-Type: text/plain; charset="utf-8" The VINVALL command should cause any cached information in the ITS or redistributor for the specified vCPU to be dropped or otherwise made consistent with the in-memory LPI configuration tables. Here we implement the command and table parsing, leaving the redistributor part as a stub for the moment, as usual. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-22-peter.maydell@linaro.org --- hw/intc/gicv3_internal.h | 13 +++++++++++++ hw/intc/arm_gicv3_its.c | 26 ++++++++++++++++++++++++++ hw/intc/arm_gicv3_redist.c | 5 +++++ hw/intc/trace-events | 1 + 4 files changed, 45 insertions(+) diff --git a/hw/intc/gicv3_internal.h b/hw/intc/gicv3_internal.h index 050e19d133b..8d58d38836f 100644 --- a/hw/intc/gicv3_internal.h +++ b/hw/intc/gicv3_internal.h @@ -335,6 +335,7 @@ FIELD(GITS_TYPER, CIL, 36, 1) #define GITS_CMD_VMAPP 0x29 #define GITS_CMD_VMAPTI 0x2A #define GITS_CMD_VMAPI 0x2B +#define GITS_CMD_VINVALL 0x2D =20 /* MAPC command fields */ #define ICID_LENGTH 16 @@ -411,6 +412,9 @@ FIELD(VMOVI_1, VPEID, 32, 16) FIELD(VMOVI_2, D, 0, 1) FIELD(VMOVI_2, DOORBELL, 32, 32) =20 +/* VINVALL command fields */ +FIELD(VINVALL_1, VPEID, 32, 16) + /* * 12 bytes Interrupt translation Table Entry size * as per Table 5.3 in GICv3 spec @@ -637,6 +641,15 @@ void gicv3_redist_movall_lpis(GICv3CPUState *src, GICv= 3CPUState *dest); void gicv3_redist_mov_vlpi(GICv3CPUState *src, uint64_t src_vptaddr, GICv3CPUState *dest, uint64_t dest_vptaddr, int irq, int doorbell); +/** + * gicv3_redist_vinvall: + * @cs: GICv3CPUState + * @vptaddr: address of VLPI pending table + * + * On redistributor @cs, invalidate all cached information associated + * with the vCPU defined by @vptaddr. + */ +void gicv3_redist_vinvall(GICv3CPUState *cs, uint64_t vptaddr); =20 void gicv3_redist_send_sgi(GICv3CPUState *cs, int grp, int irq, bool ns); void gicv3_init_cpuif(GICv3State *s); diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index c718ef2ff92..0670aca4d46 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -1163,6 +1163,29 @@ static ItsCmdResult process_vmovi(GICv3ITSState *s, = const uint64_t *cmdpkt) return update_ite(s, eventid, &dte, &ite) ? CMD_CONTINUE_OK : CMD_STAL= L; } =20 +static ItsCmdResult process_vinvall(GICv3ITSState *s, const uint64_t *cmdp= kt) +{ + VTEntry vte; + uint32_t vpeid; + ItsCmdResult cmdres; + + if (!its_feature_virtual(s)) { + return CMD_CONTINUE; + } + + vpeid =3D FIELD_EX64(cmdpkt[1], VINVALL_1, VPEID); + + trace_gicv3_its_cmd_vinvall(vpeid); + + cmdres =3D lookup_vte(s, __func__, vpeid, &vte); + if (cmdres !=3D CMD_CONTINUE_OK) { + return cmdres; + } + + gicv3_redist_vinvall(&s->gicv3->cpu[vte.rdbase], vte.vptaddr << 16); + return CMD_CONTINUE_OK; +} + static ItsCmdResult process_inv(GICv3ITSState *s, const uint64_t *cmdpkt) { uint32_t devid, eventid; @@ -1364,6 +1387,9 @@ static void process_cmdq(GICv3ITSState *s) case GITS_CMD_VMOVI: result =3D process_vmovi(s, cmdpkt); break; + case GITS_CMD_VINVALL: + result =3D process_vinvall(s, cmdpkt); + break; default: trace_gicv3_its_cmd_unknown(cmd); break; diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c index dc25997d1f9..7c75dd6f072 100644 --- a/hw/intc/arm_gicv3_redist.c +++ b/hw/intc/arm_gicv3_redist.c @@ -818,6 +818,11 @@ void gicv3_redist_mov_vlpi(GICv3CPUState *src, uint64_= t src_vptaddr, */ } =20 +void gicv3_redist_vinvall(GICv3CPUState *cs, uint64_t vptaddr) +{ + /* The redistributor handling will be added in a subsequent commit */ +} + void gicv3_redist_inv_vlpi(GICv3CPUState *cs, int irq, uint64_t vptaddr) { /* diff --git a/hw/intc/trace-events b/hw/intc/trace-events index 9894756e55a..004a1006fb8 100644 --- a/hw/intc/trace-events +++ b/hw/intc/trace-events @@ -194,6 +194,7 @@ gicv3_its_cmd_vmapp(uint32_t vpeid, uint64_t rdbase, in= t valid, uint64_t vptaddr gicv3_its_cmd_vmovp(uint32_t vpeid, uint64_t rdbase) "GICv3 ITS: command V= MOVP vPEID 0x%x RDbase 0x%" PRIx64 gicv3_its_cmd_vsync(void) "GICv3 ITS: command VSYNC" gicv3_its_cmd_vmovi(uint32_t devid, uint32_t eventid, uint32_t vpeid, int= dbvalid, uint32_t doorbell) "GICv3 ITS: command VMOVI DeviceID 0x%x EventI= D 0x%x vPEID 0x%x D %d Dbell_pINTID 0x%x" +gicv3_its_cmd_vinvall(uint32_t vpeid) "GICv3 ITS: command VINVALL vPEID 0x= %x" gicv3_its_cmd_unknown(unsigned cmd) "GICv3 ITS: unknown command 0x%x" gicv3_its_cte_read(uint32_t icid, int valid, uint32_t rdbase) "GICv3 ITS: = Collection Table read for ICID 0x%x: valid %d RDBase 0x%x" gicv3_its_cte_write(uint32_t icid, int valid, uint32_t rdbase) "GICv3 ITS:= Collection Table write for ICID 0x%x: valid %d RDBase 0x%x" --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650625057; cv=none; d=zohomail.com; s=zohoarc; b=UDmo5LnyiGgDZHZlcq3VYBxKezs8u8QzoyAZnsPiuTbhPdLGIjd9c+FfSaw2t4HuX0B8nFkZBMpcrPiIDVgPjAqJ5u3B8k7fd+yjaKx6El2SWvDQVaJ43fndKrDyg9Z41JUgUbWcOA/bTCh1csnUC8dH/vGYNL6IUMxzlXM2P0s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650625057; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=c0yHcR8YX+80NnBGhmsGm2fxQhfDVLS6/G8Kbm/Fj84=; b=X7dwgyygc/CMetF+eSDxubIr9KlZhYAbEPGByRJICj65LgZuVwREJzeC2OYMbkpkN2Bpj6V+F7NxMaO8/P1pK8z3jVhOOVaKoA6jthoNMJUyFVpW6unfo6dSvB1CRlRI8+qRzaNNNzlKTRTkGwrnoghKeOJDEdWVY3kLPH/NJ7M= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650625057572740.9651490152946; Fri, 22 Apr 2022 03:57:37 -0700 (PDT) Received: from localhost ([::1]:53464 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhqym-00008e-Ex for importer2@patchew.org; Fri, 22 Apr 2022 06:57:36 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58550) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhq9q-0004YZ-L2 for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:58 -0400 Received: from mail-wr1-x429.google.com ([2a00:1450:4864:20::429]:43560) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhq9o-0002dR-MU for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:58 -0400 Received: by mail-wr1-x429.google.com with SMTP id v12so3513643wrv.10 for ; Fri, 22 Apr 2022 03:04:56 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.04.53 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:04:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=c0yHcR8YX+80NnBGhmsGm2fxQhfDVLS6/G8Kbm/Fj84=; b=tmTTrwiJbvK+gh7yf6bmS+eWH7jbBLcE5UujWpp5n1q2LtZ4QS0bEuJZeaUutsa4ym 6dWpDnOBSlSz0LFluZNY6qYETWG6nWKmz9S/Fk1+lTGHn3iNcweTSXTvJUBT1ZTX3FWM s7LlzqFAneGxWPIXx2WTQGt6soqEXBnvDZzw7hprQz2PAgyKYdjlYKJ9CYlqBWzIUTi9 NzT6GE38eOciasEgNYeKXANLALI5ci9EQwOyCjVEJhECTENwVK9PQ0QA0ahnqRRiht+N eSnzQInJb1WFFMFZMd0VBui/UbZ1xxyPFfVZPBRsiTkcVwV/oGz6x3BRleE3Wv21y83D K4AQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=c0yHcR8YX+80NnBGhmsGm2fxQhfDVLS6/G8Kbm/Fj84=; b=0QT+1O9IsSaaMTqKc522ZiXTeKLJTGtyIRFT8GKIhDgdcyIuxpbY1o20dXGZ8XVlxy XhrAcq3vrUz9c/jaTzZk5L1SQ49UdRnHEbAwsZsFMxDHVLQOvcrAAdLF9fhUSExpftCn 49NkcsjrM0c8aOn2tb69QeEYxke4MJrEAKyOg9HjId3cncUfHkR6zruxhCO8uvemvtxk 9tESbNZRvETrjpQB9uuGcXj2biwx8+UXzZb6UCuVPgW3eVZtLVsH6/dkMX6vMpOh7wa2 XZdxNGC65ajmAHMa9jsrqc2gAEt000a+aLcNbtypq681V07CoybsetRH/CyE65yFMdnP n9CQ== X-Gm-Message-State: AOAM533M80D/NMb6GXOFYLsDCPr0lmqg2bK+MyV/BOIxDCLoAmledkTR I+gSF6VKHtEmG42Wy986bCTtF5DDRkiHKQ== X-Google-Smtp-Source: ABdhPJyaFqpI9J/zWTtKTwsJ9PBLe9T+/poYfkCLQoAKxjepUcQlytGmHEJ/Z68q0U/ES6iwylCrWw== X-Received: by 2002:adf:d1ce:0:b0:20a:992a:3b54 with SMTP id b14-20020adfd1ce000000b0020a992a3b54mr3005173wrd.270.1650621894704; Fri, 22 Apr 2022 03:04:54 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 22/61] hw/intc/arm_gicv3: Implement GICv4's new redistributor frame Date: Fri, 22 Apr 2022 11:03:53 +0100 Message-Id: <20220422100432.2288247-23-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650625058084100001 Content-Type: text/plain; charset="utf-8" The GICv4 extends the redistributor register map -- where GICv3 had two 64KB frames per CPU, GICv4 has four frames. Add support for the extra frame by using a new gicv3_redist_size() function in the places in the GIC implementation which currently use a fixed constant size for the redistributor register block. (Until we implement the extra registers they will RAZ/WI.) Any board that wants to use a GICv4 will need to also adjust to handle the different sized redistributor register block; that will be done separately. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-23-peter.maydell@linaro.org --- hw/intc/gicv3_internal.h | 21 +++++++++++++++++++++ include/hw/intc/arm_gicv3_common.h | 5 +++++ hw/intc/arm_gicv3_common.c | 2 +- hw/intc/arm_gicv3_redist.c | 8 ++++---- 4 files changed, 31 insertions(+), 5 deletions(-) diff --git a/hw/intc/gicv3_internal.h b/hw/intc/gicv3_internal.h index 8d58d38836f..9720ccf7507 100644 --- a/hw/intc/gicv3_internal.h +++ b/hw/intc/gicv3_internal.h @@ -489,6 +489,27 @@ FIELD(VTE, RDBASE, 42, RDBASE_PROCNUM_LENGTH) =20 /* Functions internal to the emulated GICv3 */ =20 +/** + * gicv3_redist_size: + * @s: GICv3State + * + * Return the size of the redistributor register frame in bytes + * (which depends on what GIC version this is) + */ +static inline int gicv3_redist_size(GICv3State *s) +{ + /* + * Redistributor size is controlled by the redistributor GICR_TYPER.VL= PIS. + * It's the same for every redistributor in the GIC, so arbitrarily + * use the register field in the first one. + */ + if (s->cpu[0].gicr_typer & GICR_TYPER_VLPIS) { + return GICV4_REDIST_SIZE; + } else { + return GICV3_REDIST_SIZE; + } +} + /** * gicv3_intid_is_special: * @intid: interrupt ID diff --git a/include/hw/intc/arm_gicv3_common.h b/include/hw/intc/arm_gicv3= _common.h index 08b27789385..40bc404a652 100644 --- a/include/hw/intc/arm_gicv3_common.h +++ b/include/hw/intc/arm_gicv3_common.h @@ -38,7 +38,12 @@ =20 #define GICV3_LPI_INTID_START 8192 =20 +/* + * The redistributor in GICv3 has two 64KB frames per CPU; in + * GICv4 it has four 64KB frames per CPU. + */ #define GICV3_REDIST_SIZE 0x20000 +#define GICV4_REDIST_SIZE 0x40000 =20 /* Number of SGI target-list bits */ #define GICV3_TARGETLIST_BITS 16 diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c index dcc5ce28c6a..18999e3c8bb 100644 --- a/hw/intc/arm_gicv3_common.c +++ b/hw/intc/arm_gicv3_common.c @@ -295,7 +295,7 @@ void gicv3_init_irqs_and_mmio(GICv3State *s, qemu_irq_h= andler handler, =20 memory_region_init_io(®ion->iomem, OBJECT(s), ops ? &ops[1] : NULL, region, name, - s->redist_region_count[i] * GICV3_REDIST_SIZ= E); + s->redist_region_count[i] * gicv3_redist_siz= e(s)); sysbus_init_mmio(sbd, ®ion->iomem); g_free(name); } diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c index 7c75dd6f072..9f1fe09a78e 100644 --- a/hw/intc/arm_gicv3_redist.c +++ b/hw/intc/arm_gicv3_redist.c @@ -442,8 +442,8 @@ MemTxResult gicv3_redist_read(void *opaque, hwaddr offs= et, uint64_t *data, * in the memory map); if so then the GIC has multiple MemoryRegions * for the redistributors. */ - cpuidx =3D region->cpuidx + offset / GICV3_REDIST_SIZE; - offset %=3D GICV3_REDIST_SIZE; + cpuidx =3D region->cpuidx + offset / gicv3_redist_size(s); + offset %=3D gicv3_redist_size(s); =20 cs =3D &s->cpu[cpuidx]; =20 @@ -501,8 +501,8 @@ MemTxResult gicv3_redist_write(void *opaque, hwaddr off= set, uint64_t data, * in the memory map); if so then the GIC has multiple MemoryRegions * for the redistributors. */ - cpuidx =3D region->cpuidx + offset / GICV3_REDIST_SIZE; - offset %=3D GICV3_REDIST_SIZE; + cpuidx =3D region->cpuidx + offset / gicv3_redist_size(s); + offset %=3D gicv3_redist_size(s); =20 cs =3D &s->cpu[cpuidx]; =20 --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650625264; cv=none; d=zohomail.com; s=zohoarc; b=Nvl4SI9X3gnbtiFOGDJoDH9nep4xSkUM6oEyfgxbKUhYvxtmlJEbSEZ07+Us+DxTAFn6pGY7JALYiZ/NKTics4cxy4HuF7Un0nrHWmCfgayrtlbP7crUgE+NzLVUFMUkxqFLCR48XTdGh3zD8aqTg3ROTpQ2meywlogAa608GVY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650625264; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=SsmXZg+uwjL7FCu6QoUQXU4qkVe/XwjPaQqP4D8bLQU=; b=GZprJoR4o0YpuqQYz+O0VGhlWxou5RWjShsH2wc/ivDNwzheF75hIH4OAZilfdrrq6JdXUhwkUT/REXSVsXiXTVOX65kZ2P34hWDzIEeoWFduD2JamO5ijDWkq6NtJnik3ryJdq6s4uNviaL4XlUWwpC/Ajb1WRLAGPEnLfKEVg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650625264897835.128316973988; Fri, 22 Apr 2022 04:01:04 -0700 (PDT) Received: from localhost ([::1]:33944 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhr27-0007xH-Nt for importer2@patchew.org; Fri, 22 Apr 2022 07:01:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58562) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhq9r-0004Zm-7M for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:59 -0400 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]:33760) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhq9p-0002dW-Ai for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:04:58 -0400 Received: by mail-wm1-x330.google.com with SMTP id l3-20020a05600c1d0300b0038ff89c938bso4849676wms.0 for ; Fri, 22 Apr 2022 03:04:56 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.04.54 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:04:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=SsmXZg+uwjL7FCu6QoUQXU4qkVe/XwjPaQqP4D8bLQU=; b=yBqv585d25wr3ORR9wOllFEzGHe4WXeipZTf8Ua5KXmMTdF9hIAcOY7bB6bZYIewpA zoVcBh919xIv7cWh/e8KebzL53tatn6zZsMqzVQDTRDqjljkPei8C9PDI7jUsYn4UHGA qRYhHTYnghCXgqBd2UwVDKqwD3ATC8dek2xomwobVQwELxEgetY7CEqO1H7+PNbIR0fz SN30wuJjlM7gHkJvEURJCxaPnzUMSEfm6BtAOEb4ugpD0z9DrW97Nqj2GvejjjwLC06Y mfo7ApRJQ7G492Eqj/3KwhKsU9gfr4SAZNgghVlDZMV8eqsIQveGPmQv7xZ4tBrhpU9K DRSg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=SsmXZg+uwjL7FCu6QoUQXU4qkVe/XwjPaQqP4D8bLQU=; b=MyAY6HO4QjNQOkC4GWneUjQPYrySFTONZZ+POHCuBWIFwGiRj4XVMFjMFv1hDzQr+4 t8pvIEIMlWetj4tyKq9B2iXnl3MoceTnUJQ5sv0tibXJbxVT0GAu3W2J5RlyxB0Kp7p6 b6y5357L1jio9SNKbCona2HvBV4gAcYfZxEMquOj1YdEel2iitAhbq6brj1Kch2ZF6La 0guRSJvN6728d3ul6RsKvPcqmgEalnira59jDR3j7lUvnXZg14H9BSFkFtS09QKNCB/s 9bi5WhXBujtXsuaFV3Cymk7jU4PO23rXivDD+k0ku6IQcE0Miynale+unoiXHghdUSon sknw== X-Gm-Message-State: AOAM530neBDcjqFSeElaZVXTCR+EcpB0zQoe81bjrbXmQR+HIhqph3v7 hcz8oDGaQNScj0EeaaOE/OniVVIsozXbaA== X-Google-Smtp-Source: ABdhPJwHVafKn5Dm/FNZRFoemfYZ5+KnzzPs2n8vmcraSV/tlq1r8I31/GdK145bKDjp6ObOXocwnw== X-Received: by 2002:a1c:2904:0:b0:37b:ea53:4cbf with SMTP id p4-20020a1c2904000000b0037bea534cbfmr3428072wmp.46.1650621895704; Fri, 22 Apr 2022 03:04:55 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 23/61] hw/intc/arm_gicv3: Implement new GICv4 redistributor registers Date: Fri, 22 Apr 2022 11:03:54 +0100 Message-Id: <20220422100432.2288247-24-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650625266010100001 Content-Type: text/plain; charset="utf-8" Implement the new GICv4 redistributor registers: GICR_VPROPBASER and GICR_VPENDBASER; for the moment we implement these as simple reads-as-written stubs, together with the necessary migration and reset handling. We don't put ID-register checks on the handling of these registers, because they are all in the only-in-v4 extra register frames, so they're not accessible in a GICv3. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-24-peter.maydell@linaro.org --- hw/intc/gicv3_internal.h | 21 +++++++++++ include/hw/intc/arm_gicv3_common.h | 3 ++ hw/intc/arm_gicv3_common.c | 22 ++++++++++++ hw/intc/arm_gicv3_redist.c | 56 ++++++++++++++++++++++++++++++ 4 files changed, 102 insertions(+) diff --git a/hw/intc/gicv3_internal.h b/hw/intc/gicv3_internal.h index 9720ccf7507..795bf57d2b3 100644 --- a/hw/intc/gicv3_internal.h +++ b/hw/intc/gicv3_internal.h @@ -77,6 +77,7 @@ * Redistributor frame offsets from RD_base */ #define GICR_SGI_OFFSET 0x10000 +#define GICR_VLPI_OFFSET 0x20000 =20 /* * Redistributor registers, offsets from RD_base @@ -109,6 +110,10 @@ #define GICR_IGRPMODR0 (GICR_SGI_OFFSET + 0x0D00) #define GICR_NSACR (GICR_SGI_OFFSET + 0x0E00) =20 +/* VLPI redistributor registers, offsets from VLPI_base */ +#define GICR_VPROPBASER (GICR_VLPI_OFFSET + 0x70) +#define GICR_VPENDBASER (GICR_VLPI_OFFSET + 0x78) + #define GICR_CTLR_ENABLE_LPIS (1U << 0) #define GICR_CTLR_CES (1U << 1) #define GICR_CTLR_RWP (1U << 3) @@ -143,6 +148,22 @@ FIELD(GICR_PENDBASER, PTZ, 62, 1) =20 #define GICR_PROPBASER_IDBITS_THRESHOLD 0xd =20 +/* These are the GICv4 VPROPBASER and VPENDBASER layouts; v4.1 is differen= t */ +FIELD(GICR_VPROPBASER, IDBITS, 0, 5) +FIELD(GICR_VPROPBASER, INNERCACHE, 7, 3) +FIELD(GICR_VPROPBASER, SHAREABILITY, 10, 2) +FIELD(GICR_VPROPBASER, PHYADDR, 12, 40) +FIELD(GICR_VPROPBASER, OUTERCACHE, 56, 3) + +FIELD(GICR_VPENDBASER, INNERCACHE, 7, 3) +FIELD(GICR_VPENDBASER, SHAREABILITY, 10, 2) +FIELD(GICR_VPENDBASER, PHYADDR, 16, 36) +FIELD(GICR_VPENDBASER, OUTERCACHE, 56, 3) +FIELD(GICR_VPENDBASER, DIRTY, 60, 1) +FIELD(GICR_VPENDBASER, PENDINGLAST, 61, 1) +FIELD(GICR_VPENDBASER, IDAI, 62, 1) +FIELD(GICR_VPENDBASER, VALID, 63, 1) + #define ICC_CTLR_EL1_CBPR (1U << 0) #define ICC_CTLR_EL1_EOIMODE (1U << 1) #define ICC_CTLR_EL1_PMHE (1U << 6) diff --git a/include/hw/intc/arm_gicv3_common.h b/include/hw/intc/arm_gicv3= _common.h index 40bc404a652..7ff5a1aa5fc 100644 --- a/include/hw/intc/arm_gicv3_common.h +++ b/include/hw/intc/arm_gicv3_common.h @@ -179,6 +179,9 @@ struct GICv3CPUState { uint32_t gicr_igrpmodr0; uint32_t gicr_nsacr; uint8_t gicr_ipriorityr[GIC_INTERNAL]; + /* VLPI_base page registers */ + uint64_t gicr_vpropbaser; + uint64_t gicr_vpendbaser; =20 /* CPU interface */ uint64_t icc_sre_el1; diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c index 18999e3c8bb..14d76d74840 100644 --- a/hw/intc/arm_gicv3_common.c +++ b/hw/intc/arm_gicv3_common.c @@ -144,6 +144,25 @@ const VMStateDescription vmstate_gicv3_cpu_sre_el1 =3D= { } }; =20 +static bool gicv4_needed(void *opaque) +{ + GICv3CPUState *cs =3D opaque; + + return cs->gic->revision > 3; +} + +const VMStateDescription vmstate_gicv3_gicv4 =3D { + .name =3D "arm_gicv3_cpu/gicv4", + .version_id =3D 1, + .minimum_version_id =3D 1, + .needed =3D gicv4_needed, + .fields =3D (VMStateField[]) { + VMSTATE_UINT64(gicr_vpropbaser, GICv3CPUState), + VMSTATE_UINT64(gicr_vpendbaser, GICv3CPUState), + VMSTATE_END_OF_LIST() + } +}; + static const VMStateDescription vmstate_gicv3_cpu =3D { .name =3D "arm_gicv3_cpu", .version_id =3D 1, @@ -175,6 +194,7 @@ static const VMStateDescription vmstate_gicv3_cpu =3D { .subsections =3D (const VMStateDescription * []) { &vmstate_gicv3_cpu_virt, &vmstate_gicv3_cpu_sre_el1, + &vmstate_gicv3_gicv4, NULL } }; @@ -444,6 +464,8 @@ static void arm_gicv3_common_reset(DeviceState *dev) cs->gicr_waker =3D GICR_WAKER_ProcessorSleep | GICR_WAKER_Children= Asleep; cs->gicr_propbaser =3D 0; cs->gicr_pendbaser =3D 0; + cs->gicr_vpropbaser =3D 0; + cs->gicr_vpendbaser =3D 0; /* If we're resetting a TZ-aware GIC as if secure firmware * had set it up ready to start a kernel in non-secure, we * need to set interrupts to group 1 so the kernel can use them. diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c index 9f1fe09a78e..c310d7f8ff2 100644 --- a/hw/intc/arm_gicv3_redist.c +++ b/hw/intc/arm_gicv3_redist.c @@ -236,6 +236,23 @@ static MemTxResult gicr_readl(GICv3CPUState *cs, hwadd= r offset, case GICR_IDREGS ... GICR_IDREGS + 0x2f: *data =3D gicv3_idreg(offset - GICR_IDREGS, GICV3_PIDR0_REDIST); return MEMTX_OK; + /* + * VLPI frame registers. We don't need a version check for + * VPROPBASER and VPENDBASER because gicv3_redist_size() will + * prevent pre-v4 GIC from passing us offsets this high. + */ + case GICR_VPROPBASER: + *data =3D extract64(cs->gicr_vpropbaser, 0, 32); + return MEMTX_OK; + case GICR_VPROPBASER + 4: + *data =3D extract64(cs->gicr_vpropbaser, 32, 32); + return MEMTX_OK; + case GICR_VPENDBASER: + *data =3D extract64(cs->gicr_vpendbaser, 0, 32); + return MEMTX_OK; + case GICR_VPENDBASER + 4: + *data =3D extract64(cs->gicr_vpendbaser, 32, 32); + return MEMTX_OK; default: return MEMTX_ERROR; } @@ -379,6 +396,23 @@ static MemTxResult gicr_writel(GICv3CPUState *cs, hwad= dr offset, "%s: invalid guest write to RO register at offset " TARGET_FMT_plx "\n", __func__, offset); return MEMTX_OK; + /* + * VLPI frame registers. We don't need a version check for + * VPROPBASER and VPENDBASER because gicv3_redist_size() will + * prevent pre-v4 GIC from passing us offsets this high. + */ + case GICR_VPROPBASER: + cs->gicr_vpropbaser =3D deposit64(cs->gicr_vpropbaser, 0, 32, valu= e); + return MEMTX_OK; + case GICR_VPROPBASER + 4: + cs->gicr_vpropbaser =3D deposit64(cs->gicr_vpropbaser, 32, 32, val= ue); + return MEMTX_OK; + case GICR_VPENDBASER: + cs->gicr_vpendbaser =3D deposit64(cs->gicr_vpendbaser, 0, 32, valu= e); + return MEMTX_OK; + case GICR_VPENDBASER + 4: + cs->gicr_vpendbaser =3D deposit64(cs->gicr_vpendbaser, 32, 32, val= ue); + return MEMTX_OK; default: return MEMTX_ERROR; } @@ -397,6 +431,17 @@ static MemTxResult gicr_readll(GICv3CPUState *cs, hwad= dr offset, case GICR_PENDBASER: *data =3D cs->gicr_pendbaser; return MEMTX_OK; + /* + * VLPI frame registers. We don't need a version check for + * VPROPBASER and VPENDBASER because gicv3_redist_size() will + * prevent pre-v4 GIC from passing us offsets this high. + */ + case GICR_VPROPBASER: + *data =3D cs->gicr_vpropbaser; + return MEMTX_OK; + case GICR_VPENDBASER: + *data =3D cs->gicr_vpendbaser; + return MEMTX_OK; default: return MEMTX_ERROR; } @@ -418,6 +463,17 @@ static MemTxResult gicr_writell(GICv3CPUState *cs, hwa= ddr offset, "%s: invalid guest write to RO register at offset " TARGET_FMT_plx "\n", __func__, offset); return MEMTX_OK; + /* + * VLPI frame registers. We don't need a version check for + * VPROPBASER and VPENDBASER because gicv3_redist_size() will + * prevent pre-v4 GIC from passing us offsets this high. + */ + case GICR_VPROPBASER: + cs->gicr_vpropbaser =3D value; + return MEMTX_OK; + case GICR_VPENDBASER: + cs->gicr_vpendbaser =3D value; + return MEMTX_OK; default: return MEMTX_ERROR; } --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650623719; cv=none; d=zohomail.com; s=zohoarc; b=d3n7141Vi/Fl4zOGJjoTfnPKCQpXtr8YelcuRcnPo2OIwdRpVUZKiOdFDW8GFXJobXevo3RDbnAq6NkQsRKVAQTPTzE9nkGMojvUb4DBOVUVjStoZ5s3cyeLjHSgXrR1cJjh0rgosNTrcItCmbibQIEcSaJJXVFNTlJ44yZfbFg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650623719; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=OUTDe5oYT3hUigG/8y80ols+FyBgd0MbuwPZpWR766U=; b=YfOHUyByMPIblozyVyvbjo58Uo6GsdPWjikDDNoyuUzocg+SkgNN2rSxmV0wfysdbq8vZ2qvsHnqdf04h6T1+ruCVPC2s1jcuVF+1IVb2dA9ZALfYMDDDhwiVqXwbfIjxKgw5yd30VTAebq9k7g7WN0kXnr5Qpfv+W3R6OtLzb4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650623719779309.590198242988; Fri, 22 Apr 2022 03:35:19 -0700 (PDT) Received: from localhost ([::1]:42000 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhqdC-00018V-Ey for importer2@patchew.org; Fri, 22 Apr 2022 06:35:18 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58604) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhq9t-0004ev-Bw for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:01 -0400 Received: from mail-wr1-x429.google.com ([2a00:1450:4864:20::429]:45960) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhq9q-0002do-CL for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:01 -0400 Received: by mail-wr1-x429.google.com with SMTP id w4so10277872wrg.12 for ; Fri, 22 Apr 2022 03:04:57 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.04.55 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:04:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=OUTDe5oYT3hUigG/8y80ols+FyBgd0MbuwPZpWR766U=; b=fIabD+F7/FgPDyoEr/hzppsEQ/zLetXTAt+nHVzkqexcB7SeBwG93htkn7Dz6LQllq aXTUzuxqB+ZuK3rMU9jMR29ir0u7j3vawkLGqjzocwEdMPXsYL7UoFetYMbU4Sa/PL88 ooxcFWUi8nUK0YYGPQ7adVllJSj5PsCUUQ+8Q4+jC5uRGPD87ISyICuRdkGDs0+bITWu lJymSsFviXa7PAxj00OhM4k3tp69oxyfhwVALBipGLzJ74zFqdYBJYfe+HUIXe9RQW5s u2L5vx/h0tEjWHv4vLA0KHfXq3f3FfKsIFE55DYAaWEXseWnTBDrQAtWtsCehJEm9zj/ E1Rw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=OUTDe5oYT3hUigG/8y80ols+FyBgd0MbuwPZpWR766U=; b=mEoo4zPhbZeu2tA+l+K+7YP2WsH6sTU2DNfzB3beq9EiB8lVOn9WxjuNUD7u7mXDqm yMeFDb5ntv6JiVlZEcmrt+IkwiOTmrABGCC+KqOVrrdx6hwMIEZ/9sCZOGiwGOBLEMuw nfmvW5AZyn+YPXpW51dw0qeyZXQ3A2tl6xyhVeO1hCFaWR1RciwqMGHt+Enw2iSLL945 xRA3c5y8CpjcfD3z+f9D+b0lQQv2JhcfJ1ZmsODeuCDsjWoO8o46yWnqrB2wC2wM7sbF cRi5IDPthHHowcULPGJ+b25ttpGyFrFRW2zQra/qe+0NlXaU4xWg0ebg8NcIG0OGqeHF ZnWg== X-Gm-Message-State: AOAM532KPxugt1dNjxryhIJ1NVr8M+VCfy8SnFElBrkmLeS34bgJImjx Kdk1tRfVHgz48FoEsZzU8pn9PkNJj230hA== X-Google-Smtp-Source: ABdhPJxIzQ2qFEQz4m2wO6VKzGA0qq+PaxSQQ2YAUQEkrE6asIoiSJIRtLLFgmvM0MHNvlbE2pWV2A== X-Received: by 2002:adf:eacf:0:b0:20a:c8c4:ac51 with SMTP id o15-20020adfeacf000000b0020ac8c4ac51mr2077635wrn.510.1650621896626; Fri, 22 Apr 2022 03:04:56 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 24/61] hw/intc/arm_gicv3_cpuif: Split "update vIRQ/vFIQ" from gicv3_cpuif_virt_update() Date: Fri, 22 Apr 2022 11:03:55 +0100 Message-Id: <20220422100432.2288247-25-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650623720977100001 Content-Type: text/plain; charset="utf-8" The function gicv3_cpuif_virt_update() currently sets all of vIRQ, vFIQ and the maintenance interrupt. This implies that it has to be used quite carefully -- as the comment notes, setting the maintenance interrupt will typically cause the GIC code to be re-entered recursively. For handling vLPIs, we need the redistributor to be able to tell the cpuif to update the vIRQ and vFIQ lines when the highest priority pending vLPI changes. Since that change can't cause the maintenance interrupt state to change, we can pull the "update vIRQ/vFIQ" parts of gicv3_cpuif_virt_update() out into a separate function, which the redistributor can then call without having to worry about the reentrancy issue. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-25-peter.maydell@linaro.org --- hw/intc/gicv3_internal.h | 11 +++++++ hw/intc/arm_gicv3_cpuif.c | 64 ++++++++++++++++++++++++--------------- hw/intc/trace-events | 3 +- 3 files changed, 53 insertions(+), 25 deletions(-) diff --git a/hw/intc/gicv3_internal.h b/hw/intc/gicv3_internal.h index 795bf57d2b3..f25ddeca579 100644 --- a/hw/intc/gicv3_internal.h +++ b/hw/intc/gicv3_internal.h @@ -707,6 +707,17 @@ void gicv3_init_cpuif(GICv3State *s); */ void gicv3_cpuif_update(GICv3CPUState *cs); =20 +/* + * gicv3_cpuif_virt_irq_fiq_update: + * @cs: GICv3CPUState for the CPU to update + * + * Recalculate whether to assert the virtual IRQ or FIQ lines after + * a change to the current highest priority pending virtual interrupt. + * Note that this does not recalculate and change the maintenance + * interrupt status (for that, see gicv3_cpuif_virt_update()). + */ +void gicv3_cpuif_virt_irq_fiq_update(GICv3CPUState *cs); + static inline uint32_t gicv3_iidr(void) { /* Return the Implementer Identification Register value diff --git a/hw/intc/arm_gicv3_cpuif.c b/hw/intc/arm_gicv3_cpuif.c index 1a3d440a54b..5fb64d4663c 100644 --- a/hw/intc/arm_gicv3_cpuif.c +++ b/hw/intc/arm_gicv3_cpuif.c @@ -370,30 +370,20 @@ static uint32_t maintenance_interrupt_state(GICv3CPUS= tate *cs) return value; } =20 -static void gicv3_cpuif_virt_update(GICv3CPUState *cs) +void gicv3_cpuif_virt_irq_fiq_update(GICv3CPUState *cs) { - /* Tell the CPU about any pending virtual interrupts or - * maintenance interrupts, following a change to the state - * of the CPU interface relevant to virtual interrupts. - * - * CAUTION: this function will call qemu_set_irq() on the - * CPU maintenance IRQ line, which is typically wired up - * to the GIC as a per-CPU interrupt. This means that it - * will recursively call back into the GIC code via - * gicv3_redist_set_irq() and thus into the CPU interface code's - * gicv3_cpuif_update(). It is therefore important that this - * function is only called as the final action of a CPU interface - * register write implementation, after all the GIC state - * fields have been updated. gicv3_cpuif_update() also must - * not cause this function to be called, but that happens - * naturally as a result of there being no architectural - * linkage between the physical and virtual GIC logic. + /* + * Tell the CPU about any pending virtual interrupts. + * This should only be called for changes that affect the + * vIRQ and vFIQ status and do not change the maintenance + * interrupt status. This means that unlike gicv3_cpuif_virt_update() + * this function won't recursively call back into the GIC code. + * The main use of this is when the redistributor has changed the + * highest priority pending virtual LPI. */ int idx; int irqlevel =3D 0; int fiqlevel =3D 0; - int maintlevel =3D 0; - ARMCPU *cpu =3D ARM_CPU(cs->cpu); =20 idx =3D hppvi_index(cs); trace_gicv3_cpuif_virt_update(gicv3_redist_affid(cs), idx); @@ -410,16 +400,42 @@ static void gicv3_cpuif_virt_update(GICv3CPUState *cs) } } =20 + trace_gicv3_cpuif_virt_set_irqs(gicv3_redist_affid(cs), fiqlevel, irql= evel); + qemu_set_irq(cs->parent_vfiq, fiqlevel); + qemu_set_irq(cs->parent_virq, irqlevel); +} + +static void gicv3_cpuif_virt_update(GICv3CPUState *cs) +{ + /* + * Tell the CPU about any pending virtual interrupts or + * maintenance interrupts, following a change to the state + * of the CPU interface relevant to virtual interrupts. + * + * CAUTION: this function will call qemu_set_irq() on the + * CPU maintenance IRQ line, which is typically wired up + * to the GIC as a per-CPU interrupt. This means that it + * will recursively call back into the GIC code via + * gicv3_redist_set_irq() and thus into the CPU interface code's + * gicv3_cpuif_update(). It is therefore important that this + * function is only called as the final action of a CPU interface + * register write implementation, after all the GIC state + * fields have been updated. gicv3_cpuif_update() also must + * not cause this function to be called, but that happens + * naturally as a result of there being no architectural + * linkage between the physical and virtual GIC logic. + */ + ARMCPU *cpu =3D ARM_CPU(cs->cpu); + int maintlevel =3D 0; + + gicv3_cpuif_virt_irq_fiq_update(cs); + if ((cs->ich_hcr_el2 & ICH_HCR_EL2_EN) && maintenance_interrupt_state(cs) !=3D 0) { maintlevel =3D 1; } =20 - trace_gicv3_cpuif_virt_set_irqs(gicv3_redist_affid(cs), fiqlevel, - irqlevel, maintlevel); - - qemu_set_irq(cs->parent_vfiq, fiqlevel); - qemu_set_irq(cs->parent_virq, irqlevel); + trace_gicv3_cpuif_virt_set_maint_irq(gicv3_redist_affid(cs), maintleve= l); qemu_set_irq(cpu->gicv3_maintenance_interrupt, maintlevel); } =20 diff --git a/hw/intc/trace-events b/hw/intc/trace-events index 004a1006fb8..36c3fe4da0b 100644 --- a/hw/intc/trace-events +++ b/hw/intc/trace-events @@ -152,7 +152,8 @@ gicv3_icv_dir_write(uint32_t cpu, uint64_t val) "GICv3 = ICV_DIR write cpu 0x%x va gicv3_icv_iar_read(int grp, uint32_t cpu, uint64_t val) "GICv3 ICV_IAR%d r= ead cpu 0x%x value 0x%" PRIx64 gicv3_icv_eoir_write(int grp, uint32_t cpu, uint64_t val) "GICv3 ICV_EOIR%= d write cpu 0x%x value 0x%" PRIx64 gicv3_cpuif_virt_update(uint32_t cpuid, int idx) "GICv3 CPU i/f 0x%x virt = HPPI update LR index %d" -gicv3_cpuif_virt_set_irqs(uint32_t cpuid, int fiqlevel, int irqlevel, int = maintlevel) "GICv3 CPU i/f 0x%x virt HPPI update: setting FIQ %d IRQ %d mai= ntenance-irq %d" +gicv3_cpuif_virt_set_irqs(uint32_t cpuid, int fiqlevel, int irqlevel) "GIC= v3 CPU i/f 0x%x virt HPPI update: setting FIQ %d IRQ %d" +gicv3_cpuif_virt_set_maint_irq(uint32_t cpuid, int maintlevel) "GICv3 CPU = i/f 0x%x virt HPPI update: setting maintenance-irq %d" =20 # arm_gicv3_dist.c gicv3_dist_read(uint64_t offset, uint64_t data, unsigned size, bool secure= ) "GICv3 distributor read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u = secure %d" --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650624629; cv=none; d=zohomail.com; s=zohoarc; b=j4wJtvtBiJgaRrFR0sdhJpSjpypiBsnGN7Mx5Och9GRhMOTo4y4mvf00PvRiVBzJJoapAzdEKBgGiFsvc6xdtqRBA3kfVrzyIDS4ZLJ2d/LqM7rNDTVZERBbwGvz6AsgmECCv4IjWxFn1Fav5p0rihVKkMVgWOGDhtIVRtqMsQE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650624629; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=lfat0Xo/XZAzlvrsuN37d4qZ7GyWb7N5yMXurCOySu8=; b=K7BFuAdhen0tWxTFN+W2N+khspCr336OsQbxVS+Nun8cf57DjbfmnBiLhNApu2JXNscdFvZUhNa0DNBcu5ahtPVETPnBD6z/8Qaf2jC5lQvOVZwcT7dJzhn98dnswtMk7Qb/g0HhTKBTVlikSl8peuPeTIljmLM8Bes87gX2pZo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 16506246297240.7144347744448396; Fri, 22 Apr 2022 03:50:29 -0700 (PDT) Received: from localhost ([::1]:39556 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhqrs-0005RC-Kj for importer2@patchew.org; Fri, 22 Apr 2022 06:50:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58606) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhq9t-0004fF-EE for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:01 -0400 Received: from mail-wr1-x42d.google.com ([2a00:1450:4864:20::42d]:44907) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhq9r-0002du-7H for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:01 -0400 Received: by mail-wr1-x42d.google.com with SMTP id b19so10280361wrh.11 for ; Fri, 22 Apr 2022 03:04:58 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.04.56 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:04:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=lfat0Xo/XZAzlvrsuN37d4qZ7GyWb7N5yMXurCOySu8=; b=g7AgjRiYDd9vjDztgvWEr7GWUhHX/7YXpBllx8qiVhvyzUEbnRrvc++5cQ84d+OaJF zj2aAeoLXy2Oprg4dlT4o32e55Ez0zhN3xaFcXH0xrypiN9oWs/Rdjhxc7C+Hnsxoq8p SZlt0M8aZY1rLsoDQiDUafaiM8tMrYsz2a8G127WIbwOKY1pLzdT418GJF8Vb9saYCnT gxcPt5wncPhCgfy6eIiOkgqTHgEfQFCbBSxk8PjrKVRPH+0KxrMp9JXxWFgYmDeAYC/A 2AshtWN0pHjRLElm1AVD8aH9kKTI8ppJQCkBkblzsY5OLGVLgR+VGjZY8E69FlOJPvW7 zfng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lfat0Xo/XZAzlvrsuN37d4qZ7GyWb7N5yMXurCOySu8=; b=XF7wO6J4TuF4ApHMgRd8iDoDAQw1t2qyv2CcEH2wHGNBgiQWZDLE0Zwb2EjUHvIzMz Q2W7wAXci5jIW7jRpoe7CoN1mPRRMpNfgfMer50OhCI/tdUtbJkMVskU5Xfe/UyOB+FM 3abFu9yfwTkzwvuGuCBmADi0+2zk+temsvdEHmxSXeZMyay/MtFX3pEka5ud8vO+EOpL INSnwuwQfJziEXXMIXiS8yRJp7+/Gx+ZdSMvoT+7S5MjJuPBkRi9TL90zLZVOq8r8Toq 4E2GC1UVGAip1JwmnYc5eLBxnRIiUcW9DrkQ8xlijROuVksh+qHKCsGqi2sMPAwyuHF9 9Heg== X-Gm-Message-State: AOAM532v0KJFw1ue1QpoVDeS+XiroLoqx9ctroiG0UWRhueP4+AvMXqH NQ1k+pSRlykEgkFMcwD1D3/B+JcPjgVkog== X-Google-Smtp-Source: ABdhPJz1kKAn8XR7SD+mE3qRAWaLJOYBge4rJbamdggAmENi2vj8r2PIK6O1E52lAvdojANhrT/FUQ== X-Received: by 2002:a5d:47aa:0:b0:20a:8b96:5b2c with SMTP id 10-20020a5d47aa000000b0020a8b965b2cmr3070941wrb.621.1650621897645; Fri, 22 Apr 2022 03:04:57 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 25/61] hw/intc/arm_gicv3_cpuif: Support vLPIs Date: Fri, 22 Apr 2022 11:03:56 +0100 Message-Id: <20220422100432.2288247-26-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650624630474100001 Content-Type: text/plain; charset="utf-8" The CPU interface changes to support vLPIs are fairly minor: in the parts of the code that currently look at the list registers to determine the highest priority pending virtual interrupt, we must also look at the highest priority pending vLPI. To do this we change hppvi_index() to check the vLPI and return a special-case value if that is the right virtual interrupt to take. The callsites (which handle HPPIR and IAR registers and the "raise vIRQ and vFIQ lines" code) then have to handle this special-case value. This commit includes two interfaces with the as-yet-unwritten redistributor code: * the new GICv3CPUState::hppvlpi will be set by the redistributor (in the same way as the existing hpplpi does for physical LPIs) * when the CPU interface acknowledges a vLPI it needs to set it to non-pending; the new gicv3_redist_vlpi_pending() function (which matches the existing gicv3_redist_lpi_pending() used for physical LPIs) is a stub that will be filled in later Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-26-peter.maydell@linaro.org --- hw/intc/gicv3_internal.h | 13 ++++ include/hw/intc/arm_gicv3_common.h | 3 + hw/intc/arm_gicv3_common.c | 1 + hw/intc/arm_gicv3_cpuif.c | 119 +++++++++++++++++++++++++++-- hw/intc/arm_gicv3_redist.c | 8 ++ hw/intc/trace-events | 2 +- 6 files changed, 140 insertions(+), 6 deletions(-) diff --git a/hw/intc/gicv3_internal.h b/hw/intc/gicv3_internal.h index f25ddeca579..07644b2be6f 100644 --- a/hw/intc/gicv3_internal.h +++ b/hw/intc/gicv3_internal.h @@ -612,6 +612,19 @@ void gicv3_redist_process_lpi(GICv3CPUState *cs, int i= rq, int level); */ void gicv3_redist_process_vlpi(GICv3CPUState *cs, int irq, uint64_t vptadd= r, int doorbell, int level); +/** + * gicv3_redist_vlpi_pending: + * @cs: GICv3CPUState + * @irq: (virtual) interrupt number + * @level: level to set @irq to + * + * Set/clear the pending status of a virtual LPI in the vLPI table + * that this redistributor is currently using. (The difference between + * this and gicv3_redist_process_vlpi() is that this is called from + * the cpuif and does not need to do the not-running-on-this-vcpu checks.) + */ +void gicv3_redist_vlpi_pending(GICv3CPUState *cs, int irq, int level); + void gicv3_redist_lpi_pending(GICv3CPUState *cs, int irq, int level); /** * gicv3_redist_update_lpi: diff --git a/include/hw/intc/arm_gicv3_common.h b/include/hw/intc/arm_gicv3= _common.h index 7ff5a1aa5fc..4e416100559 100644 --- a/include/hw/intc/arm_gicv3_common.h +++ b/include/hw/intc/arm_gicv3_common.h @@ -219,6 +219,9 @@ struct GICv3CPUState { */ PendingIrq hpplpi; =20 + /* Cached information recalculated from vLPI tables in guest memory */ + PendingIrq hppvlpi; + /* This is temporary working state, to avoid a malloc in gicv3_update(= ) */ bool seenbetter; }; diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c index 14d76d74840..3f47b3501fe 100644 --- a/hw/intc/arm_gicv3_common.c +++ b/hw/intc/arm_gicv3_common.c @@ -487,6 +487,7 @@ static void arm_gicv3_common_reset(DeviceState *dev) =20 cs->hppi.prio =3D 0xff; cs->hpplpi.prio =3D 0xff; + cs->hppvlpi.prio =3D 0xff; =20 /* State in the CPU interface must *not* be reset here, because it * is part of the CPU's reset domain, not the GIC device's. diff --git a/hw/intc/arm_gicv3_cpuif.c b/hw/intc/arm_gicv3_cpuif.c index 5fb64d4663c..f11863ff613 100644 --- a/hw/intc/arm_gicv3_cpuif.c +++ b/hw/intc/arm_gicv3_cpuif.c @@ -21,6 +21,12 @@ #include "hw/irq.h" #include "cpu.h" =20 +/* + * Special case return value from hppvi_index(); must be larger than + * the architecturally maximum possible list register index (which is 15) + */ +#define HPPVI_INDEX_VLPI 16 + static GICv3CPUState *icc_cs_from_env(CPUARMState *env) { return env->gicv3state; @@ -157,10 +163,18 @@ static int ich_highest_active_virt_prio(GICv3CPUState= *cs) =20 static int hppvi_index(GICv3CPUState *cs) { - /* Return the list register index of the highest priority pending + /* + * Return the list register index of the highest priority pending * virtual interrupt, as per the HighestPriorityVirtualInterrupt * pseudocode. If no pending virtual interrupts, return -1. + * If the highest priority pending virtual interrupt is a vLPI, + * return HPPVI_INDEX_VLPI. + * (The pseudocode handles checking whether the vLPI is higher + * priority than the highest priority list register at every + * callsite of HighestPriorityVirtualInterrupt; we check it here.) */ + ARMCPU *cpu =3D ARM_CPU(cs->cpu); + CPUARMState *env =3D &cpu->env; int idx =3D -1; int i; /* Note that a list register entry with a priority of 0xff will @@ -202,6 +216,23 @@ static int hppvi_index(GICv3CPUState *cs) } } =20 + /* + * "no pending vLPI" is indicated with prio =3D 0xff, which always + * fails the priority check here. vLPIs are only considered + * when we are in Non-Secure state. + */ + if (cs->hppvlpi.prio < prio && !arm_is_secure(env)) { + if (cs->hppvlpi.grp =3D=3D GICV3_G0) { + if (cs->ich_vmcr_el2 & ICH_VMCR_EL2_VENG0) { + return HPPVI_INDEX_VLPI; + } + } else { + if (cs->ich_vmcr_el2 & ICH_VMCR_EL2_VENG1) { + return HPPVI_INDEX_VLPI; + } + } + } + return idx; } =20 @@ -289,6 +320,47 @@ static bool icv_hppi_can_preempt(GICv3CPUState *cs, ui= nt64_t lr) return false; } =20 +static bool icv_hppvlpi_can_preempt(GICv3CPUState *cs) +{ + /* + * Return true if we can signal the highest priority pending vLPI. + * We can assume we're Non-secure because hppvi_index() already + * tested for that. + */ + uint32_t mask, rprio, vpmr; + + if (!(cs->ich_hcr_el2 & ICH_HCR_EL2_EN)) { + /* Virtual interface disabled */ + return false; + } + + vpmr =3D extract64(cs->ich_vmcr_el2, ICH_VMCR_EL2_VPMR_SHIFT, + ICH_VMCR_EL2_VPMR_LENGTH); + + if (cs->hppvlpi.prio >=3D vpmr) { + /* Priority mask masks this interrupt */ + return false; + } + + rprio =3D ich_highest_active_virt_prio(cs); + if (rprio =3D=3D 0xff) { + /* No running interrupt so we can preempt */ + return true; + } + + mask =3D icv_gprio_mask(cs, cs->hppvlpi.grp); + + /* + * We only preempt a running interrupt if the pending interrupt's + * group priority is sufficient (the subpriorities are not considered). + */ + if ((cs->hppvlpi.prio & mask) < (rprio & mask)) { + return true; + } + + return false; +} + static uint32_t eoi_maintenance_interrupt_state(GICv3CPUState *cs, uint32_t *misr) { @@ -386,8 +458,18 @@ void gicv3_cpuif_virt_irq_fiq_update(GICv3CPUState *cs) int fiqlevel =3D 0; =20 idx =3D hppvi_index(cs); - trace_gicv3_cpuif_virt_update(gicv3_redist_affid(cs), idx); - if (idx >=3D 0) { + trace_gicv3_cpuif_virt_update(gicv3_redist_affid(cs), idx, + cs->hppvlpi.irq, cs->hppvlpi.grp, + cs->hppvlpi.prio); + if (idx =3D=3D HPPVI_INDEX_VLPI) { + if (icv_hppvlpi_can_preempt(cs)) { + if (cs->hppvlpi.grp =3D=3D GICV3_G0) { + fiqlevel =3D 1; + } else { + irqlevel =3D 1; + } + } + } else if (idx >=3D 0) { uint64_t lr =3D cs->ich_lr_el2[idx]; =20 if (icv_hppi_can_preempt(cs, lr)) { @@ -619,7 +701,11 @@ static uint64_t icv_hppir_read(CPUARMState *env, const= ARMCPRegInfo *ri) int idx =3D hppvi_index(cs); uint64_t value =3D INTID_SPURIOUS; =20 - if (idx >=3D 0) { + if (idx =3D=3D HPPVI_INDEX_VLPI) { + if (cs->hppvlpi.grp =3D=3D grp) { + value =3D cs->hppvlpi.irq; + } + } else if (idx >=3D 0) { uint64_t lr =3D cs->ich_lr_el2[idx]; int thisgrp =3D (lr & ICH_LR_EL2_GROUP) ? GICV3_G1NS : GICV3_G0; =20 @@ -650,6 +736,18 @@ static void icv_activate_irq(GICv3CPUState *cs, int id= x, int grp) cs->ich_apr[grp][regno] |=3D (1 << regbit); } =20 +static void icv_activate_vlpi(GICv3CPUState *cs) +{ + uint32_t mask =3D icv_gprio_mask(cs, cs->hppvlpi.grp); + int prio =3D cs->hppvlpi.prio & mask; + int aprbit =3D prio >> (8 - cs->vprebits); + int regno =3D aprbit / 32; + int regbit =3D aprbit % 32; + + cs->ich_apr[cs->hppvlpi.grp][regno] |=3D (1 << regbit); + gicv3_redist_vlpi_pending(cs, cs->hppvlpi.irq, 0); +} + static uint64_t icv_iar_read(CPUARMState *env, const ARMCPRegInfo *ri) { GICv3CPUState *cs =3D icc_cs_from_env(env); @@ -657,7 +755,12 @@ static uint64_t icv_iar_read(CPUARMState *env, const A= RMCPRegInfo *ri) int idx =3D hppvi_index(cs); uint64_t intid =3D INTID_SPURIOUS; =20 - if (idx >=3D 0) { + if (idx =3D=3D HPPVI_INDEX_VLPI) { + if (cs->hppvlpi.grp =3D=3D grp && icv_hppvlpi_can_preempt(cs)) { + intid =3D cs->hppvlpi.irq; + icv_activate_vlpi(cs); + } + } else if (idx >=3D 0) { uint64_t lr =3D cs->ich_lr_el2[idx]; int thisgrp =3D (lr & ICH_LR_EL2_GROUP) ? GICV3_G1NS : GICV3_G0; =20 @@ -2632,6 +2735,12 @@ static void gicv3_cpuif_el_change_hook(ARMCPU *cpu, = void *opaque) GICv3CPUState *cs =3D opaque; =20 gicv3_cpuif_update(cs); + /* + * Because vLPIs are only pending in NonSecure state, + * an EL change can change the VIRQ/VFIQ status (but + * cannot affect the maintenance interrupt state) + */ + gicv3_cpuif_virt_irq_fiq_update(cs); } =20 void gicv3_init_cpuif(GICv3State *s) diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c index c310d7f8ff2..3464972c139 100644 --- a/hw/intc/arm_gicv3_redist.c +++ b/hw/intc/arm_gicv3_redist.c @@ -855,6 +855,14 @@ void gicv3_redist_movall_lpis(GICv3CPUState *src, GICv= 3CPUState *dest) gicv3_redist_update_lpi(dest); } =20 +void gicv3_redist_vlpi_pending(GICv3CPUState *cs, int irq, int level) +{ + /* + * The redistributor handling for changing the pending state + * of a vLPI will be added in a subsequent commit. + */ +} + void gicv3_redist_process_vlpi(GICv3CPUState *cs, int irq, uint64_t vptadd= r, int doorbell, int level) { diff --git a/hw/intc/trace-events b/hw/intc/trace-events index 36c3fe4da0b..5271590304b 100644 --- a/hw/intc/trace-events +++ b/hw/intc/trace-events @@ -151,7 +151,7 @@ gicv3_icv_hppir_read(int grp, uint32_t cpu, uint64_t va= l) "GICv3 ICV_HPPIR%d rea gicv3_icv_dir_write(uint32_t cpu, uint64_t val) "GICv3 ICV_DIR write cpu 0= x%x value 0x%" PRIx64 gicv3_icv_iar_read(int grp, uint32_t cpu, uint64_t val) "GICv3 ICV_IAR%d r= ead cpu 0x%x value 0x%" PRIx64 gicv3_icv_eoir_write(int grp, uint32_t cpu, uint64_t val) "GICv3 ICV_EOIR%= d write cpu 0x%x value 0x%" PRIx64 -gicv3_cpuif_virt_update(uint32_t cpuid, int idx) "GICv3 CPU i/f 0x%x virt = HPPI update LR index %d" +gicv3_cpuif_virt_update(uint32_t cpuid, int idx, int hppvlpi, int grp, int= prio) "GICv3 CPU i/f 0x%x virt HPPI update LR index %d HPPVLPI %d grp %d p= rio %d" gicv3_cpuif_virt_set_irqs(uint32_t cpuid, int fiqlevel, int irqlevel) "GIC= v3 CPU i/f 0x%x virt HPPI update: setting FIQ %d IRQ %d" gicv3_cpuif_virt_set_maint_irq(uint32_t cpuid, int maintlevel) "GICv3 CPU = i/f 0x%x virt HPPI update: setting maintenance-irq %d" =20 --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650625866; cv=none; d=zohomail.com; s=zohoarc; b=EBBcCIQzJHEiCn+XeLBTM8ItLBXe2U978nGMzuzl9+Ey68ArYqGpgBlj/zN7tE56RK1L3960sA88BuUMpxJSnEK+NEP0H2Y5ivHjd4WJFjBrt0u9Kt1wVL3T9as1Zzmk/eVmzOMpD5WAfpwplXrdyp7OeyVcFAxWs7C/YAqzLks= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650625866; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=EjeZtA3tZWg+aDhUloJoLuwvQBqCQPUULzcGK3wHquE=; b=S/4reWK9yTSbeWEGTmbE0EGNOx0gbQUFfWtIj6W4evD6LFO1mH2NLVMkQcWIsA0rgq3Tr6gFTLaWHMaWvbtXesHM/Nfp/+oh7cypT6avDyvyAN08glEmQ9ywGuBSeJAQTk3HC1iUy0tCnlEAJ7KWLbOWDezFp0cfRZzYi3L3FyU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 16506258664181023.0693241351548; Fri, 22 Apr 2022 04:11:06 -0700 (PDT) Received: from localhost ([::1]:45588 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhrBp-000102-03 for importer2@patchew.org; Fri, 22 Apr 2022 07:11:05 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58612) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhq9t-0004fO-Sk for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:02 -0400 Received: from mail-wr1-x429.google.com ([2a00:1450:4864:20::429]:37785) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhq9s-0002e9-7m for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:01 -0400 Received: by mail-wr1-x429.google.com with SMTP id t6so6882787wra.4 for ; Fri, 22 Apr 2022 03:04:59 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.04.57 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:04:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=EjeZtA3tZWg+aDhUloJoLuwvQBqCQPUULzcGK3wHquE=; b=CXs5SrNZLUu29Ysw4+S58yi4ltUAKYGZIS/E5z6NwVuDOM3hdf7A9KQQocUA1KiYGp TYOKdPQBg0AzaOTlmEeeHxcmlwbP4pQFDG+fyqVmdVP/Agi8KzOFHIEs3R2woywcC7tc 7YSEynFjMXGemp/TGB2D8yQqyBM1275tr+LZlZax7ha0p5kyEsRF4T4VFJ/U4Jzz3pfS tcS1O12myO+9WD1h5gS+7eKcG9BneDLcoFp+dk1RUxcb2cldjE09Mg2sazB8kRooE6ya 8MjXzqqWe0Sg7lyw7G5ulgXdxn28Qc5dBxRHJzgLU6tDsBNCOGTUM7kmAT3Vdh1WcwuT k0/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=EjeZtA3tZWg+aDhUloJoLuwvQBqCQPUULzcGK3wHquE=; b=RF8QjrqCP2+zhvOs4FVliRVT+9sIVylBrTLEaiDryzAkK1rvbPInHiPUWI0cYcw+Sm 5ylDfCiBVaNMAUymHZRfSie/lt53DI9KQFPYyEWYM4eLnbF/SkCNs+g+uZ+8m4OiDbaH 1smOWHM440gV83QVNIpiKo2Ukz+Jo4MXN+DXV3hH6NmU0EOLMxGHGEfTwQpTI+gZHHaL dyJpERli4QmQlzp7J/WJwNHf/4IsFLxitVF4KQv9RJ7ZIaHhmOoYvxcff8W3nmV89j4V 7kbvZ9tN/7pqVtHqbYHme4uGUtaBkak/e+1xiNmuz67HPpQRuY8Qsn1BN1TBNxtJE2MO efeA== X-Gm-Message-State: AOAM533lkKRB2tyg3nAzlUHGL7LEGvErXCe7Q3WvSPeNmWNYi6FiYL7K BicHGC/p03qPKdB0tlFj57qNR5hsxnllLg== X-Google-Smtp-Source: ABdhPJx72i4a+TkROljt0Wb4EPTOxVPldT83vTV1A2cQq05Pr/zkDNK3n6FSwwK/f5JTd2he/4yZ9A== X-Received: by 2002:adf:db8b:0:b0:207:9a90:3819 with SMTP id u11-20020adfdb8b000000b002079a903819mr3133255wri.617.1650621898411; Fri, 22 Apr 2022 03:04:58 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 26/61] hw/intc/arm_gicv3_cpuif: Don't recalculate maintenance irq unnecessarily Date: Fri, 22 Apr 2022 11:03:57 +0100 Message-Id: <20220422100432.2288247-27-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650625867029100002 Content-Type: text/plain; charset="utf-8" The maintenance interrupt state depends only on: * ICH_HCR_EL2 * ICH_LR_EL2 * ICH_VMCR_EL2 fields VENG0 and VENG1 Now we have a separate function that updates only the vIRQ and vFIQ lines, use that in places that only change state that affects vIRQ and vFIQ but not the maintenance interrupt. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-27-peter.maydell@linaro.org --- hw/intc/arm_gicv3_cpuif.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/hw/intc/arm_gicv3_cpuif.c b/hw/intc/arm_gicv3_cpuif.c index f11863ff613..d627ddac90f 100644 --- a/hw/intc/arm_gicv3_cpuif.c +++ b/hw/intc/arm_gicv3_cpuif.c @@ -543,7 +543,7 @@ static void icv_ap_write(CPUARMState *env, const ARMCPR= egInfo *ri, =20 cs->ich_apr[grp][regno] =3D value & 0xFFFFFFFFU; =20 - gicv3_cpuif_virt_update(cs); + gicv3_cpuif_virt_irq_fiq_update(cs); return; } =20 @@ -588,7 +588,7 @@ static void icv_bpr_write(CPUARMState *env, const ARMCP= RegInfo *ri, =20 write_vbpr(cs, grp, value); =20 - gicv3_cpuif_virt_update(cs); + gicv3_cpuif_virt_irq_fiq_update(cs); } =20 static uint64_t icv_pmr_read(CPUARMState *env, const ARMCPRegInfo *ri) @@ -615,7 +615,7 @@ static void icv_pmr_write(CPUARMState *env, const ARMCP= RegInfo *ri, cs->ich_vmcr_el2 =3D deposit64(cs->ich_vmcr_el2, ICH_VMCR_EL2_VPMR_SHI= FT, ICH_VMCR_EL2_VPMR_LENGTH, value); =20 - gicv3_cpuif_virt_update(cs); + gicv3_cpuif_virt_irq_fiq_update(cs); } =20 static uint64_t icv_igrpen_read(CPUARMState *env, const ARMCPRegInfo *ri) @@ -682,7 +682,7 @@ static void icv_ctlr_write(CPUARMState *env, const ARMC= PRegInfo *ri, cs->ich_vmcr_el2 =3D deposit64(cs->ich_vmcr_el2, ICH_VMCR_EL2_VEOIM_SH= IFT, 1, value & ICC_CTLR_EL1_EOIMODE ? 1 : 0); =20 - gicv3_cpuif_virt_update(cs); + gicv3_cpuif_virt_irq_fiq_update(cs); } =20 static uint64_t icv_rpr_read(CPUARMState *env, const ARMCPRegInfo *ri) @@ -2452,7 +2452,7 @@ static void ich_ap_write(CPUARMState *env, const ARMC= PRegInfo *ri, trace_gicv3_ich_ap_write(ri->crm & 1, regno, gicv3_redist_affid(cs), v= alue); =20 cs->ich_apr[grp][regno] =3D value & 0xFFFFFFFFU; - gicv3_cpuif_virt_update(cs); + gicv3_cpuif_virt_irq_fiq_update(cs); } =20 static uint64_t ich_hcr_read(CPUARMState *env, const ARMCPRegInfo *ri) --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650624903; cv=none; d=zohomail.com; s=zohoarc; b=FSf8YKWc6YWJjtLHx6UKMIUAa6fKFmklY0YrhOPZ5kZX8ZwsK9dqqzsRuFwRsiQWQVwk6X0qTxp6YD9KGPCCVuJJdoOQkHZyYi6+SCJepJC57fK+I2TP/EG1uq9wHKhZIN4WrPzywJRI9Jl2Onee5zOPNC0VumJq7vTH1daebcY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650624903; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=3ilgvfjObbIjUWYmzt8kRu+jcO5Jk2GypxqucG8W5ao=; b=HNv162hgcfvVwV497QT4sagi6WcgsT0UYrrjkfAuF5eq4BEPb68U54GaCTndnLGuy4rx2Kivu01DEyg0SgP/gyKKZqY188ySZkTDymuRSFIBIAw8FLlgrALTdszymRrnkoCrEZjXpglVqfy64IGBYHN93DHhjiSqHVwk8VS4RDk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650624903875446.9063828737377; Fri, 22 Apr 2022 03:55:03 -0700 (PDT) Received: from localhost ([::1]:48268 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhqwI-0004UF-Fg for importer2@patchew.org; Fri, 22 Apr 2022 06:55:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58632) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhq9u-0004hX-Te for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:03 -0400 Received: from mail-wm1-x332.google.com ([2a00:1450:4864:20::332]:34692) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhq9s-0002eF-Ui for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:02 -0400 Received: by mail-wm1-x332.google.com with SMTP id ay36-20020a05600c1e2400b0038ebc885115so4691868wmb.1 for ; Fri, 22 Apr 2022 03:05:00 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.04.58 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:04:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=3ilgvfjObbIjUWYmzt8kRu+jcO5Jk2GypxqucG8W5ao=; b=oI2VE+9SoLKn5lT76R7giAMeW53NuDdAaIa62ciMUa3Be901JalZYC6ukOyAjw0kk6 OnnEQdtDylfXhKdEyd4a4ByYwqdwXgujmQrk/Vj7eOVoFifxSZQB/aC1TfFmp6uNdEbC wj/11hOzAkYzEc85q4o8Qlnz3ItfND6RYMcIIJRP1IgQEUlv6QaVhdb4k9/ekSUmB2HI 6aL9hKxg1oKptZawFRHlESLy0RjNLw2t54n0iAvpGkslxI6IzeK+KXrtd9K3sfIRLn/Y SdgeMR3Js5XS0z9Lf9oN/uqz9M14qdW7BkjhKlkxCZlce59LC+s6rRAnSVt2a9O8VeIu 2rMw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=3ilgvfjObbIjUWYmzt8kRu+jcO5Jk2GypxqucG8W5ao=; b=Yup2ry/X0AQK9AlsinqhShBw291uN5MC0u5WsrFIBbWA3QA3yuXOEqwOk3+c/BejaM a9mr6pEQXZNhhuMCJ8SY7xFGhJE/D7hsDpbIwYTBi5FXfOlTZqluH54A32aA39+e7w0I gjhssfZG8R2D3bCfO5Q2XIAk7OkllHyp7MdpAOOnxGmyzouLFPLxJsTNB9KvFU+kL7/n VW2NQz789S/KQmCiH0f/wFmvfet7uQi3mwP5NN/n3u7lWr6U/fQOWAYpekama8KtPbVb OnlHCx5XFREPAbqxSxjFoBapkDcctWqcL7yhuUwCPrhzl18kBFrTdk1dq3YHGEWF78Qq zHOA== X-Gm-Message-State: AOAM532q712IOoAzk4XNpl+OXsmQlAJ44eSmeexDKeqkqbGrNIvflwMg 1kRu+fWEMWKQOtkowFsCGok0ZqLkgcLsnw== X-Google-Smtp-Source: ABdhPJy/KaNed8cU7269DrLo3F2i9eykTQKMjiIadK4+G0Zvsebxv8WfgFrkYMOBPnZ33dLOOKva3A== X-Received: by 2002:a05:600c:4f53:b0:392:e99:3002 with SMTP id m19-20020a05600c4f5300b003920e993002mr3432196wmq.35.1650621899294; Fri, 22 Apr 2022 03:04:59 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 27/61] hw/intc/arm_gicv3_redist: Factor out "update hpplpi for one LPI" logic Date: Fri, 22 Apr 2022 11:03:58 +0100 Message-Id: <20220422100432.2288247-28-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650624905167100003 Content-Type: text/plain; charset="utf-8" Currently the functions which update the highest priority pending LPI information by looking at the LPI Pending and Configuration tables are hard-coded to use the physical LPI tables addressed by GICR_PENDBASER and GICR_PROPBASER. To support virtual LPIs we will need to do essentially the same job, but looking at the current virtual LPI Pending and Configuration tables and updating cs->hppvlpi instead of cs->hpplpi. Factor out the common part of the gicv3_redist_check_lpi_priority() function into a new update_for_one_lpi() function, which updates a PendingIrq struct if the specified LPI is higher priority than what is currently recorded there. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-28-peter.maydell@linaro.org --- hw/intc/arm_gicv3_redist.c | 74 ++++++++++++++++++++++++-------------- 1 file changed, 47 insertions(+), 27 deletions(-) diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c index 3464972c139..571e0fa8309 100644 --- a/hw/intc/arm_gicv3_redist.c +++ b/hw/intc/arm_gicv3_redist.c @@ -60,6 +60,49 @@ static uint32_t gicr_read_bitmap_reg(GICv3CPUState *cs, = MemTxAttrs attrs, return reg; } =20 +/** + * update_for_one_lpi: Update pending information if this LPI is better + * + * @cs: GICv3CPUState + * @irq: interrupt to look up in the LPI Configuration table + * @ctbase: physical address of the LPI Configuration table to use + * @ds: true if priority value should not be shifted + * @hpp: points to pending information to update + * + * Look up @irq in the Configuration table specified by @ctbase + * to see if it is enabled and what its priority is. If it is an + * enabled interrupt with a higher priority than that currently + * recorded in @hpp, update @hpp. + */ +static void update_for_one_lpi(GICv3CPUState *cs, int irq, + uint64_t ctbase, bool ds, PendingIrq *hpp) +{ + uint8_t lpite; + uint8_t prio; + + address_space_read(&cs->gic->dma_as, + ctbase + ((irq - GICV3_LPI_INTID_START) * sizeof(lp= ite)), + MEMTXATTRS_UNSPECIFIED, &lpite, sizeof(lpite)); + + if (!(lpite & LPI_CTE_ENABLED)) { + return; + } + + if (ds) { + prio =3D lpite & LPI_PRIORITY_MASK; + } else { + prio =3D ((lpite & LPI_PRIORITY_MASK) >> 1) | 0x80; + } + + if ((prio < hpp->prio) || + ((prio =3D=3D hpp->prio) && (irq <=3D hpp->irq))) { + hpp->irq =3D irq; + hpp->prio =3D prio; + /* LPIs and vLPIs are always non-secure Grp1 interrupts */ + hpp->grp =3D GICV3_G1NS; + } +} + static uint8_t gicr_read_ipriorityr(GICv3CPUState *cs, MemTxAttrs attrs, int irq) { @@ -598,34 +641,11 @@ MemTxResult gicv3_redist_write(void *opaque, hwaddr o= ffset, uint64_t data, =20 static void gicv3_redist_check_lpi_priority(GICv3CPUState *cs, int irq) { - AddressSpace *as =3D &cs->gic->dma_as; - uint64_t lpict_baddr; - uint8_t lpite; - uint8_t prio; + uint64_t lpict_baddr =3D cs->gicr_propbaser & R_GICR_PROPBASER_PHYADDR= _MASK; =20 - lpict_baddr =3D cs->gicr_propbaser & R_GICR_PROPBASER_PHYADDR_MASK; - - address_space_read(as, lpict_baddr + ((irq - GICV3_LPI_INTID_START) * - sizeof(lpite)), MEMTXATTRS_UNSPECIFIED, &lpite, - sizeof(lpite)); - - if (!(lpite & LPI_CTE_ENABLED)) { - return; - } - - if (cs->gic->gicd_ctlr & GICD_CTLR_DS) { - prio =3D lpite & LPI_PRIORITY_MASK; - } else { - prio =3D ((lpite & LPI_PRIORITY_MASK) >> 1) | 0x80; - } - - if ((prio < cs->hpplpi.prio) || - ((prio =3D=3D cs->hpplpi.prio) && (irq <=3D cs->hpplpi.irq))) { - cs->hpplpi.irq =3D irq; - cs->hpplpi.prio =3D prio; - /* LPIs are always non-secure Grp1 interrupts */ - cs->hpplpi.grp =3D GICV3_G1NS; - } + update_for_one_lpi(cs, irq, lpict_baddr, + cs->gic->gicd_ctlr & GICD_CTLR_DS, + &cs->hpplpi); } =20 void gicv3_redist_update_lpi_only(GICv3CPUState *cs) --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650626001; cv=none; d=zohomail.com; s=zohoarc; b=YPQl7Kzp8hB7qWsfQIKV6LN5etZbkVIfIhqaqoNGFACSzuHv/pBIYLrNwQCzx+3yOJhzG+LZAQMkY1FvZ6TRW8DcRotsEdHiHiRjnDsKiGRCAnG8oXPGi2MVQvYY/XjA5lV/vhD5MuWf0DagC9Vk3+9nXAnqJ1r0TWQZYGtCWAQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650626001; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Jjd65YXtvG5lQwdp8xCN6MNJ/6af5LF+gZQZc18vANc=; b=KC+6aa57L8vv+VcU7waiIRzSvwHhx6xk1WL2ZbC9611iA8gsZE/ncgwJwhc3cE/N6N648VbToP4Ltj/cur9NCqECUhe5sLlHyJ9a0R4PhMgDlEe411xvdFOMT8ibNy94uHd+a4SgBQytNz8Zat4FFb8mY+SmIUG4l2W2vBydh5o= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650626001727150.41025703651883; Fri, 22 Apr 2022 04:13:21 -0700 (PDT) Received: from localhost ([::1]:54220 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhrE0-0007vG-NN for importer2@patchew.org; Fri, 22 Apr 2022 07:13:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58648) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhq9v-0004hs-TJ for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:03 -0400 Received: from mail-wm1-x332.google.com ([2a00:1450:4864:20::332]:45671) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhq9t-0002eQ-RJ for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:03 -0400 Received: by mail-wm1-x332.google.com with SMTP id 17-20020a05600c021100b00393a19f8f98so2067545wmi.4 for ; Fri, 22 Apr 2022 03:05:01 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.04.59 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=Jjd65YXtvG5lQwdp8xCN6MNJ/6af5LF+gZQZc18vANc=; b=B4Sl8ZxDwKQhJtVN/Tqi/ox3tQspIR6X5wPY9cPIeSPOEnFk4Eq3SVsbo2Mf2CVBCB Aa14u3qm4KkuxykUXBCZUgfxWcdvFEgNjPH6WPaGuh7k3UuU17diUmaN5PlEKArXFGBZ 7yo8CfQ+f/1o9uzQS7iZzt4+H0R18IEFXjoHV8KNZZsheiY+txq3TXjfuR/twwAIBdcQ rwmXJZ1uWeSCP6DYzmQSiEGMIlweaWzKKgLyoUxKnyGSGUkgyjsK1vP5z+A20zOnErY1 CazuOvQ2m2lJrtFQPQlzFlKa8NKy0MTPK9t30q8m9von5u/d0KnrtpuduJz7GxJehKBo 2vgQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Jjd65YXtvG5lQwdp8xCN6MNJ/6af5LF+gZQZc18vANc=; b=YZem6fI7BCw2BJ0aolYS92gNc8veQVk4yIclQtzbNUQwieRlzEAH3aPDTT7XgCRPQ7 iO+wLjWgvluZOG2gzmJ8TEvT6IP8JNjiCIwuaieATDcqRyGRFl35pHdcKdj3Nyr2Pl+p OWDCsldzdpY1Afgx4LtfupIjeVV98h9GZ/gl2Rh6y+ngDZ9dH67mcfZrZtU97JloKAzF hWwvSEG4sv8j8YvZylV8vNOx9+aF3JCSknnJpHhBYr/VQTH/cbmmPLXfRHZ70tv2flN/ 79zx3tIMl8/Q/JUnskj9ftCdJVo6fn1J/T+aZeHWy9siWIeHkQjSo3ITURTwRC39pGPk 0l2Q== X-Gm-Message-State: AOAM532mo+15FoDjP02W8xj4SIPMR8yFtZyQF8RdD137YwIPYV6DgjUr brprgBgu7cL+MwSIpU/BQePmzf5qmwGePQ== X-Google-Smtp-Source: ABdhPJzIoMj79gc07joTnRCTThs+pGBegKS1gTGe88h0KxYLBl9jAML6bX9igvkPUN4TryZDFoGzug== X-Received: by 2002:a7b:c5cd:0:b0:38c:8b1b:d220 with SMTP id n13-20020a7bc5cd000000b0038c8b1bd220mr3397663wmk.118.1650621900418; Fri, 22 Apr 2022 03:05:00 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 28/61] hw/intc/arm_gicv3_redist: Factor out "update hpplpi for all LPIs" logic Date: Fri, 22 Apr 2022 11:03:59 +0100 Message-Id: <20220422100432.2288247-29-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650626003924100001 Content-Type: text/plain; charset="utf-8" Factor out the common part of gicv3_redist_update_lpi_only() into a new function update_for_all_lpis(), which does a full rescan of an LPI Pending table and sets the specified PendingIrq struct with the highest priority pending enabled LPI it finds. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-29-peter.maydell@linaro.org --- hw/intc/arm_gicv3_redist.c | 66 ++++++++++++++++++++++++++------------ 1 file changed, 46 insertions(+), 20 deletions(-) diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c index 571e0fa8309..2379389d14e 100644 --- a/hw/intc/arm_gicv3_redist.c +++ b/hw/intc/arm_gicv3_redist.c @@ -103,6 +103,48 @@ static void update_for_one_lpi(GICv3CPUState *cs, int = irq, } } =20 +/** + * update_for_all_lpis: Fully scan LPI tables and find best pending LPI + * + * @cs: GICv3CPUState + * @ptbase: physical address of LPI Pending table + * @ctbase: physical address of LPI Configuration table + * @ptsizebits: size of tables, specified as number of interrupt ID bits m= inus 1 + * @ds: true if priority value should not be shifted + * @hpp: points to pending information to set + * + * Recalculate the highest priority pending enabled LPI from scratch, + * and set @hpp accordingly. + * + * We scan the LPI pending table @ptbase; for each pending LPI, we read the + * corresponding entry in the LPI configuration table @ctbase to extract + * the priority and enabled information. + * + * We take @ptsizebits in the form idbits-1 because this is the way that + * LPI table sizes are architecturally specified in GICR_PROPBASER.IDBits + * and in the VMAPP command's VPT_size field. + */ +static void update_for_all_lpis(GICv3CPUState *cs, uint64_t ptbase, + uint64_t ctbase, unsigned ptsizebits, + bool ds, PendingIrq *hpp) +{ + AddressSpace *as =3D &cs->gic->dma_as; + uint8_t pend; + uint32_t pendt_size =3D (1ULL << (ptsizebits + 1)); + int i, bit; + + hpp->prio =3D 0xff; + + for (i =3D GICV3_LPI_INTID_START / 8; i < pendt_size / 8; i++) { + address_space_read(as, ptbase + i, MEMTXATTRS_UNSPECIFIED, &pend, = 1); + while (pend) { + bit =3D ctz32(pend); + update_for_one_lpi(cs, i * 8 + bit, ctbase, ds, hpp); + pend &=3D ~(1 << bit); + } + } +} + static uint8_t gicr_read_ipriorityr(GICv3CPUState *cs, MemTxAttrs attrs, int irq) { @@ -657,11 +699,7 @@ void gicv3_redist_update_lpi_only(GICv3CPUState *cs) * priority is lower than the last computed high priority lpi interrup= t. * If yes, replace current LPI as the new high priority lpi interrupt. */ - AddressSpace *as =3D &cs->gic->dma_as; - uint64_t lpipt_baddr; - uint32_t pendt_size =3D 0; - uint8_t pend; - int i, bit; + uint64_t lpipt_baddr, lpict_baddr; uint64_t idbits; =20 idbits =3D MIN(FIELD_EX64(cs->gicr_propbaser, GICR_PROPBASER, IDBITS), @@ -671,23 +709,11 @@ void gicv3_redist_update_lpi_only(GICv3CPUState *cs) return; } =20 - cs->hpplpi.prio =3D 0xff; - lpipt_baddr =3D cs->gicr_pendbaser & R_GICR_PENDBASER_PHYADDR_MASK; + lpict_baddr =3D cs->gicr_propbaser & R_GICR_PROPBASER_PHYADDR_MASK; =20 - /* Determine the highest priority pending interrupt among LPIs */ - pendt_size =3D (1ULL << (idbits + 1)); - - for (i =3D GICV3_LPI_INTID_START / 8; i < pendt_size / 8; i++) { - address_space_read(as, lpipt_baddr + i, MEMTXATTRS_UNSPECIFIED, &p= end, - sizeof(pend)); - - while (pend) { - bit =3D ctz32(pend); - gicv3_redist_check_lpi_priority(cs, i * 8 + bit); - pend &=3D ~(1 << bit); - } - } + update_for_all_lpis(cs, lpipt_baddr, lpict_baddr, idbits, + cs->gic->gicd_ctlr & GICD_CTLR_DS, &cs->hpplpi); } =20 void gicv3_redist_update_lpi(GICv3CPUState *cs) --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.00 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=PdLMMw5e/CkRPkREdXaW3qct/qWLck3R567GcZMXhrc=; b=GUTL6/UzGInFbTI/NIpLFOtDjolpt0Oao0s6MxWGJVoj3zwtYXwc3HbmET22bvOnZY fLktZHlKZdmGPSR1C36UE+oT5/r9tatJfCBV8gOGvzLC6VqpXBkV7CJ6MPLIajeHr/Ct 3VdSsoB8kHISo9F0TN+ZkvN3um7LkcJ4AxXGnb/6bUF9rx/nL/RUiDKlYoB8+5p2wq27 zHaC5gIny3NPFSJEqOGmYjSTYDq2b+c0pOSQ9XNT/t7MwB9eh+qBMYjqK+93zoMMXjpd v411up325xjbON8iFlGdGLwBMY5MqbZugEJUHe2lIaDwpCFuwZX32ZRlRMEKVuPFUQ0m qzNA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PdLMMw5e/CkRPkREdXaW3qct/qWLck3R567GcZMXhrc=; b=4QdqM1sNSs7An2QP+tBhfhEZ+fQ/N9t6MxGZBzaRbV+FV2C6vRNDqxps3d7ffRL0Fh Q1c9lE+VcLbHAJSpaj7TYy1nh836Se8U8ihD2R531PnzByWVcUKO266abqPJTWb9xf5y 53NNBwCHhshJ4CM6n7zIAEAG1lOpuYY5bIxh2THhnn92vZOD4XJx28HAb7SZFbJ2Flpw D0+brgbRGL8q4a8/RbmkiPt2dgFu0WySAT0DjWuBRcnhMEDq5gLJOB88ykMpltTVvhoF FOFTz7s6w8X9mLvHdM8Dh0JG18efLQdUYDd6t7w55TEBqCIq2SzrgZjCIFNeCrUFUAiv sVoA== X-Gm-Message-State: AOAM530o/oQqBmM/MEuBO+CSKlGpe4ucCGomphzAVFjTRJvPn6hFGRVP lt9PWIB85I87PERH4k3Ilsbuqmk7L4DMSA== X-Google-Smtp-Source: ABdhPJz8xMz9soF9Q5BUfFpv3EsQvdsBA/C585rKd7qJUYoMTGhaUnOZNJFEvmoS6vVOirjy79fbCg== X-Received: by 2002:a05:6000:1789:b0:20a:9fbc:b1b5 with SMTP id e9-20020a056000178900b0020a9fbcb1b5mr3028148wrg.581.1650621901406; Fri, 22 Apr 2022 03:05:01 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 29/61] hw/intc/arm_gicv3_redist: Recalculate hppvlpi on VPENDBASER writes Date: Fri, 22 Apr 2022 11:04:00 +0100 Message-Id: <20220422100432.2288247-30-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650623985608100001 Content-Type: text/plain; charset="utf-8" The guest uses GICR_VPENDBASER to tell the redistributor when it is scheduling or descheduling a vCPU. When it writes and changes the VALID bit from 0 to 1, it is scheduling a vCPU, and we must update our view of the current highest priority pending vLPI from the new Pending and Configuration tables. When it writes and changes the VALID bit from 1 to 0, it is descheduling, which means that there is no longer a highest priority pending vLPI. The specification allows the implementation to use part of the vLPI Pending table as an IMPDEF area where it can cache information when a vCPU is descheduled, so that it can avoid having to do a full rescan of the tables when the vCPU is scheduled again. For now, we don't take advantage of this, and simply do a complete rescan. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-30-peter.maydell@linaro.org --- hw/intc/arm_gicv3_redist.c | 87 ++++++++++++++++++++++++++++++++++++-- 1 file changed, 84 insertions(+), 3 deletions(-) diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c index 2379389d14e..bfdde36a206 100644 --- a/hw/intc/arm_gicv3_redist.c +++ b/hw/intc/arm_gicv3_redist.c @@ -185,6 +185,87 @@ static void gicr_write_ipriorityr(GICv3CPUState *cs, M= emTxAttrs attrs, int irq, cs->gicr_ipriorityr[irq] =3D value; } =20 +static void gicv3_redist_update_vlpi_only(GICv3CPUState *cs) +{ + uint64_t ptbase, ctbase, idbits; + + if (!FIELD_EX64(cs->gicr_vpendbaser, GICR_VPENDBASER, VALID)) { + cs->hppvlpi.prio =3D 0xff; + return; + } + + ptbase =3D cs->gicr_vpendbaser & R_GICR_VPENDBASER_PHYADDR_MASK; + ctbase =3D cs->gicr_vpropbaser & R_GICR_VPROPBASER_PHYADDR_MASK; + idbits =3D FIELD_EX64(cs->gicr_vpropbaser, GICR_VPROPBASER, IDBITS); + + update_for_all_lpis(cs, ptbase, ctbase, idbits, true, &cs->hppvlpi); +} + +static void gicv3_redist_update_vlpi(GICv3CPUState *cs) +{ + gicv3_redist_update_vlpi_only(cs); + gicv3_cpuif_virt_irq_fiq_update(cs); +} + +static void gicr_write_vpendbaser(GICv3CPUState *cs, uint64_t newval) +{ + /* Write @newval to GICR_VPENDBASER, handling its effects */ + bool oldvalid =3D FIELD_EX64(cs->gicr_vpendbaser, GICR_VPENDBASER, VAL= ID); + bool newvalid =3D FIELD_EX64(newval, GICR_VPENDBASER, VALID); + bool pendinglast; + + /* + * The DIRTY bit is read-only and for us is always zero; + * other fields are writeable. + */ + newval &=3D R_GICR_VPENDBASER_INNERCACHE_MASK | + R_GICR_VPENDBASER_SHAREABILITY_MASK | + R_GICR_VPENDBASER_PHYADDR_MASK | + R_GICR_VPENDBASER_OUTERCACHE_MASK | + R_GICR_VPENDBASER_PENDINGLAST_MASK | + R_GICR_VPENDBASER_IDAI_MASK | + R_GICR_VPENDBASER_VALID_MASK; + + if (oldvalid && newvalid) { + /* + * Changing other fields while VALID is 1 is UNPREDICTABLE; + * we choose to log and ignore the write. + */ + if (cs->gicr_vpendbaser ^ newval) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: Changing GICR_VPENDBASER when VALID=3D1 " + "is UNPREDICTABLE\n", __func__); + } + return; + } + if (!oldvalid && !newvalid) { + cs->gicr_vpendbaser =3D newval; + return; + } + + if (newvalid) { + /* + * Valid going from 0 to 1: update hppvlpi from tables. + * If IDAI is 0 we are allowed to use the info we cached in + * the IMPDEF area of the table. + * PendingLast is RES1 when we make this transition. + */ + pendinglast =3D true; + } else { + /* + * Valid going from 1 to 0: + * Set PendingLast if there was a pending enabled interrupt + * for the vPE that was just descheduled. + * If we cache info in the IMPDEF area, write it out here. + */ + pendinglast =3D cs->hppvlpi.prio !=3D 0xff; + } + + newval =3D FIELD_DP64(newval, GICR_VPENDBASER, PENDINGLAST, pendinglas= t); + cs->gicr_vpendbaser =3D newval; + gicv3_redist_update_vlpi(cs); +} + static MemTxResult gicr_readb(GICv3CPUState *cs, hwaddr offset, uint64_t *data, MemTxAttrs attrs) { @@ -493,10 +574,10 @@ static MemTxResult gicr_writel(GICv3CPUState *cs, hwa= ddr offset, cs->gicr_vpropbaser =3D deposit64(cs->gicr_vpropbaser, 32, 32, val= ue); return MEMTX_OK; case GICR_VPENDBASER: - cs->gicr_vpendbaser =3D deposit64(cs->gicr_vpendbaser, 0, 32, valu= e); + gicr_write_vpendbaser(cs, deposit64(cs->gicr_vpendbaser, 0, 32, va= lue)); return MEMTX_OK; case GICR_VPENDBASER + 4: - cs->gicr_vpendbaser =3D deposit64(cs->gicr_vpendbaser, 32, 32, val= ue); + gicr_write_vpendbaser(cs, deposit64(cs->gicr_vpendbaser, 32, 32, v= alue)); return MEMTX_OK; default: return MEMTX_ERROR; @@ -557,7 +638,7 @@ static MemTxResult gicr_writell(GICv3CPUState *cs, hwad= dr offset, cs->gicr_vpropbaser =3D value; return MEMTX_OK; case GICR_VPENDBASER: - cs->gicr_vpendbaser =3D value; + gicr_write_vpendbaser(cs, value); return MEMTX_OK; default: return MEMTX_ERROR; --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.01 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=PX0NLhcQng/vzkYLEUDXWQWxmx/78hsVtwkLTCrl74k=; b=zwfq1Es7nurcUCHl/O7JMglGaIgN9lkvHmtImvbdg3RGjxz4LehQHhS/pPeYXzE27l PujXVj0//2Fex81DEkrS5tYYMBJxyNk/x5y+Zo47dnaRmUbgA9Nt1F30xSDncjt9rAuJ WDBY6gdYKLO6ZKylqN5VF1X6D8pXtZpfF3GlgOY9v991FPbCOwBkol/C3YJvqYmGIU/x TYufT1TgYvanddheOzu6chJMhN70/fP3edJzHdJ3TpgUpvwernsHdcJqrM1bvRIesWXJ Elgj0CSsyugIAbsPbSeNBbKxfEM5kOS7RwmWmhL7XbqeJmqKuE50xF7JNhMQAnAqpo7v fSOQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PX0NLhcQng/vzkYLEUDXWQWxmx/78hsVtwkLTCrl74k=; b=XPExODtDuxmG3Ik2xYuocTlRfiqCrMQWq/P0xX4xSw/GQT+Xu/g4VJtJFFPuMu8drv b3FEHHW7y6GsQ1zowxTSYkrDtAqYnd9sVs70x9aePrWrhqBLN94Cr/Pw1QFaiDLUHg5T 1xJbN2Rahiuu7eoXI+q1P+aa7T7yoZgO1Fy35PZnXaITi4RFmA79ABMBYQJzOTcl+4t0 7b6J3sir65/QmeAKgGeNTr/gqoZ8kmllZA8RUmZdFyLQFTQpsIlJ5fbXMMblCTzlc4oq PIGjESvT9ijKQKiNIBJh4sMe0fEVXvbEDppFu11yL+SGr1NimYxpDShGJQDpbC60d3Wk JKmw== X-Gm-Message-State: AOAM533E7X7CMHP7MTMqv21exSAKo+JYPlOQ3d7zMRp3HkCy6kMyVlLx WZRwuyfCkCtRLlPQz3L3jzgfz8LWQZE4fw== X-Google-Smtp-Source: ABdhPJym6XLQwnB9lZDZMJPcJAjHGbLAUQrrbtj/8upDLeG59Ou4/36gZIhcuT81R4jJPt5CXNWNaQ== X-Received: by 2002:a5d:6e87:0:b0:206:452:5b87 with SMTP id k7-20020a5d6e87000000b0020604525b87mr2987799wrz.473.1650621902288; Fri, 22 Apr 2022 03:05:02 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 30/61] hw/intc/arm_gicv3_redist: Factor out "update bit in pending table" code Date: Fri, 22 Apr 2022 11:04:01 +0100 Message-Id: <20220422100432.2288247-31-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650622861544100001 Content-Type: text/plain; charset="utf-8" Factor out the code which sets a single bit in an LPI pending table. We're going to need this for handling vLPI tables, not just the physical LPI table. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-31-peter.maydell@linaro.org --- hw/intc/arm_gicv3_redist.c | 49 +++++++++++++++++++++++--------------- 1 file changed, 30 insertions(+), 19 deletions(-) diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c index bfdde36a206..d54ed9a0332 100644 --- a/hw/intc/arm_gicv3_redist.c +++ b/hw/intc/arm_gicv3_redist.c @@ -145,6 +145,34 @@ static void update_for_all_lpis(GICv3CPUState *cs, uin= t64_t ptbase, } } =20 +/** + * set_lpi_pending_bit: Set or clear pending bit for an LPI + * + * @cs: GICv3CPUState + * @ptbase: physical address of LPI Pending table + * @irq: LPI to change pending state for + * @level: false to clear pending state, true to set + * + * Returns true if we needed to do something, false if the pending bit + * was already at @level. + */ +static bool set_pending_table_bit(GICv3CPUState *cs, uint64_t ptbase, + int irq, bool level) +{ + AddressSpace *as =3D &cs->gic->dma_as; + uint64_t addr =3D ptbase + irq / 8; + uint8_t pend; + + address_space_read(as, addr, MEMTXATTRS_UNSPECIFIED, &pend, 1); + if (extract32(pend, irq % 8, 1) =3D=3D level) { + /* Bit already at requested state, no action required */ + return false; + } + pend =3D deposit32(pend, irq % 8, 1, level ? 1 : 0); + address_space_write(as, addr, MEMTXATTRS_UNSPECIFIED, &pend, 1); + return true; +} + static uint8_t gicr_read_ipriorityr(GICv3CPUState *cs, MemTxAttrs attrs, int irq) { @@ -809,30 +837,13 @@ void gicv3_redist_lpi_pending(GICv3CPUState *cs, int = irq, int level) * This function updates the pending bit in lpi pending table for * the irq being activated or deactivated. */ - AddressSpace *as =3D &cs->gic->dma_as; uint64_t lpipt_baddr; - bool ispend =3D false; - uint8_t pend; =20 - /* - * get the bit value corresponding to this irq in the - * lpi pending table - */ lpipt_baddr =3D cs->gicr_pendbaser & R_GICR_PENDBASER_PHYADDR_MASK; - - address_space_read(as, lpipt_baddr + ((irq / 8) * sizeof(pend)), - MEMTXATTRS_UNSPECIFIED, &pend, sizeof(pend)); - - ispend =3D extract32(pend, irq % 8, 1); - - /* no change in the value of pending bit, return */ - if (ispend =3D=3D level) { + if (!set_pending_table_bit(cs, lpipt_baddr, irq, level)) { + /* no change in the value of pending bit, return */ return; } - pend =3D deposit32(pend, irq % 8, 1, level ? 1 : 0); - - address_space_write(as, lpipt_baddr + ((irq / 8) * sizeof(pend)), - MEMTXATTRS_UNSPECIFIED, &pend, sizeof(pend)); =20 /* * check if this LPI is better than the current hpplpi, if yes --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650626233; cv=none; d=zohomail.com; s=zohoarc; b=cJVsIDTI9ea4KplR+hWzjNySkMq8YGhxNoYBaL9PudIg9reeKCArOWFqTd28EwMbDVNYbJH4+6vTGD9GMSQTiU95x0eA0ir5wsZjX8CDWYO8/yFaeyEv9HcBbqclDcMK5EE0YpEX2ddwcMg/hPR1t1zVoORQB/t+Hq479jawdjk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650626233; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=jiS+itmO7Fo/3fiG/QD88OIh41bUATPpy7hpLVT0VSI=; b=aHkASsqg3ztJ1Fa2CpDvVP8GPDq8vjFCGDPE9YRLZxT9UYQFW0DQLj61RNBIfS9pmqqoqOmm7YvQW4oDmNDEgeF8pinMt864GTKOJHG7iT7BKjyESPtI+ZAKlZi5SG/vkqL1NyK2YZHG6IZWjhp97njcbqhjCqph/1SnmeI4osA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650626233807151.49698353557915; Fri, 22 Apr 2022 04:17:13 -0700 (PDT) Received: from localhost ([::1]:34700 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhrHk-0005gV-Ob for importer2@patchew.org; Fri, 22 Apr 2022 07:17:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58736) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhq9z-0004pm-0R for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:07 -0400 Received: from mail-wr1-x42b.google.com ([2a00:1450:4864:20::42b]:36575) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhq9w-0002j9-DC for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:06 -0400 Received: by mail-wr1-x42b.google.com with SMTP id u3so10335960wrg.3 for ; Fri, 22 Apr 2022 03:05:03 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.02 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=jiS+itmO7Fo/3fiG/QD88OIh41bUATPpy7hpLVT0VSI=; b=uEw3R04ibjWVV7VnQE0HSKR5EsUQzrLFyvDJno1VljzVAUGV4jJaJm3apZiNWjg5fX ffXZr8CMfWxdWXJXPd56kNMDHJAER8fsoMjTScIR9BulaMj4toV5xcaupL70RstFLj+w A5nr5SwRsSIk94kBTrdy8iDqcjaFlNAe28AagCfNE/6tqI4OZaYXe415FVctniA65OuV 9uRhLffVHPTSMoh7QL+AV+GVz1IPYt+CZMRndnnE1E9OaIT57/rrR6r3s22k8lFKLt7o RmRsTItxvP2Tn1RPPmnEOA9vKF1L04CNhet0SfowJuSdin/jaFuM4oNIxjN+OLgd2ZRi j2mg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=jiS+itmO7Fo/3fiG/QD88OIh41bUATPpy7hpLVT0VSI=; b=IrNL+j5P1kxRJWTOECoqonw0nbD24t9UddySRMtOoGpvLKEck7sfjWIkrcTFIzascZ UpXy6LRmjFXYOkf7G5w+VKSJYLYixHOUSGIFX/oEZ+uIRPNk4myK0NVp7EnssQJde27S WL4tZR19hGKyeyFbZu31xYkD8vhjnLcym/Cr8PMgFKJinFcUTHf8MAtvTtVBlF6N+RES Q1Q3cvgLobZfcChJJT9pvo+VhP0e6tra3KhmZfIW8WDSe02k8tCsMMspdnRpw8EWyF2w YR6wDqBuz1+GxY4xAsXeWABm1IE8bgYmq6kQYvBkI7QhxYT+ZJTkS1BJn/ncosAbPoV6 lcoQ== X-Gm-Message-State: AOAM530apgHc2pzKxCzc3vkyp9RPk1EX1bb5TnnWCxbFnzEtrpuicNRG 7fOax2Hw0DHoHAyOezAbeUpxNV/chyAduA== X-Google-Smtp-Source: ABdhPJxr353VHSlPa/6ObdeFo1ESLupmsi37MgYPR+hiOtU11tKo9PWDv2MQSwCszUdk3JttarJryQ== X-Received: by 2002:a05:6000:8b:b0:207:b80e:c711 with SMTP id m11-20020a056000008b00b00207b80ec711mr3122993wrx.178.1650621903017; Fri, 22 Apr 2022 03:05:03 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 31/61] hw/intc/arm_gicv3_redist: Implement gicv3_redist_process_vlpi() Date: Fri, 22 Apr 2022 11:04:02 +0100 Message-Id: <20220422100432.2288247-32-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650626235707100001 Content-Type: text/plain; charset="utf-8" Implement the function gicv3_redist_process_vlpi(), which was left as just a stub earlier. This function deals with being handed a VLPI by the ITS. It must set the bit in the pending table. If the vCPU is currently resident we must recalculate the highest priority pending vLPI; otherwise we may need to ring a "doorbell" interrupt to let the hypervisor know it might want to reschedule the vCPU. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-32-peter.maydell@linaro.org --- hw/intc/arm_gicv3_redist.c | 48 ++++++++++++++++++++++++++++++++++---- 1 file changed, 44 insertions(+), 4 deletions(-) diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c index d54ed9a0332..1ed251b87be 100644 --- a/hw/intc/arm_gicv3_redist.c +++ b/hw/intc/arm_gicv3_redist.c @@ -60,6 +60,19 @@ static uint32_t gicr_read_bitmap_reg(GICv3CPUState *cs, = MemTxAttrs attrs, return reg; } =20 +static bool vcpu_resident(GICv3CPUState *cs, uint64_t vptaddr) +{ + /* + * Return true if a vCPU is resident, which is defined by + * whether the GICR_VPENDBASER register is marked VALID and + * has the right virtual pending table address. + */ + if (!FIELD_EX64(cs->gicr_vpendbaser, GICR_VPENDBASER, VALID)) { + return false; + } + return vptaddr =3D=3D (cs->gicr_vpendbaser & R_GICR_VPENDBASER_PHYADDR= _MASK); +} + /** * update_for_one_lpi: Update pending information if this LPI is better * @@ -1004,10 +1017,37 @@ void gicv3_redist_vlpi_pending(GICv3CPUState *cs, i= nt irq, int level) void gicv3_redist_process_vlpi(GICv3CPUState *cs, int irq, uint64_t vptadd= r, int doorbell, int level) { - /* - * The redistributor handling for being handed a VLPI by the ITS - * will be added in a subsequent commit. - */ + bool bit_changed; + bool resident =3D vcpu_resident(cs, vptaddr); + uint64_t ctbase; + + if (resident) { + uint32_t idbits =3D FIELD_EX64(cs->gicr_vpropbaser, GICR_VPROPBASE= R, IDBITS); + if (irq >=3D (1ULL << (idbits + 1))) { + return; + } + } + + bit_changed =3D set_pending_table_bit(cs, vptaddr, irq, level); + if (resident && bit_changed) { + if (level) { + /* Check whether this vLPI is now the best */ + ctbase =3D cs->gicr_vpropbaser & R_GICR_VPROPBASER_PHYADDR_MAS= K; + update_for_one_lpi(cs, irq, ctbase, true, &cs->hppvlpi); + gicv3_cpuif_virt_irq_fiq_update(cs); + } else { + /* Only need to recalculate if this was previously the best vL= PI */ + if (irq =3D=3D cs->hppvlpi.irq) { + gicv3_redist_update_vlpi(cs); + } + } + } + + if (!resident && level && doorbell !=3D INTID_SPURIOUS && + (cs->gicr_ctlr & GICR_CTLR_ENABLE_LPIS)) { + /* vCPU is not currently resident: ring the doorbell */ + gicv3_redist_process_lpi(cs, doorbell, 1); + } } =20 void gicv3_redist_mov_vlpi(GICv3CPUState *src, uint64_t src_vptaddr, --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650624270; cv=none; d=zohomail.com; s=zohoarc; b=A0f7ujTZcZq2ysdRJYqxz/+iVgWXniw8sOJAX54IWh48QqVpUuSNm3o/E5E6lDHnU7gWaUi9krEJndwCxu3ghcBzCY1NCJXkfesM8tM/7H2xwTgeyIb6NVKTmw0T1kBA9Q4vTRlOPND1KqBMR1oyHRK9Roj3h6NoC33NYqbxwUg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650624270; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Fd3KVJcBKmzClgCV6dFquqvBXsUvGLaOK7cLjXe1F7c=; b=JDpiXWuAQarEup6m/jXF3BtvHvPsT5HapR28qc2zbe21FFKGJI4U4S//hh4bpWbIPc8QJETvLbrFYI8+QP3iDNt/TJTuOprYt+F5JiHUo3SLdlgeb1Za5QOc/CxyYYixoV25uGPrlJ1oTAJUwZVwbMf4OfPaKTELVywzRII+atk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650624270263140.10999310476166; Fri, 22 Apr 2022 03:44:30 -0700 (PDT) Received: from localhost ([::1]:59306 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhqm4-0007lw-RO for importer2@patchew.org; Fri, 22 Apr 2022 06:44:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58856) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhqA3-0004xw-1C for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:11 -0400 Received: from mail-wm1-x32d.google.com ([2a00:1450:4864:20::32d]:51054) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhq9x-0002pn-J3 for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:10 -0400 Received: by mail-wm1-x32d.google.com with SMTP id r19so4805432wmq.0 for ; Fri, 22 Apr 2022 03:05:05 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.03 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=Fd3KVJcBKmzClgCV6dFquqvBXsUvGLaOK7cLjXe1F7c=; b=BLXX2csiLGOBJC0uhGqiuzQG5ybKZPT78oJ5pqQCEHb6oobkX0HEV83QFnTYZStJnU WGzgl9boRn8VWGSXh8P4seUQUGFP7ZMshXHxR+4tOoljmLvCfxUJj9RBnHWxFkXmjIB9 9JgMmbLyGpc+fJ1ecxB6zumd1TvK01v15ikC1FZRNgyv9RIFmT+dLvAdG27KWyRLsjI7 V6K12NYZdB7GpOMwpN0UjSxJ3CYbUEqbIB1XGnnw8eTi18UZNlPUyiZlysgZ+GWYB9M3 iDJFVDCxDVvLePpX5+wRhwOC486A0CHN2z1Np7S6PZ6O6ipEljz70qYYcNspafABkN6/ UX6A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Fd3KVJcBKmzClgCV6dFquqvBXsUvGLaOK7cLjXe1F7c=; b=Ge0ZjIqQ910uVD5B287QC1CI2hJ0b49k6hvhdb9P3u2u58N1uSumTqbXyszuZUY5gg mCHwDjh+qqOdoLBqnFAlSQg1rFEC+pXwTpo4YwALp2WxN/BIBwzdUqnfJVsTaneX8Nci y96fFct9aTl6I7YVAueX9y51tabSS6bOytb6W7Y6BIBsU1ZrhOPsMtmw4D8n/rmIAn83 z4Yd8tQCUnvJxL6yJ/27kWaqkb2gTNsR9Wv0QmF+F0ghYFK2up9GRrqq/qKqNq25jpJ3 lTnU7yp2HLpawBSwAzRWs+De6bLIJ7wa8Jofc6TlCNPlj5XbsGRXMNvvsuAb7imD2CF6 TXuw== X-Gm-Message-State: AOAM533718NbcQCFo8aXeVdgJboyROVx+I02bo4iWWjgn5T+CN/bBppj 0XNJmiNB7S86YX3aYHiR48Trrt4dnkkodQ== X-Google-Smtp-Source: ABdhPJyeH6xZNMLr3mO5DUGVdIXFbpOtBlVHt4TqRHDEUnCdSkSfk07loeTjxjToQU+tx4RGIhsa6Q== X-Received: by 2002:a05:600c:a06:b0:392:a4f2:2097 with SMTP id z6-20020a05600c0a0600b00392a4f22097mr12706970wmp.97.1650621904141; Fri, 22 Apr 2022 03:05:04 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 32/61] hw/intc/arm_gicv3_redist: Implement gicv3_redist_vlpi_pending() Date: Fri, 22 Apr 2022 11:04:03 +0100 Message-Id: <20220422100432.2288247-33-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650624271561100001 Content-Type: text/plain; charset="utf-8" Implement the function gicv3_redist_vlpi_pending(), which was previously left as a stub. This is the function that is called by the CPU interface when it changes the state of a vLPI. It's similar to gicv3_redist_process_vlpi(), but we know that the vCPU is definitely resident on the redistributor and the irq is in range, so it is a bit simpler. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-33-peter.maydell@linaro.org --- hw/intc/arm_gicv3_redist.c | 23 +++++++++++++++++++++-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c index 1ed251b87be..0fbb04f9986 100644 --- a/hw/intc/arm_gicv3_redist.c +++ b/hw/intc/arm_gicv3_redist.c @@ -1009,9 +1009,28 @@ void gicv3_redist_movall_lpis(GICv3CPUState *src, GI= Cv3CPUState *dest) void gicv3_redist_vlpi_pending(GICv3CPUState *cs, int irq, int level) { /* - * The redistributor handling for changing the pending state - * of a vLPI will be added in a subsequent commit. + * Change the pending state of the specified vLPI. + * Unlike gicv3_redist_process_vlpi(), we know here that the + * vCPU is definitely resident on this redistributor, and that + * the irq is in range. */ + uint64_t vptbase, ctbase; + + vptbase =3D FIELD_EX64(cs->gicr_vpendbaser, GICR_VPENDBASER, PHYADDR) = << 16; + + if (set_pending_table_bit(cs, vptbase, irq, level)) { + if (level) { + /* Check whether this vLPI is now the best */ + ctbase =3D cs->gicr_vpropbaser & R_GICR_VPROPBASER_PHYADDR_MAS= K; + update_for_one_lpi(cs, irq, ctbase, true, &cs->hppvlpi); + gicv3_cpuif_virt_irq_fiq_update(cs); + } else { + /* Only need to recalculate if this was previously the best vL= PI */ + if (irq =3D=3D cs->hppvlpi.irq) { + gicv3_redist_update_vlpi(cs); + } + } + } } =20 void gicv3_redist_process_vlpi(GICv3CPUState *cs, int irq, uint64_t vptadd= r, --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650626460; cv=none; d=zohomail.com; s=zohoarc; b=Wo1CEc6O5f52lP4x7JnvNxhlmupWCajs8XP6TlNKvILgt8W+BVlEb5x/iIHrPulE+aVtrjseb6vmIUvPdDrRbqVM50GqRjAsYj6GQ/U1xJhxEwCNPP0TWuZOEPvM0kp2Jw3VALG5F3O1MZEyW0kwr/wVGS7hRohBfQiYH8Ge3gY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650626460; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Sllr6EGIV1uqtp8xOnIt6F7gaB5mrGXL+fViUdJftLg=; b=VusS/DYvu0MJgiW6JFOE3wfEEauhEZZqUvAQyKBcb2rCPfucy1PlqfmfVH/t1lJ5bsVFLCelvGssDjHqY70UPt5fNxkmEQjDdm/zKvBKKjsZImOxIUs7YZEuo/b2AiHHKhGgVQ973dA5MuenuBZtt1QK73vTQTKf/aIbnbHFo3U= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650626460150233.16843633693122; Fri, 22 Apr 2022 04:21:00 -0700 (PDT) Received: from localhost ([::1]:42716 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhrLO-0002fd-V8 for importer2@patchew.org; Fri, 22 Apr 2022 07:20:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58766) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhqA0-0004tD-BC for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:08 -0400 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]:38897) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhq9y-0002qO-LL for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:08 -0400 Received: by mail-wm1-x330.google.com with SMTP id r187-20020a1c44c4000000b0038ccb70e239so7618497wma.3 for ; Fri, 22 Apr 2022 03:05:06 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.04 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=Sllr6EGIV1uqtp8xOnIt6F7gaB5mrGXL+fViUdJftLg=; b=BTIArm9xV7nueRM0VgmSqa4zA+lVIdper/Md3paLpjSU0rzXqvTWdbBDaPURIQ96YW gwfbbdeZ3VgtYY20JyZjATZV5T4nPzhY4/UbXEdpVDRV7S5zxWejSkxUUDQBIsfr+FPu 7ZiSqqjfHEjL7NouiktoYOOU+PIwfvFRbRkPdnBr6980sUPciyWaXgh4747ZTWhIs1WL 6vyPQB+24WjlPnhszEoSn08AnuWAi0RvacWA3iPLYNR7WQeA/rTNDFMEnZRPKZAYJnP6 1j13O/hI9kzrntITTLLJSzOrGfUa9jdAsIFIrdfJX8Tbb2dHc+u9sVzP3QhtsdeS1sEF I2LA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Sllr6EGIV1uqtp8xOnIt6F7gaB5mrGXL+fViUdJftLg=; b=f3ASIpr/W33N66LZ9AK0Bjl3g+Ejg93m8TPBKlavEprXuUNNYg2VkQBGqw6HRrlnah yXdGJllAtcZMFAy69b/e4iprAmG+2GGI0fyrK0Kl8bWq6kQrtLUiiSEhQDh0IW6Cgj8P uZfbzBwUU7sk20B4LC/2+mstO6lemoXcImRptIqTrbutWm61057lqS0UCInJlX9Z47V8 keNRjbZfE1H/ctEK5RcxyhMAHDOAHdJct7gK4QK4Ok+bMB4fGMDhTdDC1qZYlV6yVHfF qfUUd5tQIjhM6v+I+cvrjS0jCiTK5WtAQcUqlz6Y2N/p+fwkND3uZc1LAiqyfubgTUgk 0Ttw== X-Gm-Message-State: AOAM533nKTevcI4UO6OKruu1SzKb/jCXweZHRJmAzd3cZ9AX4WG6XW8W 8JLjsxNHO+U2QnhNvBemlpO7kTxBdFAnlQ== X-Google-Smtp-Source: ABdhPJyWGBTXA96+xCRmyLhhvdm0Fz8S36VHdE0oVTEx+Lt/+nvL5mQdjtMgRb0dyT6A22hTB4V6Zw== X-Received: by 2002:a05:600c:1e85:b0:391:ca59:76be with SMTP id be5-20020a05600c1e8500b00391ca5976bemr12412497wmb.184.1650621904981; Fri, 22 Apr 2022 03:05:04 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 33/61] hw/intc/arm_gicv3_redist: Use set_pending_table_bit() in mov handling Date: Fri, 22 Apr 2022 11:04:04 +0100 Message-Id: <20220422100432.2288247-34-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650626461398100001 Content-Type: text/plain; charset="utf-8" We can use our new set_pending_table_bit() utility function in gicv3_redist_mov_lpi() to clear the bit in the source pending table, rather than doing the "load, clear bit, store" ourselves. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-34-peter.maydell@linaro.org --- hw/intc/arm_gicv3_redist.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c index 0fbb04f9986..2c4a87318bc 100644 --- a/hw/intc/arm_gicv3_redist.c +++ b/hw/intc/arm_gicv3_redist.c @@ -909,11 +909,9 @@ void gicv3_redist_mov_lpi(GICv3CPUState *src, GICv3CPU= State *dest, int irq) * we choose to NOP. If LPIs are disabled on source there's nothing * to be transferred anyway. */ - AddressSpace *as =3D &src->gic->dma_as; uint64_t idbits; uint32_t pendt_size; uint64_t src_baddr; - uint8_t src_pend; =20 if (!(src->gicr_ctlr & GICR_CTLR_ENABLE_LPIS) || !(dest->gicr_ctlr & GICR_CTLR_ENABLE_LPIS)) { @@ -932,15 +930,10 @@ void gicv3_redist_mov_lpi(GICv3CPUState *src, GICv3CP= UState *dest, int irq) =20 src_baddr =3D src->gicr_pendbaser & R_GICR_PENDBASER_PHYADDR_MASK; =20 - address_space_read(as, src_baddr + (irq / 8), - MEMTXATTRS_UNSPECIFIED, &src_pend, sizeof(src_pend)= ); - if (!extract32(src_pend, irq % 8, 1)) { + if (!set_pending_table_bit(src, src_baddr, irq, 0)) { /* Not pending on source, nothing to do */ return; } - src_pend &=3D ~(1 << (irq % 8)); - address_space_write(as, src_baddr + (irq / 8), - MEMTXATTRS_UNSPECIFIED, &src_pend, sizeof(src_pend= )); if (irq =3D=3D src->hpplpi.irq) { /* * We just made this LPI not-pending so only need to update --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650623129; cv=none; d=zohomail.com; s=zohoarc; b=NRlwEJBwt9Hvx9LX6t13QSH7p51IqHIMiyb2LvoQPTOF+Y/BATa+Runr42tbhIM0OZiUUGKdHjq/pmVyAZfj95jlzInKG/dB6IvPeilSpTx9J/OKcO8d+GpPU402NhMmxQ6/kTqpuUHRGqYyGvWDG+wRcC0zYylKg+BtXthg760= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650623129; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=l5uJxy4WfAzOW7qSBnV+0WxIG9WxiypmDb7cHj2F97M=; b=BbtUA/4onIGxZ7FAwSqSI4dnYk7SVQtejr/6uju7amXruUztxHZ41DOk1S9DWonBhO3j67SEDka+deM3oIwS+VYZTNUpKSiWvtGbSK/H4TXnoDvJ5ZqQhQ7mcGh0+2M5EtIvTI+CBJ6vA9K0+3Dq7siOrXPVsLbJbF0s/7sTvaw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650623129009680.4377694282942; Fri, 22 Apr 2022 03:25:29 -0700 (PDT) Received: from localhost ([::1]:34298 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhqTb-00036R-T1 for importer2@patchew.org; Fri, 22 Apr 2022 06:25:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58784) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhqA0-0004um-OX for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:08 -0400 Received: from mail-wm1-x332.google.com ([2a00:1450:4864:20::332]:51059) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhq9z-0002qS-5J for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:08 -0400 Received: by mail-wm1-x332.google.com with SMTP id r19so4805479wmq.0 for ; Fri, 22 Apr 2022 03:05:06 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.05 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=l5uJxy4WfAzOW7qSBnV+0WxIG9WxiypmDb7cHj2F97M=; b=n4HQ57pzA89rxgqy9XnftRnmfbPKrlkiPHcoU57SL6YE3GU2knV/MWH3LtS8tQdHZ3 XlobWnsboUmB15JFZ+PAbZ7/qNx2iF7kMOnMSxwNoaiO4yv+h+RcHShu95Bdlrx0DCFS 3GSWI+mcQ7DZM2klgSOTmzrWav7esYRtQ6HGW26FRoqG41KnqrR5vucawmgMRsnhmKUA gmWlqC+/rA7iuh/eL0ZMrClaqotj8R9AHcAjBxpQxjrKaTu/ojVgUqvKqzRg5NC6HQt7 YK6HxB7t+hG1GptKkE5PDBJ41bhS5pH3kpINwpsbVUZOyfwx4fPXbMDi7BYCI1/RuGwc PcjQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=l5uJxy4WfAzOW7qSBnV+0WxIG9WxiypmDb7cHj2F97M=; b=G2RlnRc0D9R989kftBzgR6Mdrcky3wkqNQhYJALCHUuoSnL4751vG1J0hHcTzxxg7E mLVUMuSIiJ9cr+3Vbov2KbHEBdrUrNm1jOpWeQa+KJyKTJlUnjDENfp04DIK920vk1P2 bufVhrD+jI93sXbc3AA99Y66VMJRzd/r/wW7QzH2uwaqQDD8v0WGvbb7Vg22yWa2FD1/ Az8iblFT1KRbUMDljyigPn3X6ZB2T/TueHHKVKThHcCTW94v3uGhX/SVHc58qiwHYYUI B40DlMHuYBs94TUAW0z9ZMp/VKjnAam0aih4W8OMCCYwsMYTRfA+/QxwxF1VBTmGfDpe IxnA== X-Gm-Message-State: AOAM532pp5TZYaHvPXYaXPTBty52+8Z/Lk8nJ1oEIL/9xN0BSu/QXBQ0 kjQn3G039851Pwfj8AiKMYRZ7PADLmRpgw== X-Google-Smtp-Source: ABdhPJyCoj8SNUi4OxGNdnNp5CAjL4T7UCWukYJ7oFlpnJSvpztawKVwrZwjmJRJv5hOdnFHaGEEsg== X-Received: by 2002:a1c:2904:0:b0:37b:ea53:4cbf with SMTP id p4-20020a1c2904000000b0037bea534cbfmr3428761wmp.46.1650621905830; Fri, 22 Apr 2022 03:05:05 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 34/61] hw/intc/arm_gicv3_redist: Implement gicv3_redist_mov_vlpi() Date: Fri, 22 Apr 2022 11:04:05 +0100 Message-Id: <20220422100432.2288247-35-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650623131465100001 Content-Type: text/plain; charset="utf-8" Implement the gicv3_redist_mov_vlpi() function (previously left as a stub). This function handles the work of a VMOVI command: it marks the vLPI not-pending on the source and pending on the destination. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-35-peter.maydell@linaro.org --- hw/intc/arm_gicv3_redist.c | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c index 2c4a87318bc..78dcdcc7621 100644 --- a/hw/intc/arm_gicv3_redist.c +++ b/hw/intc/arm_gicv3_redist.c @@ -1067,9 +1067,25 @@ void gicv3_redist_mov_vlpi(GICv3CPUState *src, uint6= 4_t src_vptaddr, int irq, int doorbell) { /* - * The redistributor handling for moving a VLPI will be added - * in a subsequent commit. + * Move the specified vLPI's pending state from the source redistribut= or + * to the destination. */ + if (!set_pending_table_bit(src, src_vptaddr, irq, 0)) { + /* Not pending on source, nothing to do */ + return; + } + if (vcpu_resident(src, src_vptaddr) && irq =3D=3D src->hppvlpi.irq) { + /* + * Update src's cached highest-priority pending vLPI if we just ma= de + * it not-pending + */ + gicv3_redist_update_vlpi(src); + } + /* + * Mark the vLPI pending on the destination (ringing the doorbell + * if the vCPU isn't resident) + */ + gicv3_redist_process_vlpi(dest, irq, dest_vptaddr, doorbell, irq); } =20 void gicv3_redist_vinvall(GICv3CPUState *cs, uint64_t vptaddr) --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650623756; cv=none; d=zohomail.com; s=zohoarc; b=iXNjEU5O4d/iZHrGEXuLfCWc7+KlY5K4YzHS1FtD/f3usE7nYQ/TWu9+ckV/Yeasl4TedERlSm13O/UekEUJilLAsUcA/6MSkafaBd1FnXhveA+38xTbTr0QUQ2Zr5a0V2EgCN0P881wbsq+CsxHjgJJeVw7fnPFEK37QCbfDzU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650623756; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=ZEhoOIoK2+oeX738Kznp6czGDdThyWg3QrQY8i6NzM0=; b=Dm6mGcAWj9lqy6nTng+gfsNmg+HzTf0QY+lRennFkb1ngjEA5kcwFwP3FUUeB6PgXyUs7Xz4kWe9CzW+f5LUUd2JtCjgIHHa5pMo+qsKcKDbfQxisKihNJfzSHD573U68HYshAwqc81XCQOCKcPKZjQRB2RUDOHAYfxvqoHnrs4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650623756914950.7453475161129; Fri, 22 Apr 2022 03:35:56 -0700 (PDT) Received: from localhost ([::1]:42950 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhqdn-0001xc-HN for importer2@patchew.org; Fri, 22 Apr 2022 06:35:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58832) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhqA2-0004wt-2N for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:10 -0400 Received: from mail-wm1-x32c.google.com ([2a00:1450:4864:20::32c]:35597) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhqA0-0002qs-Gw for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:09 -0400 Received: by mail-wm1-x32c.google.com with SMTP id c190-20020a1c35c7000000b0038e37907b5bso7650563wma.0 for ; Fri, 22 Apr 2022 03:05:08 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.05 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=ZEhoOIoK2+oeX738Kznp6czGDdThyWg3QrQY8i6NzM0=; b=MoyIsUrhbX8z+D1d/v09P6DK6oMWiIkQEzXOLO/MRfPRCpubjk/HgHNJIvjCsGa706 B8qI/wJx4bEykrOF9x1CY0gu0xc08SX6ew3y36Ao2CzEK23NYQrDWCoEISkA3I7k13N1 aIE/FIeaG1npI3jRHcuXle16PP65NdtYZM4O1P7DY0rv2gYPql2c5VhvueMjI9FEWAfc 6O2/jrWqp4GA2LHbvlUMPVcaRCzGGm79UM+XedGTWncoVAWUtrZNwLF2Wka1V8tB0DyZ J4KlCUFYohV941cf+yUBNe5nap8BwdJHCOOdRw8X2WQzDSNP/0+pktSWXn8+V/kEu1bH K8xw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ZEhoOIoK2+oeX738Kznp6czGDdThyWg3QrQY8i6NzM0=; b=5vB7I/vlr8xrvSdwzxDfdOmZplW0+E5w3Q66uezmU2uidiaAdvs8HyCv/KR3ABSinw j4VO9krcQpYK3/bP/snQlJkK/81Ic5Jy9lGq2KXi9S1Hfxccmqcyt1xFN5dGYEQRdo13 sCLWVIzs5M1B4rI/axA4yqNOxVD4dJBvDvI1Ydh8KzsfDTfpmCHtGXG/fDPOre0PZTJd RGnwKV/+VH1jRWkuWNjT7HIesXJVrWYuiBdJ25UppjHFUgrDWnZlmtoIB/AR76/3da6+ MwmBVB+aU97fI/+XTIKyv4ZBpTll8Z4K921ZTX+Ijpqt6jO7IyriJX8QS+lKOI1n61bQ v4iw== X-Gm-Message-State: AOAM530I7qdoapSM+SuH8e2AmE67FKe/sWi90sMN7m1woDB6dHs+4TKg O23sMPFGoXP0DcmUJ12CHnwROwLg0RxQSw== X-Google-Smtp-Source: ABdhPJwU0ehbla9MusA1l3Kp/5rsI0Dykpmgi062Xo350G5mZc9jHB2uHPgKPItALV83iX6xHGosow== X-Received: by 2002:a1c:f415:0:b0:37f:ab4d:1df2 with SMTP id z21-20020a1cf415000000b0037fab4d1df2mr12281839wma.75.1650621906733; Fri, 22 Apr 2022 03:05:06 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 35/61] hw/intc/arm_gicv3_redist: Implement gicv3_redist_vinvall() Date: Fri, 22 Apr 2022 11:04:06 +0100 Message-Id: <20220422100432.2288247-36-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650623758608100001 Content-Type: text/plain; charset="utf-8" Implement the gicv3_redist_vinvall() function (previously left as a stub). This function handles the work of a VINVALL command: it must invalidate any cached information associated with a specific vCPU. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-36-peter.maydell@linaro.org --- hw/intc/arm_gicv3_redist.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c index 78dcdcc7621..34f4308e980 100644 --- a/hw/intc/arm_gicv3_redist.c +++ b/hw/intc/arm_gicv3_redist.c @@ -1090,7 +1090,13 @@ void gicv3_redist_mov_vlpi(GICv3CPUState *src, uint6= 4_t src_vptaddr, =20 void gicv3_redist_vinvall(GICv3CPUState *cs, uint64_t vptaddr) { - /* The redistributor handling will be added in a subsequent commit */ + if (!vcpu_resident(cs, vptaddr)) { + /* We don't have anything cached if the vCPU isn't resident */ + return; + } + + /* Otherwise, our only cached information is the HPPVLPI info */ + gicv3_redist_update_vlpi(cs); } =20 void gicv3_redist_inv_vlpi(GICv3CPUState *cs, int irq, uint64_t vptaddr) --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650625124; cv=none; d=zohomail.com; s=zohoarc; b=JVly38SFRovkxq5ikMH5wRU51nl3LAQ6tQeEQ+6zZX6QslVcAogQxhSa9wE0u519yJDfDPHsFR8hRCWrjpglV1SK/aCYXcYWXnIg2W08ixJv9A6DNZJk6j/RZjIzo4d+E1XbPnJbPcSHpvjxA/HXH5woavJS1RlnlmTrzN/rTmQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650625124; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=mPgmj5RVzDAw4cIOgcMQ1RCLJRgE1k4EGIsJB8ypEvA=; b=CqYF1j2AhowS7y38rvtgQAUh9tY56zhbgVBJicBj3geYDmtdMTAWtzNRD86mKhfEb4dySuQ3Ucg4j+kSnCCAaC9EolGqMctze6u9heK6Nv3cZOA9jCe8MIBkVPDRg5Y+LZsRmqSXZMGRLnNxdTQv0JYCfd0kRgx6VIogpDr9sbk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650625124394222.35600491995262; Fri, 22 Apr 2022 03:58:44 -0700 (PDT) Received: from localhost ([::1]:57130 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhqzr-0003mJ-DL for importer2@patchew.org; Fri, 22 Apr 2022 06:58:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58864) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhqA3-0004yM-CX for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:11 -0400 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]:43565) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhqA1-0002rG-EU for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:11 -0400 Received: by mail-wm1-x32f.google.com with SMTP id n40-20020a05600c3ba800b0038ff1939b16so5090734wms.2 for ; Fri, 22 Apr 2022 03:05:08 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.07 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=mPgmj5RVzDAw4cIOgcMQ1RCLJRgE1k4EGIsJB8ypEvA=; b=zGETRI5Op4KYHdCpVfyRZKvL0y/ysalWTYXUnBesVAZnDnbGxiDGetBEcLS8RS6CZ/ 6fA2OwD+hFKA9cXmmFJcwxrN9xVXQ27NyL2W1qbVvpstF+9v1ASmGPYzrMAFXP28M4Ex dEeCt09fOgb+56H1bmYqGNGrKIqIVp2Em4LhABYzonurzfXUTVZIqxtL6YzeST6r7FtM 467toEYyWietXnpKXt4aS2YqSaokv+z0TVhuVWNkV+M9yfHl8oS9GwpZyWZQSUSL9KQp RQS1oeN++MxNxpNHurJ3Z6Zdv04IrNR7fycK8RHotKnMdBII/Z7m0OML/2J0oZ2a3pOo H7Pw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=mPgmj5RVzDAw4cIOgcMQ1RCLJRgE1k4EGIsJB8ypEvA=; b=DxSIrajKLicntvy8Z+f5E3uF1tR/8lfESUNhzf3lyv4ACG+CABJ/v9sJ8V731/bgRj g1oU+sS292G4n8QL/CeD5lrsiRPKFfKZrbdS+3JaOrVDd+VjRAW1yZG2CmfvQiqldHlc 39YHxKhRK8OGzaeHT0mHmgY5HEFpnvvVnZfIVRc+GHm3LgipH01Dp5ym5W5oo+5DyJk0 g2vcNg3iu7P1sY5CDnW2XfsdRwQCJRcFsl5tYa6FHkH1T895SIyNJ0wOhRd6uWpNRFZ4 5djlGnT68kuO/HXDYG4AoV6x8XBK9GfS5miXW6i+qCZRD1L8I6Cc/Ze9paIGtatMLKd/ +gVA== X-Gm-Message-State: AOAM531Z6m9V4J0tN6qOIw2swE/7LMn7Ymnx0ThqQJW3TXWWwdB0mFOt I5IT6X4SHGH0oaTgYMP4ue/8TXphptQyOg== X-Google-Smtp-Source: ABdhPJy8HlS7EGg1ET/802u7hMsbLTEbt3DU7WxBi5IxxSVKOHyVuweK0HYW4b8mXPXT/puyIgRAyw== X-Received: by 2002:a05:600c:4ecc:b0:392:938a:d85 with SMTP id g12-20020a05600c4ecc00b00392938a0d85mr12352783wmq.165.1650621907872; Fri, 22 Apr 2022 03:05:07 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 36/61] hw/intc/arm_gicv3_redist: Implement gicv3_redist_inv_vlpi() Date: Fri, 22 Apr 2022 11:04:07 +0100 Message-Id: <20220422100432.2288247-37-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650625126582100001 Content-Type: text/plain; charset="utf-8" Implement the function gicv3_redist_inv_vlpi(), which was previously left as a stub. This is the function that does the work of the INV command for a virtual interrupt. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-37-peter.maydell@linaro.org --- hw/intc/arm_gicv3_redist.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c index 34f4308e980..bcb54bef76e 100644 --- a/hw/intc/arm_gicv3_redist.c +++ b/hw/intc/arm_gicv3_redist.c @@ -1102,9 +1102,12 @@ void gicv3_redist_vinvall(GICv3CPUState *cs, uint64_= t vptaddr) void gicv3_redist_inv_vlpi(GICv3CPUState *cs, int irq, uint64_t vptaddr) { /* - * The redistributor handling for invalidating cached information - * about a VLPI will be added in a subsequent commit. + * The only cached information for LPIs we have is the HPPLPI. + * We could be cleverer about identifying when we don't need + * to do a full rescan of the pending table, but until we find + * this is a performance issue, just always recalculate. */ + gicv3_redist_vinvall(cs, vptaddr); } =20 void gicv3_redist_set_irq(GICv3CPUState *cs, int irq, int level) --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650624632; cv=none; d=zohomail.com; s=zohoarc; b=KlOx985tqeCvbtrtlQc0NXOjA3jsYgsZ8ypIYevfO/85FDe44EiIZ7E53q8jHLPCXkF2OZquxdwLMB2T21BexaU4FBy+fzbqcdzIsYCSTGhqsnwPEEee47ful9IvEzqga2tpkhtaIIfwikXW9lebtozG7G90ndnlaoEAsstTq8s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650624632; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Ndm3t5N4OR0qFLpk2c9QhA+QCMSP9KicMr+q+FQ7Er8=; b=WoTflRKFPVOgTIaQKQdSgI1gPi6KuoF2Q7FJoa5yzlD9x3Lw+Hqb8NkwS+sAlmFAR6FaPFDw17ZTPaQi82kfIUeQwwN1PWGk0Bz5ZVZwoCBXUHvjoJrB1WboAGq8Ibfuua2D+/yVynldSgQ9Vx9+RgN+YEhONbO4e7Z4486tDSE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 16506246322772.5636276476212743; Fri, 22 Apr 2022 03:50:32 -0700 (PDT) Received: from localhost ([::1]:39622 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhqrv-0005Ud-2U for importer2@patchew.org; Fri, 22 Apr 2022 06:50:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58914) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhqA4-00050X-QL for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:12 -0400 Received: from mail-wm1-x335.google.com ([2a00:1450:4864:20::335]:51062) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhqA2-0002rc-BG for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:12 -0400 Received: by mail-wm1-x335.google.com with SMTP id r19so4805549wmq.0 for ; Fri, 22 Apr 2022 03:05:09 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.07 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=Ndm3t5N4OR0qFLpk2c9QhA+QCMSP9KicMr+q+FQ7Er8=; b=Z5oWSDwSdklSKXP6VScla6be5zMXhMm42x35OwYLCFM/HGc6K6oddzLkbwLhiwDJN6 odm0y1e0avNrsTDN3LEYIipBi80j5X6ZU3khjW06s3GUpude2/dvO245EpBJ6Z2IUMGt cfLdqxiFys4Uxliq4ZJT2sj2PQe6aY5AYchDpw3kfDXZw1AL9erXPmFtqEO42N9TCccO MMA6+Hulsrf1QRefdDKL/RMlGw1NT0NcnkJ/7IrA18okSw4HU01v+EYwiBsaQhElTLiU 9RpImDBsOnQg/nWV8//62vPl5z8gaO6hg/4DpSjwlsnZXHycaGndWtoJPhbhGtOotqiT xUaA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; 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envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650624634490100001 Content-Type: text/plain; charset="utf-8" Update the various GIC ID and feature registers for GICv4: * PIDR2 [7:4] is the GIC architecture revision * GICD_TYPER.DVIS is 1 to indicate direct vLPI injection support * GICR_TYPER.VLPIS is 1 to indicate redistributor support for vLPIs * GITS_TYPER.VIRTUAL is 1 to indicate vLPI support * GITS_TYPER.VMOVP is 1 to indicate that our VMOVP implementation handles cross-ITS synchronization for the guest * ICH_VTR_EL2.nV4 is 0 to indicate direct vLPI injection support Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-38-peter.maydell@linaro.org --- hw/intc/gicv3_internal.h | 15 +++++++++++---- hw/intc/arm_gicv3_common.c | 7 +++++-- hw/intc/arm_gicv3_cpuif.c | 6 +++++- hw/intc/arm_gicv3_dist.c | 7 ++++--- hw/intc/arm_gicv3_its.c | 7 ++++++- hw/intc/arm_gicv3_redist.c | 2 +- 6 files changed, 32 insertions(+), 12 deletions(-) diff --git a/hw/intc/gicv3_internal.h b/hw/intc/gicv3_internal.h index 07644b2be6f..0bf68452395 100644 --- a/hw/intc/gicv3_internal.h +++ b/hw/intc/gicv3_internal.h @@ -309,6 +309,7 @@ FIELD(GITS_TYPER, SEIS, 18, 1) FIELD(GITS_TYPER, PTA, 19, 1) FIELD(GITS_TYPER, CIDBITS, 32, 4) FIELD(GITS_TYPER, CIL, 36, 1) +FIELD(GITS_TYPER, VMOVP, 37, 1) =20 #define GITS_IDREGS 0xFFD0 =20 @@ -747,23 +748,29 @@ static inline uint32_t gicv3_iidr(void) #define GICV3_PIDR0_REDIST 0x93 #define GICV3_PIDR0_ITS 0x94 =20 -static inline uint32_t gicv3_idreg(int regoffset, uint8_t pidr0) +static inline uint32_t gicv3_idreg(GICv3State *s, int regoffset, uint8_t p= idr0) { /* Return the value of the CoreSight ID register at the specified * offset from the first ID register (as found in the distributor * and redistributor register banks). - * These values indicate an ARM implementation of a GICv3. + * These values indicate an ARM implementation of a GICv3 or v4. */ static const uint8_t gicd_ids[] =3D { - 0x44, 0x00, 0x00, 0x00, 0x92, 0xB4, 0x3B, 0x00, 0x0D, 0xF0, 0x05, = 0xB1 + 0x44, 0x00, 0x00, 0x00, 0x92, 0xB4, 0x0B, 0x00, 0x0D, 0xF0, 0x05, = 0xB1 }; + uint32_t id; =20 regoffset /=3D 4; =20 if (regoffset =3D=3D 4) { return pidr0; } - return gicd_ids[regoffset]; + id =3D gicd_ids[regoffset]; + if (regoffset =3D=3D 6) { + /* PIDR2 bits [7:4] are the GIC architecture revision */ + id |=3D s->revision << 4; + } + return id; } =20 /** diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c index 3f47b3501fe..181f342f32c 100644 --- a/hw/intc/arm_gicv3_common.c +++ b/hw/intc/arm_gicv3_common.c @@ -406,8 +406,8 @@ static void arm_gicv3_common_realize(DeviceState *dev, = Error **errp) * Last =3D=3D 1 if this is the last redistributor in a series of * contiguous redistributor pages * DirectLPI =3D=3D 0 (direct injection of LPIs not supported) - * VLPIS =3D=3D 0 (virtual LPIs not supported) - * PLPIS =3D=3D 0 (physical LPIs not supported) + * VLPIS =3D=3D 1 if vLPIs supported (GICv4 and up) + * PLPIS =3D=3D 1 if LPIs supported */ cpu_affid =3D object_property_get_uint(OBJECT(cpu), "mp-affinity",= NULL); =20 @@ -422,6 +422,9 @@ static void arm_gicv3_common_realize(DeviceState *dev, = Error **errp) =20 if (s->lpi_enable) { s->cpu[i].gicr_typer |=3D GICR_TYPER_PLPIS; + if (s->revision > 3) { + s->cpu[i].gicr_typer |=3D GICR_TYPER_VLPIS; + } } } =20 diff --git a/hw/intc/arm_gicv3_cpuif.c b/hw/intc/arm_gicv3_cpuif.c index d627ddac90f..8404f46ee0b 100644 --- a/hw/intc/arm_gicv3_cpuif.c +++ b/hw/intc/arm_gicv3_cpuif.c @@ -2578,11 +2578,15 @@ static uint64_t ich_vtr_read(CPUARMState *env, cons= t ARMCPRegInfo *ri) uint64_t value; =20 value =3D ((cs->num_list_regs - 1) << ICH_VTR_EL2_LISTREGS_SHIFT) - | ICH_VTR_EL2_TDS | ICH_VTR_EL2_NV4 | ICH_VTR_EL2_A3V + | ICH_VTR_EL2_TDS | ICH_VTR_EL2_A3V | (1 << ICH_VTR_EL2_IDBITS_SHIFT) | ((cs->vprebits - 1) << ICH_VTR_EL2_PREBITS_SHIFT) | ((cs->vpribits - 1) << ICH_VTR_EL2_PRIBITS_SHIFT); =20 + if (cs->gic->revision < 4) { + value |=3D ICH_VTR_EL2_NV4; + } + trace_gicv3_ich_vtr_read(gicv3_redist_affid(cs), value); return value; } diff --git a/hw/intc/arm_gicv3_dist.c b/hw/intc/arm_gicv3_dist.c index 7f6275363ea..b9ed955e36b 100644 --- a/hw/intc/arm_gicv3_dist.c +++ b/hw/intc/arm_gicv3_dist.c @@ -383,7 +383,7 @@ static bool gicd_readl(GICv3State *s, hwaddr offset, * No1N =3D=3D 1 (1-of-N SPI interrupts not supported) * A3V =3D=3D 1 (non-zero values of Affinity level 3 supported) * IDbits =3D=3D 0xf (we support 16-bit interrupt identifiers) - * DVIS =3D=3D 0 (Direct virtual LPI injection not supported) + * DVIS =3D=3D 1 (Direct virtual LPI injection supported) if GICv4 * LPIS =3D=3D 1 (LPIs are supported if affinity routing is enable= d) * num_LPIs =3D=3D 0b00000 (bits [15:11],Number of LPIs as indicat= ed * by GICD_TYPER.IDbits) @@ -399,8 +399,9 @@ static bool gicd_readl(GICv3State *s, hwaddr offset, * so we only need to check the DS bit. */ bool sec_extn =3D !(s->gicd_ctlr & GICD_CTLR_DS); + bool dvis =3D s->revision >=3D 4; =20 - *data =3D (1 << 25) | (1 << 24) | (sec_extn << 10) | + *data =3D (1 << 25) | (1 << 24) | (dvis << 18) | (sec_extn << 10) | (s->lpi_enable << GICD_TYPER_LPIS_SHIFT) | (0xf << 19) | itlinesnumber; return true; @@ -557,7 +558,7 @@ static bool gicd_readl(GICv3State *s, hwaddr offset, } case GICD_IDREGS ... GICD_IDREGS + 0x2f: /* ID registers */ - *data =3D gicv3_idreg(offset - GICD_IDREGS, GICV3_PIDR0_DIST); + *data =3D gicv3_idreg(s, offset - GICD_IDREGS, GICV3_PIDR0_DIST); return true; case GICD_SGIR: /* WO registers, return unknown value */ diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index 0670aca4d46..2ff21ed6bbe 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -1699,7 +1699,7 @@ static bool its_readl(GICv3ITSState *s, hwaddr offset, break; case GITS_IDREGS ... GITS_IDREGS + 0x2f: /* ID registers */ - *data =3D gicv3_idreg(offset - GITS_IDREGS, GICV3_PIDR0_ITS); + *data =3D gicv3_idreg(s->gicv3, offset - GITS_IDREGS, GICV3_PIDR0_= ITS); break; case GITS_TYPER: *data =3D extract64(s->typer, 0, 32); @@ -1946,6 +1946,11 @@ static void gicv3_arm_its_realize(DeviceState *dev, = Error **errp) s->typer =3D FIELD_DP64(s->typer, GITS_TYPER, DEVBITS, ITS_DEVBITS); s->typer =3D FIELD_DP64(s->typer, GITS_TYPER, CIL, 1); s->typer =3D FIELD_DP64(s->typer, GITS_TYPER, CIDBITS, ITS_CIDBITS); + if (s->gicv3->revision >=3D 4) { + /* Our VMOVP handles cross-ITS synchronization itself */ + s->typer =3D FIELD_DP64(s->typer, GITS_TYPER, VMOVP, 1); + s->typer =3D FIELD_DP64(s->typer, GITS_TYPER, VIRTUAL, 1); + } } =20 static void gicv3_its_reset(DeviceState *dev) diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c index bcb54bef76e..c3d4cdd66b7 100644 --- a/hw/intc/arm_gicv3_redist.c +++ b/hw/intc/arm_gicv3_redist.c @@ -441,7 +441,7 @@ static MemTxResult gicr_readl(GICv3CPUState *cs, hwaddr= offset, *data =3D cs->gicr_nsacr; return MEMTX_OK; case GICR_IDREGS ... GICR_IDREGS + 0x2f: - *data =3D gicv3_idreg(offset - GICR_IDREGS, GICV3_PIDR0_REDIST); + *data =3D gicv3_idreg(cs->gic, offset - GICR_IDREGS, GICV3_PIDR0_R= EDIST); return MEMTX_OK; /* * VLPI frame registers. We don't need a version check for --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650624902; cv=none; d=zohomail.com; s=zohoarc; b=HU9N+zEZMBHip/60HUETp6OV3JTpMCNWbEx5WG0G6isyKQKOVHznH4hnExjQzIj0yn7FaNwr1x3mnOEmMysdT9vnNFCZ2IAkqz+6THJGMDLM92eIZU5TfDsYmNYH4DtoWOs/ba2YKGtyAwTtkQ876NxPvVQvnkICOtoAeV7kOFQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650624902; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=JusjhwmCYsYrAoBkrOFAzh+RoRO01/bInTb0P5AYwvE=; b=RimqOkSkDliJ481O8Q36YEh02qnUkR+cOUfh1JstEyDb7Z6g9uQFi0ZojKckf6bTbK1ynNb4SLQTyQIYz6ofo7QICTeun1CUc8vgbNfCWjx18XG7K+w7L4KQcMgzxnXNZGQU3MEUq8wHU6DhZv4JWYx8prHy8tPNGAABW6blC1Y= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650624902737750.196756197151; Fri, 22 Apr 2022 03:55:02 -0700 (PDT) Received: from localhost ([::1]:48200 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhqwH-0004RL-Oz for importer2@patchew.org; Fri, 22 Apr 2022 06:55:01 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58918) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhqA4-00050s-UM for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:13 -0400 Received: from mail-wm1-x335.google.com ([2a00:1450:4864:20::335]:36815) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhqA3-0002ru-7Y for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:12 -0400 Received: by mail-wm1-x335.google.com with SMTP id u17-20020a05600c211100b0038eaf4cdaaeso7631626wml.1 for ; Fri, 22 Apr 2022 03:05:10 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.09 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=JusjhwmCYsYrAoBkrOFAzh+RoRO01/bInTb0P5AYwvE=; b=Z0KuIr0eLj+gAGyOmHaDaqJWTv4aAbxESISDcj83njDvBGh6uK1E0vY68ae2lPjFlg VPvp5lJsGQngVguRBLq7PbVh6h2lyP7Fdiy1HXvMnVw5IRo1qFxTqqHJ+N+uWNCQFOYE 4AQ9ggBA6hIyM/JZeKG2Ot1OEwg4qL1t3aJV7d1d0YWJF74AGa68QYOcGHehtdsnWesC cTNtSW4Q01l6Bq7Pj/BFfxhfGR5hXmxPaJb5DAvPsvKXXkGtPS0Hub+PH1gghe+Q85nF AQhd3+GKVV7PwTEZr8WsBidzgKjNmza8K70+0XHBvvlhaWonYMuXu/2iWDo9mlTLBR1v htlg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=JusjhwmCYsYrAoBkrOFAzh+RoRO01/bInTb0P5AYwvE=; b=JZESNXMiGyvVY5vIP1yVB97S5YwzKVW/A54Vb3sUjfTZ/qVf+9z9kK8icXQIoPDCAS EpHR/wqOkXs8qJiPF76tHpKNQlsp9bdNqzmrvnBcBnAI8sV0SMzbZ//we0UarOy2eosZ /TgvEXlqa+oC0svhyzsmStZs1PWRS/M5SRUzhAh7nUe/hHbaSJGz9d4HrkOppUSUcqtv 7b2nHa8lCSzhYQiSVlHfI5swgHCgvvKexhN26df1WME5F8Fk6f+ee5DMwshNuv+3zDZA UNCegNkxzt/JJkzDSxSV6uoLaVTX3FYpWCJyqKUaBiQF4W9yQ4FShb5Gq/Bqdk5qwqyr 9wLw== X-Gm-Message-State: AOAM532+WcBA7Db4yXWITeW4/L/Oajc3q441pgtGw/k3u+MnNl2f/xkG oSSpFIYx5Nf2qUo3sQ2fT7tZgudHuGD/tg== X-Google-Smtp-Source: ABdhPJyg7N7qu7GX9SjutN2Hiox7rR4VTZrOGU6Vn7IYvxWeGHzCScnFa5UpPaHLIhq1zL2EMewx+w== X-Received: by 2002:a05:600c:3785:b0:38e:bca8:f0c1 with SMTP id o5-20020a05600c378500b0038ebca8f0c1mr12346874wmr.56.1650621909744; Fri, 22 Apr 2022 03:05:09 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 38/61] hw/intc/arm_gicv3: Allow 'revision' property to be set to 4 Date: Fri, 22 Apr 2022 11:04:09 +0100 Message-Id: <20220422100432.2288247-39-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650624903168100001 Content-Type: text/plain; charset="utf-8" Now that we have implemented all the GICv4 requirements, relax the error-checking on the GIC object's 'revision' property to allow a TCG GIC to be a GICv4, whilst still constraining the KVM GIC to GICv3. Our 'revision' property doesn't consider the possibility of wanting to specify the minor version of the GIC -- for instance there is a GICv3.1 which adds support for extended SPI and PPI ranges, among other things, and also GICv4.1. But since the QOM property is internal to QEMU, not user-facing, we can cross that bridge when we come to it. Within the GIC implementation itself code generally checks against the appropriate ID register feature bits, and the only use of s->revision is for setting those ID register bits. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-39-peter.maydell@linaro.org --- hw/intc/arm_gicv3_common.c | 12 +++++++----- hw/intc/arm_gicv3_kvm.c | 5 +++++ 2 files changed, 12 insertions(+), 5 deletions(-) diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c index 181f342f32c..5634c6fc788 100644 --- a/hw/intc/arm_gicv3_common.c +++ b/hw/intc/arm_gicv3_common.c @@ -326,12 +326,14 @@ static void arm_gicv3_common_realize(DeviceState *dev= , Error **errp) GICv3State *s =3D ARM_GICV3_COMMON(dev); int i, rdist_capacity, cpuidx; =20 - /* revision property is actually reserved and currently used only in o= rder - * to keep the interface compatible with GICv2 code, avoiding extra - * conditions. However, in future it could be used, for example, if we - * implement GICv4. + /* + * This GIC device supports only revisions 3 and 4. The GICv1/v2 + * is a separate device. + * Note that subclasses of this device may impose further restrictions + * on the GIC revision: notably, the in-kernel KVM GIC doesn't + * support GICv4. */ - if (s->revision !=3D 3) { + if (s->revision !=3D 3 && s->revision !=3D 4) { error_setg(errp, "unsupported GIC revision %d", s->revision); return; } diff --git a/hw/intc/arm_gicv3_kvm.c b/hw/intc/arm_gicv3_kvm.c index 5ec5ff9ef6e..06f5aceee52 100644 --- a/hw/intc/arm_gicv3_kvm.c +++ b/hw/intc/arm_gicv3_kvm.c @@ -781,6 +781,11 @@ static void kvm_arm_gicv3_realize(DeviceState *dev, Er= ror **errp) return; } =20 + if (s->revision !=3D 3) { + error_setg(errp, "unsupported GIC revision %d for in-kernel GIC", + s->revision); + } + if (s->security_extn) { error_setg(errp, "the in-kernel VGICv3 does not implement the " "security extensions"); --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650625118; cv=none; d=zohomail.com; s=zohoarc; b=ZFwiXofnqSEh8Tn89dVx+Fqt/HUpvSiNQzwLfb8+9nodcL7WZVUFXVzXO6YXhe73otTCDlPITfLzSqYx+UxrCFgztu/FQTY8T7bDN2HjummtL8fj9fl25UoePf55TRh9+kbbCUqHR54+/h9FrHq5YHWla+ntqovoibek0zRcCbg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650625118; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=ppb9q2JdzKJCAX+yRCeZ8lM7X4SqlcHbmDsxajJSFyc=; b=jH1sX6A6ERERZb0mD2YIzVGGuReMEIkD9y99x1dN/qKprbKMLEMZKYPGEVirhXSGkTsQ/A7vMk3LMAqKDc/yXse5vQLxlTL8BPHRvmM6wRIimNTvBiUqpt/0wVnrpDICVEWCW6ymPhx1twNK0CjY8jKwa8Bov4t55zuTAQmrIo0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650625118351515.8925739212949; Fri, 22 Apr 2022 03:58:38 -0700 (PDT) Received: from localhost ([::1]:56636 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhqzl-0003Ma-7X for importer2@patchew.org; Fri, 22 Apr 2022 06:58:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58934) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhqA5-000524-Mo for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:14 -0400 Received: from mail-wr1-x436.google.com ([2a00:1450:4864:20::436]:46593) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhqA3-0002s7-UC for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:13 -0400 Received: by mail-wr1-x436.google.com with SMTP id h25so4284450wrc.13 for ; Fri, 22 Apr 2022 03:05:11 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.09 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=ppb9q2JdzKJCAX+yRCeZ8lM7X4SqlcHbmDsxajJSFyc=; b=s7PdLcKjTNz1AkMbEHtcT0M4CDCfvXob/oxUbEsA9v/Wx6bT8s7+w7DIqx9BjCIRVD FMIC0GNI2IJyBnd6VWBloWMEnZ85NR29HvuOjfWYpBPIVBS48eCgdxx9gIPq7r/aA6LN SaEqMWRc8VjDgqBp+qT2lv5PRilXvjknI0tNXH1/ZMiNhBkaRNZmjgpiFU+n//IZap3M XWRAP2SxwsoeUCIbuyFx8utr7kY+CAKcba26dFA4L8srzvtkgmtGI4aAAgvRd+MoXI8B +nIxcCBGWtZPf7r0LW4XcQj/hXQjfeId7Gzv41c/qusMr3SFt1mWHj95hngfMXUJe1e/ mqjg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ppb9q2JdzKJCAX+yRCeZ8lM7X4SqlcHbmDsxajJSFyc=; b=H8sI4fUxpi1IJrJR39prP03YvXk8YVTu93sbua5DcOnn9mf2HPGr1RV/jxvv1UgStG 2WYxbdEmC0Gzzjgyk+UUGMXeVD9vv2z+B5QTCuQKrMMGeaWNI57KwZLUgr0q7CVS/fes KomyJKC7zte97Z8vR5N679Nm7LDgGHTXnBBlo7mlvQh7u70KzZY+VG05XQwrSkVZmW7i mhgqOKv7CPSuAie/2H3RFRWpdY2Cg0Wp+mK99AOC9aqT9wa26bsHEFVxs4ypC4Aets+x a9ga0ehkjhVj/wVo4noW9LIcGuQ620wBNOIJSDMPlI+OZxOvf2Y83bzrGeIzvXPC0BcP n6OQ== X-Gm-Message-State: AOAM533SOBdABaK1bMhT33M5fdDaBOJRCIK0n1C6OYWj5NVDyubcA0b+ hUY3W1DkHI0s+d3m1vhpeI3kHC7aK8obUA== X-Google-Smtp-Source: ABdhPJwMlrxICw81DoPq42UPOLv07AXtOu2Kvnj3OQFT6+5HYf2yV4RIVb5DjkVOMRle6/CL9gPybg== X-Received: by 2002:a5d:4b45:0:b0:207:ab91:edd8 with SMTP id w5-20020a5d4b45000000b00207ab91edd8mr3100939wrs.168.1650621910662; Fri, 22 Apr 2022 03:05:10 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 39/61] hw/arm/virt: Use VIRT_GIC_VERSION_* enum values in create_gic() Date: Fri, 22 Apr 2022 11:04:10 +0100 Message-Id: <20220422100432.2288247-40-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650625120771100001 Content-Type: text/plain; charset="utf-8" Everywhere we need to check which GIC version we're using, we look at vms->gic_version and use the VIRT_GIC_VERSION_* enum values, except in create_gic(), which copies vms->gic_version into a local 'int' variable and makes direct comparisons against values 2 and 3. For consistency, change this function to check the GIC version the same way we do elsewhere. This includes not implicitly relying on the enumeration type values happening to match the integer 'revision' values the GIC device object wants. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-40-peter.maydell@linaro.org --- hw/arm/virt.c | 31 +++++++++++++++++++++++-------- 1 file changed, 23 insertions(+), 8 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index bb6a2484d81..d5f8b0c74ad 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -690,14 +690,29 @@ static void create_gic(VirtMachineState *vms, MemoryR= egion *mem) /* We create a standalone GIC */ SysBusDevice *gicbusdev; const char *gictype; - int type =3D vms->gic_version, i; + int i; unsigned int smp_cpus =3D ms->smp.cpus; uint32_t nb_redist_regions =3D 0; + int revision; =20 - gictype =3D (type =3D=3D 3) ? gicv3_class_name() : gic_class_name(); + if (vms->gic_version =3D=3D VIRT_GIC_VERSION_2) { + gictype =3D gic_class_name(); + } else { + gictype =3D gicv3_class_name(); + } =20 + switch (vms->gic_version) { + case VIRT_GIC_VERSION_2: + revision =3D 2; + break; + case VIRT_GIC_VERSION_3: + revision =3D 3; + break; + default: + g_assert_not_reached(); + } vms->gic =3D qdev_new(gictype); - qdev_prop_set_uint32(vms->gic, "revision", type); + qdev_prop_set_uint32(vms->gic, "revision", revision); qdev_prop_set_uint32(vms->gic, "num-cpu", smp_cpus); /* Note that the num-irq property counts both internal and external * interrupts; there are always 32 of the former (mandated by GIC spec= ). @@ -707,7 +722,7 @@ static void create_gic(VirtMachineState *vms, MemoryReg= ion *mem) qdev_prop_set_bit(vms->gic, "has-security-extensions", vms->secure= ); } =20 - if (type =3D=3D 3) { + if (vms->gic_version =3D=3D VIRT_GIC_VERSION_3) { uint32_t redist0_capacity =3D vms->memmap[VIRT_GIC_REDIST].size / GICV3_REDIST_SIZE; uint32_t redist0_count =3D MIN(smp_cpus, redist0_capacity); @@ -742,7 +757,7 @@ static void create_gic(VirtMachineState *vms, MemoryReg= ion *mem) gicbusdev =3D SYS_BUS_DEVICE(vms->gic); sysbus_realize_and_unref(gicbusdev, &error_fatal); sysbus_mmio_map(gicbusdev, 0, vms->memmap[VIRT_GIC_DIST].base); - if (type =3D=3D 3) { + if (vms->gic_version =3D=3D VIRT_GIC_VERSION_3) { sysbus_mmio_map(gicbusdev, 1, vms->memmap[VIRT_GIC_REDIST].base); if (nb_redist_regions =3D=3D 2) { sysbus_mmio_map(gicbusdev, 2, @@ -780,7 +795,7 @@ static void create_gic(VirtMachineState *vms, MemoryReg= ion *mem) ppibase + timer_irq[irq= ])); } =20 - if (type =3D=3D 3) { + if (vms->gic_version =3D=3D VIRT_GIC_VERSION_3) { qemu_irq irq =3D qdev_get_gpio_in(vms->gic, ppibase + ARCH_GIC_MAINT_IRQ); qdev_connect_gpio_out_named(cpudev, "gicv3-maintenance-interru= pt", @@ -806,9 +821,9 @@ static void create_gic(VirtMachineState *vms, MemoryReg= ion *mem) =20 fdt_add_gic_node(vms); =20 - if (type =3D=3D 3 && vms->its) { + if (vms->gic_version =3D=3D VIRT_GIC_VERSION_3 && vms->its) { create_its(vms); - } else if (type =3D=3D 2) { + } else if (vms->gic_version =3D=3D VIRT_GIC_VERSION_2) { create_v2m(vms); } } --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.10 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=dD0gXSrq4cJBnHFPk7NEn42McsBj8OdsQUpLVwThouk=; b=QbSVKU/4WObnW0UWA/uBBMRWjKeeJxeENJOy9OkRDkxrg8I2zZWSeks14ajMpoNWKP HbHEtgGjfkKNsl5PQQKeqXCzPGGtuLxXNYiBEh70b/GQwfXRFTDRylQSa8O3/wfF5VmZ uUK7qdYOaFoXoxCBXtyaOVKDQQE0UryRonII/eZrn6UoH3b/h0apz2eleimS0CmFhpJX Vq96P+Eg0MXLEZ5FqPEHCXvHCn1wLjVM4+6nxNjtrcKCqrD3YftJsnTXy+YkZk9y7KH7 7LR1xRCgXCvf85/C3j3I2hodjPhlXCXoYibbA6e4+5aQSt5ocNY/9aDgotgVuMcT0Qh0 lSCg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=dD0gXSrq4cJBnHFPk7NEn42McsBj8OdsQUpLVwThouk=; b=bs8MKNO5n0b2ls0Lth05V2C1itLgFgabxRTIKDsjKnfxhfYRYZKiiy+rYFonMyBL16 JSa/zP2QVLVxkrZgF32qmyTl9noAdfd0tlCEIb5ETvUq0HNcfNr9ti6CVLSdiS+KlRLP W/NtryN1DvEve0NTPKMpQPoaVtYDCVJUwqDg3e6yXNt7iZhkFz/cyqjOHL6pW8jzWNbs 6DxmSVUOsXOw2a1vCmCZ6Jf2KeAS3WQ+uuaVSpjm1kyMqMAJgC6DVrOfloQtU1n2EyYT 7bPXd4t1ZOoHXkwN5K20B0bq2TOCC5TahLiITGlSEhPZ3N7I03rFrpcpTBnqSHzHworC oWUw== X-Gm-Message-State: AOAM532c23h0OYt/Mm9Z83v0K4vDzwAV3zjErjapspBfqWZmAhhrnQBG XFZrVSRaPGhtYWa/w5kDGldHoMhbGEIF1g== X-Google-Smtp-Source: ABdhPJyunnCxfHrLSMsFzMCGQksjyHmd/sX2Oh4dxElntGdSurRrjPA2HzBOsBFQs85HEMzLWQeK+g== X-Received: by 2002:a05:600c:4e12:b0:391:18da:1883 with SMTP id b18-20020a05600c4e1200b0039118da1883mr3443054wmq.101.1650621911529; Fri, 22 Apr 2022 03:05:11 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 40/61] hw/arm/virt: Abstract out calculation of redistributor region capacity Date: Fri, 22 Apr 2022 11:04:11 +0100 Message-Id: <20220422100432.2288247-41-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650623997643100001 Content-Type: text/plain; charset="utf-8" In several places in virt.c we calculate the number of redistributors that fit in a region of our memory map, which is the size of the region divided by the size of a single redistributor frame. For GICv4, the redistributor frame is a different size from that for GICv3. Abstract out the calculation of redistributor region capacity so that we have one place we need to change to handle GICv4 rather than several. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-41-peter.maydell@linaro.org --- include/hw/arm/virt.h | 9 +++++++-- hw/arm/virt.c | 11 ++++------- 2 files changed, 11 insertions(+), 9 deletions(-) diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 7e76ee26198..360463e6bfb 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -185,11 +185,16 @@ OBJECT_DECLARE_TYPE(VirtMachineState, VirtMachineClas= s, VIRT_MACHINE) void virt_acpi_setup(VirtMachineState *vms); bool virt_is_acpi_enabled(VirtMachineState *vms); =20 +/* Return number of redistributors that fit in the specified region */ +static uint32_t virt_redist_capacity(VirtMachineState *vms, int region) +{ + return vms->memmap[region].size / GICV3_REDIST_SIZE; +} + /* Return the number of used redistributor regions */ static inline int virt_gicv3_redist_region_count(VirtMachineState *vms) { - uint32_t redist0_capacity =3D - vms->memmap[VIRT_GIC_REDIST].size / GICV3_REDIST_SIZE; + uint32_t redist0_capacity =3D virt_redist_capacity(vms, VIRT_GIC_REDIS= T); =20 assert(vms->gic_version =3D=3D VIRT_GIC_VERSION_3); =20 diff --git a/hw/arm/virt.c b/hw/arm/virt.c index d5f8b0c74ad..1227c64e5b1 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -723,8 +723,7 @@ static void create_gic(VirtMachineState *vms, MemoryReg= ion *mem) } =20 if (vms->gic_version =3D=3D VIRT_GIC_VERSION_3) { - uint32_t redist0_capacity =3D - vms->memmap[VIRT_GIC_REDIST].size / GICV3_REDIST_SIZE; + uint32_t redist0_capacity =3D virt_redist_capacity(vms, VIRT_GIC_R= EDIST); uint32_t redist0_count =3D MIN(smp_cpus, redist0_capacity); =20 nb_redist_regions =3D virt_gicv3_redist_region_count(vms); @@ -743,7 +742,7 @@ static void create_gic(VirtMachineState *vms, MemoryReg= ion *mem) =20 if (nb_redist_regions =3D=3D 2) { uint32_t redist1_capacity =3D - vms->memmap[VIRT_HIGH_GIC_REDIST2].size / GICV3_REDIST= _SIZE; + virt_redist_capacity(vms, VIRT_HIGH_GIC_REDIST2); =20 qdev_prop_set_uint32(vms->gic, "redist-region-count[1]", MIN(smp_cpus - redist0_count, redist1_capacity)); @@ -2048,10 +2047,8 @@ static void machvirt_init(MachineState *machine) * many redistributors we can fit into the memory map. */ if (vms->gic_version =3D=3D VIRT_GIC_VERSION_3) { - virt_max_cpus =3D - vms->memmap[VIRT_GIC_REDIST].size / GICV3_REDIST_SIZE; - virt_max_cpus +=3D - vms->memmap[VIRT_HIGH_GIC_REDIST2].size / GICV3_REDIST_SIZE; + virt_max_cpus =3D virt_redist_capacity(vms, VIRT_GIC_REDIST) + + virt_redist_capacity(vms, VIRT_HIGH_GIC_REDIST2); } else { virt_max_cpus =3D GIC_NCPU; } --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650625558; cv=none; d=zohomail.com; s=zohoarc; b=cn44hyQI8+pxM35UXbpsNI4r5fiHUe9DjAmriBOsNZWmVloe431ceBhc4tifkp7C+OxDfAHa4pxKm7gcHlDxdmFtEO4TRluu41IbymNujD80RXUf+YkYd/dRKFL0gvxVVlnmVIGZQ9hMbKFXKkFXT/TOkej72JyqPm7nGGs7x0Y= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650625558; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=lqt/sr/PjNxjy/2aE/5Huf/D94yrcwPJG4y/I0I31vg=; b=esfhSVkT0AqlSMueGFd/BRK29ktW9+kOZGgOuEe3BblKYTKWcUKBIIDX4vM1hmq5LtqBCHymD28eFaYd9z28fH4m253Xd68NtNHTkhHsBs3Rjz9l9DR6+jZ/1h1TzYVYuv+J6Onq9TTRqIYk3t6352RfhyuO8ZmU17kl1M7QGic= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650625558117234.22010868921734; Fri, 22 Apr 2022 04:05:58 -0700 (PDT) Received: from localhost ([::1]:37544 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhr6o-0002Bt-Eg for importer2@patchew.org; Fri, 22 Apr 2022 07:05:54 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59184) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhqAI-0005Zs-Tb for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:30 -0400 Received: from mail-wr1-x431.google.com ([2a00:1450:4864:20::431]:35760) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhqA6-0002sf-9U for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:26 -0400 Received: by mail-wr1-x431.google.com with SMTP id k22so10331301wrd.2 for ; Fri, 22 Apr 2022 03:05:13 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.11 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=lqt/sr/PjNxjy/2aE/5Huf/D94yrcwPJG4y/I0I31vg=; b=wbQxBnFj//moBjII3HKwJ4wKRJ5ZjWfJYf5cuwSr/L6pLqXd61atVEuUoZG6NAjJTN 2GTCukXWLC1vRmuPP5AGcqPR+CpbFSQLLlUHjN9Y5+LsT2e/zxjShdofaevBsSORWay7 TS1W3jUKiQBGmSJK7CBVnh7+hGhT4lDiKuI0PvkPPOh+vGK/pgyLogwiQC0RdK3V9+JG +UG8EmA35dq6F3haJRVpF9zuZNKYDSt7MSvciblSuTW1O88SnWInyeUoN++nYF5cHkB0 bnKcmoW9qrxUUZ8xiZ7udxT8lc5Guc1xuF48nf5fUh+A8GDKE9ukTtj8J0DuQCOTQyys FAhg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lqt/sr/PjNxjy/2aE/5Huf/D94yrcwPJG4y/I0I31vg=; b=wT/s4r2eAxMxlWT7dl5VclWimulAYLPkk/k6JJ6Qh62UnhVQwTp/rdMqjy1+X9EqxZ bxcMmPkgNxDggzrcmVQP168M1mtttpdzkf3l7A0CF+fAmxZoCxqO0q58WnaT3855Bbp2 4GbLU2ioLIfuwuIOFpp7dT17NAAc3kQMVIITbUjUoippiD2S8QjZvprWemwryoVfLQKP onOdEoax57kzjVOV7A6k350lXve9I7058P58QoZS29D81PZxzoqDa4YTAZPO1mP3gVvi 0HmOdSfOL6zdLUKWpViHZOtQ7ZcW30Df8QmNJVmFlZmWHGckjR/aYGUb6RhhTuOA6ZJl Gckg== X-Gm-Message-State: AOAM531O1R1Ddn5OGizNFjJsDJ1sbbZyt03lkPOudst14sGzuH9e8LEK p8wZXMPbgRqMMYQDTO0cUIH29BJb2XK1OA== X-Google-Smtp-Source: ABdhPJzEIgQNJNuJmO3aQcvuH6CuhhIyBG9AK/m13y6DdY52/7UHpldOG+diQW3TSLTcZ/iNkW1tdg== X-Received: by 2002:a05:6000:18d:b0:20a:9e33:8e64 with SMTP id p13-20020a056000018d00b0020a9e338e64mr3042851wrx.123.1650621912669; Fri, 22 Apr 2022 03:05:12 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 41/61] hw/arm/virt: Support TCG GICv4 Date: Fri, 22 Apr 2022 11:04:12 +0100 Message-Id: <20220422100432.2288247-42-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650625560310100001 Content-Type: text/plain; charset="utf-8" Add support for the TCG GICv4 to the virt board. For the board, the GICv4 is very similar to the GICv3, with the only difference being the size of the redistributor frame. The changes here are thus: * calculating virt_redist_capacity correctly for GICv4 * changing various places which were "if GICv3" to be "if not GICv2" * the commandline option handling Note that using GICv4 reduces the maximum possible number of CPUs on the virt board from 512 to 317, because we can now only fit half as many redistributors into the redistributor regions we have defined. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-42-peter.maydell@linaro.org --- docs/system/arm/virt.rst | 5 ++- include/hw/arm/virt.h | 12 +++++-- hw/arm/virt.c | 70 ++++++++++++++++++++++++++++++---------- 3 files changed, 67 insertions(+), 20 deletions(-) diff --git a/docs/system/arm/virt.rst b/docs/system/arm/virt.rst index 1297dff5228..5fe045cbf06 100644 --- a/docs/system/arm/virt.rst +++ b/docs/system/arm/virt.rst @@ -99,11 +99,14 @@ gic-version GICv2. Note that this limits the number of CPUs to 8. ``3`` GICv3. This allows up to 512 CPUs. + ``4`` + GICv4. Requires ``virtualization`` to be ``on``; allows up to 317 CPUs. ``host`` Use the same GIC version the host provides, when using KVM ``max`` Use the best GIC version possible (same as host when using KVM; - currently same as ``3``` for TCG, but this may change in future) + with TCG this is currently ``3`` if ``virtualization`` is ``off`` and + ``4`` if ``virtualization`` is ``on``, but this may change in future) =20 its Set ``on``/``off`` to enable/disable ITS instantiation. The default is `= `on`` diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 360463e6bfb..15feabac63d 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -113,6 +113,7 @@ typedef enum VirtGICType { VIRT_GIC_VERSION_HOST, VIRT_GIC_VERSION_2, VIRT_GIC_VERSION_3, + VIRT_GIC_VERSION_4, VIRT_GIC_VERSION_NOSEL, } VirtGICType; =20 @@ -188,7 +189,14 @@ bool virt_is_acpi_enabled(VirtMachineState *vms); /* Return number of redistributors that fit in the specified region */ static uint32_t virt_redist_capacity(VirtMachineState *vms, int region) { - return vms->memmap[region].size / GICV3_REDIST_SIZE; + uint32_t redist_size; + + if (vms->gic_version =3D=3D VIRT_GIC_VERSION_3) { + redist_size =3D GICV3_REDIST_SIZE; + } else { + redist_size =3D GICV4_REDIST_SIZE; + } + return vms->memmap[region].size / redist_size; } =20 /* Return the number of used redistributor regions */ @@ -196,7 +204,7 @@ static inline int virt_gicv3_redist_region_count(VirtMa= chineState *vms) { uint32_t redist0_capacity =3D virt_redist_capacity(vms, VIRT_GIC_REDIS= T); =20 - assert(vms->gic_version =3D=3D VIRT_GIC_VERSION_3); + assert(vms->gic_version !=3D VIRT_GIC_VERSION_2); =20 return (MACHINE(vms)->smp.cpus > redist0_capacity && vms->highmem_redists) ? 2 : 1; diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 1227c64e5b1..5bdd98e4a1f 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -522,7 +522,7 @@ static void fdt_add_gic_node(VirtMachineState *vms) qemu_fdt_setprop_cell(ms->fdt, nodename, "#address-cells", 0x2); qemu_fdt_setprop_cell(ms->fdt, nodename, "#size-cells", 0x2); qemu_fdt_setprop(ms->fdt, nodename, "ranges", NULL, 0); - if (vms->gic_version =3D=3D VIRT_GIC_VERSION_3) { + if (vms->gic_version !=3D VIRT_GIC_VERSION_2) { int nb_redist_regions =3D virt_gicv3_redist_region_count(vms); =20 qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", @@ -708,6 +708,9 @@ static void create_gic(VirtMachineState *vms, MemoryReg= ion *mem) case VIRT_GIC_VERSION_3: revision =3D 3; break; + case VIRT_GIC_VERSION_4: + revision =3D 4; + break; default: g_assert_not_reached(); } @@ -722,7 +725,7 @@ static void create_gic(VirtMachineState *vms, MemoryReg= ion *mem) qdev_prop_set_bit(vms->gic, "has-security-extensions", vms->secure= ); } =20 - if (vms->gic_version =3D=3D VIRT_GIC_VERSION_3) { + if (vms->gic_version !=3D VIRT_GIC_VERSION_2) { uint32_t redist0_capacity =3D virt_redist_capacity(vms, VIRT_GIC_R= EDIST); uint32_t redist0_count =3D MIN(smp_cpus, redist0_capacity); =20 @@ -756,7 +759,7 @@ static void create_gic(VirtMachineState *vms, MemoryReg= ion *mem) gicbusdev =3D SYS_BUS_DEVICE(vms->gic); sysbus_realize_and_unref(gicbusdev, &error_fatal); sysbus_mmio_map(gicbusdev, 0, vms->memmap[VIRT_GIC_DIST].base); - if (vms->gic_version =3D=3D VIRT_GIC_VERSION_3) { + if (vms->gic_version !=3D VIRT_GIC_VERSION_2) { sysbus_mmio_map(gicbusdev, 1, vms->memmap[VIRT_GIC_REDIST].base); if (nb_redist_regions =3D=3D 2) { sysbus_mmio_map(gicbusdev, 2, @@ -794,7 +797,7 @@ static void create_gic(VirtMachineState *vms, MemoryReg= ion *mem) ppibase + timer_irq[irq= ])); } =20 - if (vms->gic_version =3D=3D VIRT_GIC_VERSION_3) { + if (vms->gic_version !=3D VIRT_GIC_VERSION_2) { qemu_irq irq =3D qdev_get_gpio_in(vms->gic, ppibase + ARCH_GIC_MAINT_IRQ); qdev_connect_gpio_out_named(cpudev, "gicv3-maintenance-interru= pt", @@ -820,7 +823,7 @@ static void create_gic(VirtMachineState *vms, MemoryReg= ion *mem) =20 fdt_add_gic_node(vms); =20 - if (vms->gic_version =3D=3D VIRT_GIC_VERSION_3 && vms->its) { + if (vms->gic_version !=3D VIRT_GIC_VERSION_2 && vms->its) { create_its(vms); } else if (vms->gic_version =3D=3D VIRT_GIC_VERSION_2) { create_v2m(vms); @@ -1672,10 +1675,10 @@ static uint64_t virt_cpu_mp_affinity(VirtMachineSta= te *vms, int idx) * purposes are to make TCG consistent (with 64-bit KVM hosts) * and to improve SGI efficiency. */ - if (vms->gic_version =3D=3D VIRT_GIC_VERSION_3) { - clustersz =3D GICV3_TARGETLIST_BITS; - } else { + if (vms->gic_version =3D=3D VIRT_GIC_VERSION_2) { clustersz =3D GIC_TARGETLIST_BITS; + } else { + clustersz =3D GICV3_TARGETLIST_BITS; } } return arm_cpu_mp_affinity(idx, clustersz); @@ -1808,6 +1811,10 @@ static void finalize_gic_version(VirtMachineState *v= ms) error_report( "gic-version=3D3 is not supported with kernel-irqchip= =3Doff"); exit(1); + case VIRT_GIC_VERSION_4: + error_report( + "gic-version=3D4 is not supported with kernel-irqchip= =3Doff"); + exit(1); } } =20 @@ -1845,6 +1852,9 @@ static void finalize_gic_version(VirtMachineState *vm= s) case VIRT_GIC_VERSION_2: case VIRT_GIC_VERSION_3: break; + case VIRT_GIC_VERSION_4: + error_report("gic-version=3D4 is not supported with KVM"); + exit(1); } =20 /* Check chosen version is effectively supported by the host */ @@ -1868,7 +1878,12 @@ static void finalize_gic_version(VirtMachineState *v= ms) case VIRT_GIC_VERSION_MAX: if (module_object_class_by_name("arm-gicv3")) { /* CONFIG_ARM_GICV3_TCG was set */ - vms->gic_version =3D VIRT_GIC_VERSION_3; + if (vms->virt) { + /* GICv4 only makes sense if CPU has EL2 */ + vms->gic_version =3D VIRT_GIC_VERSION_4; + } else { + vms->gic_version =3D VIRT_GIC_VERSION_3; + } } else { vms->gic_version =3D VIRT_GIC_VERSION_2; } @@ -1876,6 +1891,12 @@ static void finalize_gic_version(VirtMachineState *v= ms) case VIRT_GIC_VERSION_HOST: error_report("gic-version=3Dhost requires KVM"); exit(1); + case VIRT_GIC_VERSION_4: + if (!vms->virt) { + error_report("gic-version=3D4 requires virtualization enabled"= ); + exit(1); + } + break; case VIRT_GIC_VERSION_2: case VIRT_GIC_VERSION_3: break; @@ -2043,14 +2064,16 @@ static void machvirt_init(MachineState *machine) vms->psci_conduit =3D QEMU_PSCI_CONDUIT_HVC; } =20 - /* The maximum number of CPUs depends on the GIC version, or on how - * many redistributors we can fit into the memory map. + /* + * The maximum number of CPUs depends on the GIC version, or on how + * many redistributors we can fit into the memory map (which in turn + * depends on whether this is a GICv3 or v4). */ - if (vms->gic_version =3D=3D VIRT_GIC_VERSION_3) { + if (vms->gic_version =3D=3D VIRT_GIC_VERSION_2) { + virt_max_cpus =3D GIC_NCPU; + } else { virt_max_cpus =3D virt_redist_capacity(vms, VIRT_GIC_REDIST) + virt_redist_capacity(vms, VIRT_HIGH_GIC_REDIST2); - } else { - virt_max_cpus =3D GIC_NCPU; } =20 if (max_cpus > virt_max_cpus) { @@ -2438,8 +2461,19 @@ static void virt_set_mte(Object *obj, bool value, Er= ror **errp) static char *virt_get_gic_version(Object *obj, Error **errp) { VirtMachineState *vms =3D VIRT_MACHINE(obj); - const char *val =3D vms->gic_version =3D=3D VIRT_GIC_VERSION_3 ? "3" := "2"; + const char *val; =20 + switch (vms->gic_version) { + case VIRT_GIC_VERSION_4: + val =3D "4"; + break; + case VIRT_GIC_VERSION_3: + val =3D "3"; + break; + default: + val =3D "2"; + break; + } return g_strdup(val); } =20 @@ -2447,7 +2481,9 @@ static void virt_set_gic_version(Object *obj, const c= har *value, Error **errp) { VirtMachineState *vms =3D VIRT_MACHINE(obj); =20 - if (!strcmp(value, "3")) { + if (!strcmp(value, "4")) { + vms->gic_version =3D VIRT_GIC_VERSION_4; + } else if (!strcmp(value, "3")) { vms->gic_version =3D VIRT_GIC_VERSION_3; } else if (!strcmp(value, "2")) { vms->gic_version =3D VIRT_GIC_VERSION_2; @@ -2905,7 +2941,7 @@ static void virt_machine_class_init(ObjectClass *oc, = void *data) virt_set_gic_version); object_class_property_set_description(oc, "gic-version", "Set GIC version. " - "Valid values are 2, 3, host and= max"); + "Valid values are 2, 3, 4, host = and max"); =20 object_class_property_add_str(oc, "iommu", virt_get_iommu, virt_set_io= mmu); object_class_property_set_description(oc, "iommu", --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650624425; cv=none; d=zohomail.com; s=zohoarc; b=WqfgRhbSsTC2XtCfsLTF13iFzwOISJu4VEmNFRqVudemh9rJ7pIeqqkXJZzFM2nm6hvoZNXaC6aswW0zlMqvkdZkCiBbUUSrrHrG/2LpmOQsDodGaR9ifiugd+ml/EqvmuYUcV0lKm4xcUrBRD1zejEcx/SRIb4hGS9rPOJuzfc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650624425; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=c/OOC42uprblXlXB5QXrfAyFGH41UtdvfiTd3g5mfb4=; b=DqaANygyKShPlxVUEgyPqTr3w9RZ8cPHoSHv8WtptCOguo2X0WkCEy6x/1zMPbW5D9VJXoOLnYmWWX4XUDsNOTRtYibNi6Eh5sio7ju3mCpNzTjYdu6wAbIpPDDx12rjB7hK8ElnF3JSto+zzG0I6a3tth+VYm3O0pn178rH8tU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650624425875437.54132632359347; Fri, 22 Apr 2022 03:47:05 -0700 (PDT) Received: from localhost ([::1]:34718 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhqoa-00021n-Qe for importer2@patchew.org; Fri, 22 Apr 2022 06:47:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59006) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhqA9-00059F-JV for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:17 -0400 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]:34690) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhqA7-0002t5-RY for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:17 -0400 Received: by mail-wm1-x32f.google.com with SMTP id ay36-20020a05600c1e2400b0038ebc885115so4692208wmb.1 for ; Fri, 22 Apr 2022 03:05:15 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.12 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=c/OOC42uprblXlXB5QXrfAyFGH41UtdvfiTd3g5mfb4=; b=IQHtHXqfQefIJl5DmILOuHO6p/n5v/818cNo7tD+aOep1QMLWOvHR3fWSD74NkdjQh vQXLdP2qXQtEcKuHx+7OQy1acFQwKsz5FPIV6r0RS//4UHbcr5D84jwVtFgR3+hKq95w trK+eKrCY1KEShqFFsM/BEMHUsNtvsypTvu1tx8LFLGaiVDFzIk8LHs9aL8VVVdqIrIi ThQM4MzG9/7E3PJ3GfRDbFN6nQhrCZ2tTTVWu9fpOmCGWeCKIT0HJGTa1oSet+8VjOa5 V2mAplKIQztQBe9+fGJU0PQ6qUZrDpKvzVPdDDoAmX8c4S/b4DhEz3gt3SbgrwUNm33M 2jxg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=c/OOC42uprblXlXB5QXrfAyFGH41UtdvfiTd3g5mfb4=; b=juHjZ6LALZDajwZEfrXMYFZfm5oRiU0J8f94VHVyvTrjONZ11oc0V6i3QciHx1JW8M +t0E6tEQgO426c9aphOs4x9P903vdTqpqzeTL+2+Rm52qjuxqgb3QtbuuiL6p2XGxzqC t8pT0xUEPnJn2vbWgBL7wLUJ3KmZLnOMiRyuoKbubf5I2NfSvaMSCTlCC9k6m9vgZSTq SS8hsm0bXkXe5N4kU6RNDIcgGy070Hoc23F6wYqeLZC1gUVmwYbaVS0v/R4ehIMl7cAa bQEYxxYtJc1dcW/vXFhOIltoYSmc/QPqbXq4cmfbCBeKf+2VoT/eOyRZo0wOksprBw2B iL7A== X-Gm-Message-State: AOAM533h/6yQXYiRaUXXJ+qJ1e+yclT3OAsuapEzdz8npYcSAQDKGabU Yh96jaYgAMMQMjZdfyegsmfMtfe/DymAkg== X-Google-Smtp-Source: ABdhPJxdvqx1NpaWZJc237dLb3yb6IOvaswOFO6yMUz3RGtpaEMz4UX5V71mxz2aAn5xLDHeLJo7+w== X-Received: by 2002:a05:600c:1c15:b0:392:8c46:4fd4 with SMTP id j21-20020a05600c1c1500b003928c464fd4mr12248177wms.205.1650621913597; Fri, 22 Apr 2022 03:05:13 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 42/61] target/arm: Update ISAR fields for ARMv8.8 Date: Fri, 22 Apr 2022 11:04:13 +0100 Message-Id: <20220422100432.2288247-43-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01, UPPERCASE_50_75=0.008 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650624427589100001 From: Richard Henderson Update isar fields per ARM DDI0487 H.a. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Peter Maydell --- target/arm/cpu.h | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index cb5359a7470..564821eeded 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1934,6 +1934,7 @@ FIELD(ID_MMFR4, CCIDX, 24, 4) FIELD(ID_MMFR4, EVT, 28, 4) =20 FIELD(ID_MMFR5, ETS, 0, 4) +FIELD(ID_MMFR5, NTLBPA, 4, 4) =20 FIELD(ID_PFR0, STATE0, 0, 4) FIELD(ID_PFR0, STATE1, 4, 4) @@ -1986,6 +1987,16 @@ FIELD(ID_AA64ISAR1, SPECRES, 40, 4) FIELD(ID_AA64ISAR1, BF16, 44, 4) FIELD(ID_AA64ISAR1, DGH, 48, 4) FIELD(ID_AA64ISAR1, I8MM, 52, 4) +FIELD(ID_AA64ISAR1, XS, 56, 4) +FIELD(ID_AA64ISAR1, LS64, 60, 4) + +FIELD(ID_AA64ISAR2, WFXT, 0, 4) +FIELD(ID_AA64ISAR2, RPRES, 4, 4) +FIELD(ID_AA64ISAR2, GPA3, 8, 4) +FIELD(ID_AA64ISAR2, APA3, 12, 4) +FIELD(ID_AA64ISAR2, MOPS, 16, 4) +FIELD(ID_AA64ISAR2, BC, 20, 4) +FIELD(ID_AA64ISAR2, PAC_FRAC, 24, 4) =20 FIELD(ID_AA64PFR0, EL0, 0, 4) FIELD(ID_AA64PFR0, EL1, 4, 4) @@ -2008,6 +2019,10 @@ FIELD(ID_AA64PFR1, SSBS, 4, 4) FIELD(ID_AA64PFR1, MTE, 8, 4) FIELD(ID_AA64PFR1, RAS_FRAC, 12, 4) FIELD(ID_AA64PFR1, MPAM_FRAC, 16, 4) +FIELD(ID_AA64PFR1, SME, 24, 4) +FIELD(ID_AA64PFR1, RNDR_TRAP, 28, 4) +FIELD(ID_AA64PFR1, CSV2_FRAC, 32, 4) +FIELD(ID_AA64PFR1, NMI, 36, 4) =20 FIELD(ID_AA64MMFR0, PARANGE, 0, 4) FIELD(ID_AA64MMFR0, ASIDBITS, 4, 4) @@ -2034,6 +2049,11 @@ FIELD(ID_AA64MMFR1, SPECSEI, 24, 4) FIELD(ID_AA64MMFR1, XNX, 28, 4) FIELD(ID_AA64MMFR1, TWED, 32, 4) FIELD(ID_AA64MMFR1, ETS, 36, 4) +FIELD(ID_AA64MMFR1, HCX, 40, 4) +FIELD(ID_AA64MMFR1, AFP, 44, 4) +FIELD(ID_AA64MMFR1, NTLBPA, 48, 4) +FIELD(ID_AA64MMFR1, TIDCP1, 52, 4) +FIELD(ID_AA64MMFR1, CMOW, 56, 4) =20 FIELD(ID_AA64MMFR2, CNP, 0, 4) FIELD(ID_AA64MMFR2, UAO, 4, 4) @@ -2060,7 +2080,10 @@ FIELD(ID_AA64DFR0, CTX_CMPS, 28, 4) FIELD(ID_AA64DFR0, PMSVER, 32, 4) FIELD(ID_AA64DFR0, DOUBLELOCK, 36, 4) FIELD(ID_AA64DFR0, TRACEFILT, 40, 4) +FIELD(ID_AA64DFR0, TRACEBUFFER, 44, 4) FIELD(ID_AA64DFR0, MTPMU, 48, 4) +FIELD(ID_AA64DFR0, BRBE, 52, 4) +FIELD(ID_AA64DFR0, HPMN0, 60, 4) =20 FIELD(ID_AA64ZFR0, SVEVER, 0, 4) FIELD(ID_AA64ZFR0, AES, 4, 4) @@ -2082,6 +2105,7 @@ FIELD(ID_DFR0, PERFMON, 24, 4) FIELD(ID_DFR0, TRACEFILT, 28, 4) =20 FIELD(ID_DFR1, MTPMU, 0, 4) +FIELD(ID_DFR1, HPMN0, 4, 4) =20 FIELD(DBGDIDR, SE_IMP, 12, 1) FIELD(DBGDIDR, NSUHD_IMP, 14, 1) --=20 2.25.1 From nobody Tue May 7 20:56:35 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650624748; cv=none; d=zohomail.com; s=zohoarc; b=RVajk2upv6oazJRx4/WnwQK0orTGp0y6b6Q/CwwEeBVwyEyXNWnZQvBgID7beCLaprYD+D01s8cgnfY494F5ilpu8auf2KyuS9lgWH+aeRvJu/rmcuoTn9rFsPj5LjBNBKgBWwkal8I/mHI6TNGTtXk5eB9OJZNlJ4LC7FhSDA8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650624748; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=ivxQ1qvgY8YzLhlS8QE+z47bKLIgh4ThHo8REAZyZdE=; b=UVX1xp70L2fipuJ65yvfUaLVlWAO0kFmZFtKwQGWd//JYMJl5XQDThchji917McTcduIG0jU0PH6822HszFAfkUxeltIRT/sVMxNb/eU9d90I1TH6wzztvshQx4pG+8HPVg2uH8YQRu52A/DmIvkDmHepvHDOKMu1Zrssta1K5Q= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650624748665990.2662241577258; Fri, 22 Apr 2022 03:52:28 -0700 (PDT) Received: from localhost ([::1]:43418 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhqtn-0008Kx-AX for importer2@patchew.org; Fri, 22 Apr 2022 06:52:27 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59008) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhqA9-00059i-TV for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:17 -0400 Received: from mail-wm1-x32e.google.com ([2a00:1450:4864:20::32e]:39562) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhqA8-0002t7-3o for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:17 -0400 Received: by mail-wm1-x32e.google.com with SMTP id ay11-20020a05600c1e0b00b0038eb92fa965so7622795wmb.4 for ; Fri, 22 Apr 2022 03:05:15 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.13 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=ivxQ1qvgY8YzLhlS8QE+z47bKLIgh4ThHo8REAZyZdE=; b=uLqY0t8acPwAsFT6XUl6HDrfqj1001TsoDz/02yMPefsoftRtO/7oI/ZbFFSIcsLWu nYw2LuG/mR1jZqblOcUXPGZjFiAkApPm2m3kPmirDB4nfKhx5BG93IzF9HKZkkDtgGj7 Ih7ZLTnlTfMFoM0J/q8oVoKbkili/C3XvQ0txFW3/7amRMEdLR3ST+yCFpSluHZ7hdiO VKrp6+hpdv6Yeez+x/jTKfbLopM4w+HlhxaD4vTyXd4w/+cPQHp0YAD6K7g4RddPjELJ ANAI4m6UbbNnOzISw/XooB04lTYxc1HIsSDURW7B0cyGYuSqQwMj+kHU6VIUbAYnASjv +G8Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ivxQ1qvgY8YzLhlS8QE+z47bKLIgh4ThHo8REAZyZdE=; b=RTvxFhKJZURnB5K9rqOETtiB1ZpX1FPzS4reFslZdziuK76/DBVIl4pB7M0Yw4OVRY NtjaVLWIcG8vhuODzM4E+ND7cSQsYo60vynsje9jCtxM3WW1VBMsdZaaot8Vwh14RO/z 9YoxycT5z9D3EJqxlmIyXV+ntFu1T5lMS5M1q0Fnu3ScL5soWCeM8iDJq+Cuq15SWauc t23ijqy6dChjm8KxbNCm6VFWpNxIYpD0eeGOIv9TgsMxcb3pBxsZKRqpUfitACXX8NRL UgcYAViXtwxPKoePAN84B2xYvQrkH/m82ptxgBKdlpkm03sDhYuyH8nr/UlXjgL/Sr4J I1Og== X-Gm-Message-State: AOAM532Jn2Vpj6RT+hnrHUAmSuZN8/CZsOIxk7cnwqPbTx2ql+enJyNd vEdbghP8SyYjqwjby/nbrGo6NOC/++sgag== X-Google-Smtp-Source: ABdhPJw5n1Lmzt4E854B8I7mcjQyqw6A4W03hwTe7uQBJExqlfl6fH4d8IfqcFYCdw3sNIXaA4FxSg== X-Received: by 2002:a05:600c:240a:b0:38e:af6f:510f with SMTP id 10-20020a05600c240a00b0038eaf6f510fmr12556963wmp.46.1650621914605; Fri, 22 Apr 2022 03:05:14 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 43/61] target/arm: Update SCR_EL3 bits to ARMv8.8 Date: Fri, 22 Apr 2022 11:04:14 +0100 Message-Id: <20220422100432.2288247-44-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650624750786100001 From: Richard Henderson Update SCR_EL3 fields per ARM DDI0487 H.a. Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Peter Maydell --- target/arm/cpu.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 564821eeded..cc8f7f74eab 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1545,6 +1545,18 @@ static inline void xpsr_write(CPUARMState *env, uint= 32_t val, uint32_t mask) #define SCR_FIEN (1U << 21) #define SCR_ENSCXT (1U << 25) #define SCR_ATA (1U << 26) +#define SCR_FGTEN (1U << 27) +#define SCR_ECVEN (1U << 28) +#define SCR_TWEDEN (1U << 29) +#define SCR_TWEDEL MAKE_64BIT_MASK(30, 4) +#define SCR_TME (1ULL << 34) +#define SCR_AMVOFFEN (1ULL << 35) +#define SCR_ENAS0 (1ULL << 36) +#define SCR_ADEN (1ULL << 37) +#define SCR_HXEN (1ULL << 38) +#define SCR_TRNDR (1ULL << 40) +#define SCR_ENTP2 (1ULL << 41) +#define SCR_GPF (1ULL << 48) =20 #define HSTR_TTEE (1 << 16) #define HSTR_TJDBX (1 << 17) --=20 2.25.1 From nobody Tue May 7 20:56:36 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650624981; cv=none; d=zohomail.com; s=zohoarc; b=UwG3X40Cyj4FOSr7hcuP8d+aXM+UUFRiehdUhPyHWbAXz5FbcNhRYCC0G16ZqCk/rGfrjBBqz/8fearfbYrzBUncYkTSv/zQO+D+3EbQpVws4za9KhTDSKYgRJQ1HqtKq9mn4FhRy8580FuLsfDDeHNLpec/LeD0tUe7evvLf+E= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650624981; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=S4r+9Jtute0CnHhryAfrHHj2Bmc0mJidkIeWbRs5UF8=; b=OjB120F+m2UJobaRsXpsS/kHR4oE+eBDqnNebndlDtT8vHPCsLm9irYxjWc4jgK7CneSYHvVRKOv2tiZcvEMKNcpt1RfImsSwi12G9X/P1NN4YV729sKr4LKfG3XDUwIFNe1DK/Q0WVTv/Z08s1uGYyd1IQjWOJeDz3AGC11VHY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650624981757891.9855332319393; Fri, 22 Apr 2022 03:56:21 -0700 (PDT) Received: from localhost ([::1]:51904 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhqxY-0007Ct-P7 for importer2@patchew.org; Fri, 22 Apr 2022 06:56:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59052) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhqAC-0005Gh-NT for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:20 -0400 Received: from mail-wr1-x433.google.com ([2a00:1450:4864:20::433]:42901) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhqA9-0002tH-TG for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:20 -0400 Received: by mail-wr1-x433.google.com with SMTP id bv16so10285276wrb.9 for ; Fri, 22 Apr 2022 03:05:16 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.14 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=S4r+9Jtute0CnHhryAfrHHj2Bmc0mJidkIeWbRs5UF8=; b=BnfiCVdqaEy7bhtikvhHLs9ze4nuHawhV9Cl/OB3Upw2EP4mVi7IlxC4iQNqqZsJDp jK2ttVqhlTAs+jNnVGyzpYAR+tWA9dzHQVvqz+OeTKVybl9yZa5JzOoXJZ2Hgkuw6ro1 J8BDmy/w3A5YGff8p1m680ZInSSk67nGw22SGZNm+JxIMPsIIwrMc2q8m0c9LFUl5Vuu M0Qtw7KhmbRmNN8DltrfWeH3Pp61YGllCjmqu8Qqcv4ypsY+Ql/Npo5KC1xrLBTUFAkX da1zZRukhHrrydQsDHyBgTqBSRuwNZWo3krM/nVimkeZLN/t7IyDwvnGlQAQohuQumZm 7Kaw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=S4r+9Jtute0CnHhryAfrHHj2Bmc0mJidkIeWbRs5UF8=; b=7Rb1k+hFnqgmBtqDnctvD8h2BUOAfNDJI9AY2O1+ggw+1t1a4siI0B+I8hsmkQ8gJa VxdhWG8UvaCTX7zT78CTV1ju+R2XV6JFQq362xrhYkw3LX7MCTNY1iKRZsynE4M0BYVz 0fmgLsTXxitXF5q/ghKEZ4KvNP7r0Bdx3eFe3xnnKtSESPjqkxYR2OhnimH5cFlA7Amy kDZEjklzyLhfJ0DSDnb0QiNnWUgIkqvR1zOZ6rqCGI84kZH1bUhmHddfPcZ07UIx65qG H2EQXXO2kM722eWIMSuieGE1znm2DHc47xrgdRHfFi9s8qkTFnvxUQMmPXV+nsDgXaKq 7tIg== X-Gm-Message-State: AOAM533oxwIGjDNvvrkrKXDwNm5+Q7TQ6A5z61miWUMVPBEVdWpqkgkh TxbZaOweVbz72l4hPnpPV3EJ/I8PmAtziQ== X-Google-Smtp-Source: ABdhPJyeDsDHTD1X4PTUxTTtZWK8M8eKNYj4Sg4mG/c4l2oyNJ1h3ntaYooMLJULNEZcp2g8l9KHLA== X-Received: by 2002:adf:eacf:0:b0:20a:c8c4:ac51 with SMTP id o15-20020adfeacf000000b0020ac8c4ac51mr2078936wrn.510.1650621915500; Fri, 22 Apr 2022 03:05:15 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 44/61] target/arm: Update SCTLR bits to ARMv9.2 Date: Fri, 22 Apr 2022 11:04:15 +0100 Message-Id: <20220422100432.2288247-45-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650624983670100001 From: Richard Henderson Update SCTLR_ELx fields per ARM DDI0487 H.a. Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Peter Maydell --- target/arm/cpu.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index cc8f7f74eab..bee1cf4653a 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1233,6 +1233,20 @@ void pmu_init(ARMCPU *cpu); #define SCTLR_ATA0 (1ULL << 42) /* v8.5-MemTag */ #define SCTLR_ATA (1ULL << 43) /* v8.5-MemTag */ #define SCTLR_DSSBS_64 (1ULL << 44) /* v8.5, AArch64 only */ +#define SCTLR_TWEDEn (1ULL << 45) /* FEAT_TWED */ +#define SCTLR_TWEDEL MAKE_64_MASK(46, 4) /* FEAT_TWED */ +#define SCTLR_TMT0 (1ULL << 50) /* FEAT_TME */ +#define SCTLR_TMT (1ULL << 51) /* FEAT_TME */ +#define SCTLR_TME0 (1ULL << 52) /* FEAT_TME */ +#define SCTLR_TME (1ULL << 53) /* FEAT_TME */ +#define SCTLR_EnASR (1ULL << 54) /* FEAT_LS64_V */ +#define SCTLR_EnAS0 (1ULL << 55) /* FEAT_LS64_ACCDATA */ +#define SCTLR_EnALS (1ULL << 56) /* FEAT_LS64 */ +#define SCTLR_EPAN (1ULL << 57) /* FEAT_PAN3 */ +#define SCTLR_EnTP2 (1ULL << 60) /* FEAT_SME */ +#define SCTLR_NMI (1ULL << 61) /* FEAT_NMI */ +#define SCTLR_SPINTMASK (1ULL << 62) /* FEAT_NMI */ +#define SCTLR_TIDCP (1ULL << 63) /* FEAT_TIDCP1 */ =20 #define CPTR_TCPAC (1U << 31) #define CPTR_TTA (1U << 20) --=20 2.25.1 From nobody Tue May 7 20:56:36 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650626685; cv=none; d=zohomail.com; s=zohoarc; b=jNYAxxbeMaQwJ9eIpWglI72sgb0q5SjXu+nBc2E4cB9hnu6QAGcl0Yb20pPQDRMmm6x/wDX/cMT6fH/iCjmZsZBzhiBilgmcLhwINSrbtyxpufl5QcRGSG2AsEO/1IH5jJFdxxMvcj/pXDp+VE5ZC512rLOfSBJU8tBr8rOMDFY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650626685; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=eHw+HjmQRq2oIAbizpb+nwuiBNkSn27k7ONTIxuJM9E=; b=BFCEzWW3C5XdYf/5v5QvYdWlX+J3OFCyXAWaezElHtkzuAKLiZSVxt6K6FdX8geZS+15fdtcwZvjUVp0KJMDGOzdJppNmpqr34qEPsRtcQKb0pNFOxSi9SPRYu5aWtNrYCvUz/yLosscqxjkhz++x46sJbghFXhDbJr6pygMGhg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650626685382390.7607400799467; Fri, 22 Apr 2022 04:24:45 -0700 (PDT) Received: from localhost ([::1]:50088 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhrP2-0007nU-0Y for importer2@patchew.org; Fri, 22 Apr 2022 07:24:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59072) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhqAD-0005It-AZ for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:21 -0400 Received: from mail-wm1-x329.google.com ([2a00:1450:4864:20::329]:44587) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhqAB-0002tb-LA for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:21 -0400 Received: by mail-wm1-x329.google.com with SMTP id r4-20020a05600c35c400b0039295dc1fc3so5088113wmq.3 for ; Fri, 22 Apr 2022 03:05:18 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.15 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=eHw+HjmQRq2oIAbizpb+nwuiBNkSn27k7ONTIxuJM9E=; b=icGpDVA7TDqsxOI5X+kKz7V2Fnzqt4YUlpYJ08PebBwJ7Fem/u/gDP4KQNDhHTi9BD +DmPO25KMktbctQR+cfCZQ+jBCHtrm8IMKO1DAUYCEZq9zO0RZaPfXiUJuGiKQvbIV/S qd8TtAgIaUcYwsE2dpQlGP82hm/Ub++u3mgaw9MQJQlHTfE692UZ+4D91nhrCAezUkFk BCaXch2ZkcDF5ILDvyACQN6toxRzHqPxFPLlt0QxwHmXVQn6W8iTPmLM0fWMCqfLG0FU FtpC+kq4dsvEcEpmz4S7QcnQZ1ze4ndacw09MmCf5e4B+kO3vASM8CnwTrSV/MxVZLcr HcNQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=eHw+HjmQRq2oIAbizpb+nwuiBNkSn27k7ONTIxuJM9E=; b=mD6O4V0gMrZif+14J1DdBZK6o7ebRdgCNM0OHyh7u6x0SHykK5lO/uVq0hPar6G1VR L4ERSNpLHU4FrgQ/YTcSQmTuMR/oIhU/7+7jaUOB4utDjqGXQcz9G/Wowe7QeTOXeJ2m 9Eo58P2EFlqdEj5MMhgs3Cs0jan5/7CF/TnTufwSm2Scw/XvUA8tvKAyu3Wa1/EKHQ3i Lu44I+fM+5PI+gGC+9zJqPCShfH1ZZHLat9yHvtiq4cHOgZVaeXw/3Uw4G9f7MWRimL9 qvopo0sAzzo73IdEPj+DCyD/UwdkyiTbzJtXkEunyEoiqss9PIT36FjMtqRkGt5r2PhH BUsQ== X-Gm-Message-State: AOAM533gWYlyhxkjSJ2oFXN+PqwberRpd+3ud71KOQSGHWqvN/M8QanF W2JKE8LO+wa61AznD6+ScicLNG7ey91eiQ== X-Google-Smtp-Source: ABdhPJxvyfYg0ZFLYWqm15tY3x4PPkddhtD65QYpCYULvw7QTwKzlHzh+6kd7n3vdcIb4a7hdL1AOg== X-Received: by 2002:a05:600c:4313:b0:38e:b150:2f8e with SMTP id p19-20020a05600c431300b0038eb1502f8emr12585999wme.198.1650621917031; Fri, 22 Apr 2022 03:05:17 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 45/61] target/arm: Change DisasContext.aarch64 to bool Date: Fri, 22 Apr 2022 11:04:16 +0100 Message-Id: <20220422100432.2288247-46-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650626686544100001 From: Richard Henderson Bool is a more appropriate type for this value. Move the member down in the struct to keep the bool type members together and remove a hole. Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Peter Maydell --- target/arm/translate.h | 2 +- target/arm/translate-a64.c | 2 +- target/arm/translate.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/target/arm/translate.h b/target/arm/translate.h index 3a0db801d3b..8b7dd1a4c05 100644 --- a/target/arm/translate.h +++ b/target/arm/translate.h @@ -59,12 +59,12 @@ typedef struct DisasContext { * so that top level loop can generate correct syndrome information. */ uint32_t svc_imm; - int aarch64; int current_el; /* Debug target exception level for single-step exceptions */ int debug_target_el; GHashTable *cp_regs; uint64_t features; /* CPU features bits */ + bool aarch64; /* Because unallocated encodings generate different exception syndrome * information from traps due to FP being disabled, we can't do a sing= le * "is fp access disabled" check at a high level in the decode tree. diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 19c09c3b535..f6303848918 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -14664,7 +14664,7 @@ static void aarch64_tr_init_disas_context(DisasCont= extBase *dcbase, dc->isar =3D &arm_cpu->isar; dc->condjmp =3D 0; =20 - dc->aarch64 =3D 1; + dc->aarch64 =3D true; /* If we are coming from secure EL0 in a system with a 32-bit EL3, then * there is no secure EL1, so we route exceptions to EL3. */ diff --git a/target/arm/translate.c b/target/arm/translate.c index 38e7a38f280..6018fee2ef1 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -9334,7 +9334,7 @@ static void arm_tr_init_disas_context(DisasContextBas= e *dcbase, CPUState *cs) dc->isar =3D &cpu->isar; dc->condjmp =3D 0; =20 - dc->aarch64 =3D 0; + dc->aarch64 =3D false; /* If we are coming from secure EL0 in a system with a 32-bit EL3, then * there is no secure EL1, so we route exceptions to EL3. */ --=20 2.25.1 From nobody Tue May 7 20:56:36 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650626953; cv=none; d=zohomail.com; s=zohoarc; b=ivIc0mk8iZkPPVEwpGIN17ZwO1xOv/wxs4T4waPWlbmM2wR8yqvx9NKB5t6GTTzrLwe2aVuaMOZCAJmRrFSLWSapu01qf/b1bAWcTb4gXD/YrS9Rk2QMG0qCfl1iVrCbqLayrbsacEylGCnbuU7iuZu+xonfrQ1e7MjNTwzYINU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650626953; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=gKRci0cpIs4ADQf7JfcVVwdBVmU79gOg4J5HNz/ZQik=; b=XIjGncfTFm/Ep5HGygz+Xz8l15NQV+6ZxpAW4foqtlitSZS8RZ0CQK02Bk3Srp1OOrDUmaW8vog9ulPREP4vllSLMEh0TFSDhUKNLkQsNq9PyE1H50yamKNkRGu0lS/nsgsoZFRwZMfZKt05RuYC1adxtGa//qjUVyPNb2QIgNQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650626953055423.7787208001322; Fri, 22 Apr 2022 04:29:13 -0700 (PDT) Received: from localhost ([::1]:57624 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhrTL-0005Mc-Ft for importer2@patchew.org; Fri, 22 Apr 2022 07:29:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59084) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhqAE-0005M1-1v for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:22 -0400 Received: from mail-wm1-x32e.google.com ([2a00:1450:4864:20::32e]:35600) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhqAC-0002tu-49 for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:21 -0400 Received: by mail-wm1-x32e.google.com with SMTP id c190-20020a1c35c7000000b0038e37907b5bso7650896wma.0 for ; Fri, 22 Apr 2022 03:05:19 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.17 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=gKRci0cpIs4ADQf7JfcVVwdBVmU79gOg4J5HNz/ZQik=; b=Ei799HtUxox5oTeG4xLGDhhbg0jjio6IJGF5qjPxQqFqPBhVLO6U19UbrqZZz8cyUX F7AbasH96/lAzQlzNjQ4ni3o15ZMfBvXir27OLQXJwzDRGDiY+kVUm3b3EwO/pDpsMMW AM6KHvAq8XNqsgwLP4vwu2giCc33b5x0r63A5FIbnGk3GT7R/Uv06+JodmZGF7lWfRRS DYnLXYZnLKB9NTUUvq4uzEnA63jh73TSCxA+NCrpEDicpF5pRykCLz2yqMWkLbqeS1MX ye50Ah0s5c3XmEEgZKmQSOJXs8Zz5SWuRqGL2nAp6Y7HZCLMkFCZFQGQVLAnybr91cF5 qLJA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gKRci0cpIs4ADQf7JfcVVwdBVmU79gOg4J5HNz/ZQik=; b=sAWcRMWygu9Lr/y8cKpjImReyuPLf0sQNVEa4whHj0Y9/hbUqoY/FF4RmgaO4hQPnG mrKgIFQh6gdSM9TKx02nar091hUMe9o5Rl12+9NtZ56zP0BNw7J0MMY1gt6axtNXg7jE AQ0xan7RpwDWLswpYpXWSadKgWN5ESTjoVjcAOBm1il2BImG/iHPMhYUacpvO2X8lxpj uzFzIvWN5iTsCGKJc28NOyze1T1tgCQ2Ufz3QaRrjjGaaBeHvNHgxTgCmsYKHbWSY0IV ZFfKyZk+eHLtKDkq++2M2B+Cwb95fQ5gFwf8mbT4lMDdL43cyiJkGzFoFcA5vQr8//eb aKmQ== X-Gm-Message-State: AOAM531Av/uL4W6r9caBQwiM1tLojDXrsKdeZEX721JElUwXW8I/PNfH 5b/GgG4LcZKye59DYpm+PIo59mUV6d9iZw== X-Google-Smtp-Source: ABdhPJzUhlSgIKwHXTwKB6llbExbDSjWcpJn9Qkx5YtoebPiAAmnEUxlgP6I3rKwh9aMgoxifHRKVw== X-Received: by 2002:a05:600c:a06:b0:392:a4f2:2097 with SMTP id z6-20020a05600c0a0600b00392a4f22097mr12708019wmp.97.1650621918071; Fri, 22 Apr 2022 03:05:18 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 46/61] target/arm: Change CPUArchState.aarch64 to bool Date: Fri, 22 Apr 2022 11:04:17 +0100 Message-Id: <20220422100432.2288247-47-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650626954160100001 From: Richard Henderson Bool is a more appropriate type for this value. Adjust the assignments to use true/false. Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Peter Maydell --- target/arm/cpu.h | 2 +- target/arm/cpu.c | 2 +- target/arm/helper-a64.c | 4 ++-- target/arm/helper.c | 2 +- target/arm/hvf/hvf.c | 2 +- 5 files changed, 6 insertions(+), 6 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index bee1cf4653a..31e46709277 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -259,7 +259,7 @@ typedef struct CPUArchState { * all other bits are stored in their correct places in env->pstate */ uint32_t pstate; - uint32_t aarch64; /* 1 if CPU is in aarch64 state; inverse of PSTATE.n= RW */ + bool aarch64; /* True if CPU is in aarch64 state; inverse of PSTATE.nR= W */ =20 /* Cached TBFLAGS state. See below for which bits are included. */ CPUARMTBFlags hflags; diff --git a/target/arm/cpu.c b/target/arm/cpu.c index fa13fce355a..7e9f7d146df 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -189,7 +189,7 @@ static void arm_cpu_reset(DeviceState *dev) =20 if (arm_feature(env, ARM_FEATURE_AARCH64)) { /* 64 bit CPUs always start in 64 bit mode */ - env->aarch64 =3D 1; + env->aarch64 =3D true; #if defined(CONFIG_USER_ONLY) env->pstate =3D PSTATE_MODE_EL0t; /* Userspace expects access to DC ZVA, CTL_EL0 and the cache ops */ diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c index 7cf953b1e64..77a8502b6b6 100644 --- a/target/arm/helper-a64.c +++ b/target/arm/helper-a64.c @@ -952,7 +952,7 @@ void HELPER(exception_return)(CPUARMState *env, uint64_= t new_pc) qemu_mutex_unlock_iothread(); =20 if (!return_to_aa64) { - env->aarch64 =3D 0; + env->aarch64 =3D false; /* We do a raw CPSR write because aarch64_sync_64_to_32() * will sort the register banks out for us, and we've already * caught all the bad-mode cases in el_from_spsr(). @@ -975,7 +975,7 @@ void HELPER(exception_return)(CPUARMState *env, uint64_= t new_pc) } else { int tbii; =20 - env->aarch64 =3D 1; + env->aarch64 =3D true; spsr &=3D aarch64_pstate_valid_mask(&env_archcpu(env)->isar); pstate_write(env, spsr); if (!arm_singlestep_active(env)) { diff --git a/target/arm/helper.c b/target/arm/helper.c index d7715c911a1..f1e91b197e2 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -10181,7 +10181,7 @@ static void arm_cpu_do_interrupt_aarch64(CPUState *= cs) } =20 pstate_write(env, PSTATE_DAIF | new_mode); - env->aarch64 =3D 1; + env->aarch64 =3D true; aarch64_restore_sp(env, new_el); helper_rebuild_hflags_a64(env, new_el); =20 diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index 567e296b21c..b11a8b9a189 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -564,7 +564,7 @@ int hvf_arch_init_vcpu(CPUState *cpu) hv_return_t ret; int i; =20 - env->aarch64 =3D 1; + env->aarch64 =3D true; asm volatile("mrs %0, cntfrq_el0" : "=3Dr"(arm_cpu->gt_cntfrq_hz)); =20 /* Allocate enough space for our sysreg sync */ --=20 2.25.1 From nobody Tue May 7 20:56:36 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650627154; cv=none; d=zohomail.com; s=zohoarc; b=CmNXnxDGZrtcKT9a3GdERFd22/n9SoATJp08A6SFPlE4qPZ17LB6b6+gy7IKNY6m9FP0IxQtBxxylSkWZywCYLTpNk4VKT0W/12BDHnFUE/cCa3CxvYYbWK0iFqC4DRjOh33/V7WxnNqWap64cKlyHJOk+RqrMQs7e+yLREBbnA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650627154; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=3Z1wuSZ1tsgvZXbrivj/X+wswM16HNWMbK2oDsPm2EI=; b=LYJvck2nxBGbp1wty21GzRkEZGFEtf4MnTXpKi+Am8mBCjUP/HbfJeRqGMAkPSPtPCUZNGJj65IAl8pwwF6v8+33C2RuN61wuS4khXoSsomOv4ayeaK3m+Si31yPTnp9bYox5FF0dmHbgQu4+oFMO/gzQ97nxywqs59+h3FTrXM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650627154622892.0737455958431; Fri, 22 Apr 2022 04:32:34 -0700 (PDT) Received: from localhost ([::1]:37750 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhrWb-0003va-Dm for importer2@patchew.org; Fri, 22 Apr 2022 07:32:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59086) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhqAE-0005O4-K5 for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:22 -0400 Received: from mail-wr1-x430.google.com ([2a00:1450:4864:20::430]:44915) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhqAC-0002u6-VB for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:22 -0400 Received: by mail-wr1-x430.google.com with SMTP id b19so10281824wrh.11 for ; Fri, 22 Apr 2022 03:05:20 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.18 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=3Z1wuSZ1tsgvZXbrivj/X+wswM16HNWMbK2oDsPm2EI=; b=FT+dci79aZMw7Pb8vhep+Ve4qSWTbxi2lBKxvvGah2cnVkB4YOaeIvuFmJV0Zel8Vd VW8x5iaHgq+ZI4g79/gxRuXbBI1/PEzezNADad2J9c2Zdud3aPY055iaIPeQpiEpMTqG HBLFJguw94oVAXeKYiUTg0ZmGfwMzbJHxEnOz6/13AfRCAZi6NTa2COxifrn8Fi2YP6t FOv6Bb+LEVg5gQVk4xgw6R38bDTIf3JvMpZ08nbjjXTIQCxXTeqvqyAHsdKs/h+9K7d2 ImRQYWCQWee7kqtLMO/jEhVfVNlbjTIaBw/80/5tFADaJBqo8nGe+GBscgWuHi58hE0q bKdQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=3Z1wuSZ1tsgvZXbrivj/X+wswM16HNWMbK2oDsPm2EI=; b=CUtInTpLD9jt//gmVBANIFqX1T435kONgrrooyf2wB+hvXJffCcqoAE/FSb94o/r8x aVGpsRZKneWVS22qJZ9Y567QnM0A00QsB4Zb9lCwTxfOz+THeo1Du9wv+3lxMiigVVem gQsvtPxyKNqRxNQz6n0Z5Wp3QLgu/EBsE6aBq1PcwLBMEJtZ9mC5JE4+6w/QFq3VJdW5 A0neheBq8oH3Slj1zMhwuUkyB8hVHQJcVV7x5H+TY8ODQUzOWaRe+uG4KqZV8p6rPXgK H1Y6uDheCv/2FzHKOfoLrLUw6FBT//KU4QTS8QWh3Vgiou+L90sf9vLhnzGlbCxjA1Ee 3Ajw== X-Gm-Message-State: AOAM531DdYMvSaCw7un0Wal2lig3exYI5XDoj8BTdRQ1oMv2TDpa9WxJ O7Z+mL8SXjMqE0toto44Bymrss7YflJjrQ== X-Google-Smtp-Source: ABdhPJy72y6xnMHnqPaYSWCGF+r1Wr09rDDUt8O4hDJioxePxSnrqrJMg0nBzhQVKh4EPGY67/xmOw== X-Received: by 2002:a5d:6e87:0:b0:206:452:5b87 with SMTP id k7-20020a5d6e87000000b0020604525b87mr2989003wrz.473.1650621919445; Fri, 22 Apr 2022 03:05:19 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 47/61] target/arm: Extend store_cpu_offset to take field size Date: Fri, 22 Apr 2022 11:04:18 +0100 Message-Id: <20220422100432.2288247-48-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650627155401100001 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Currently we assume all fields are 32-bit. Prepare for fields of a single byte, using sizeof_field(). Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell [PMM: use sizeof_field() instead of raw sizeof()] Signed-off-by: Peter Maydell --- target/arm/translate-a32.h | 13 +++++-------- target/arm/translate.c | 21 ++++++++++++++++++++- 2 files changed, 25 insertions(+), 9 deletions(-) diff --git a/target/arm/translate-a32.h b/target/arm/translate-a32.h index 5be4b9b8346..09010ad2dad 100644 --- a/target/arm/translate-a32.h +++ b/target/arm/translate-a32.h @@ -61,17 +61,14 @@ static inline TCGv_i32 load_cpu_offset(int offset) =20 #define load_cpu_field(name) load_cpu_offset(offsetof(CPUARMState, name)) =20 -static inline void store_cpu_offset(TCGv_i32 var, int offset) -{ - tcg_gen_st_i32(var, cpu_env, offset); - tcg_temp_free_i32(var); -} +void store_cpu_offset(TCGv_i32 var, int offset, int size); =20 -#define store_cpu_field(var, name) \ - store_cpu_offset(var, offsetof(CPUARMState, name)) +#define store_cpu_field(var, name) \ + store_cpu_offset(var, offsetof(CPUARMState, name), \ + sizeof_field(CPUARMState, name)) =20 #define store_cpu_field_constant(val, name) \ - tcg_gen_st_i32(tcg_constant_i32(val), cpu_env, offsetof(CPUARMState, n= ame)) + store_cpu_field(tcg_constant_i32(val), name) =20 /* Create a new temporary and set it to the value of a CPU register. */ static inline TCGv_i32 load_reg(DisasContext *s, int reg) diff --git a/target/arm/translate.c b/target/arm/translate.c index 6018fee2ef1..1314406b193 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -180,6 +180,25 @@ typedef enum ISSInfo { ISSIs16Bit =3D (1 << 8), } ISSInfo; =20 +/* + * Store var into env + offset to a member with size bytes. + * Free var after use. + */ +void store_cpu_offset(TCGv_i32 var, int offset, int size) +{ + switch (size) { + case 1: + tcg_gen_st8_i32(var, cpu_env, offset); + break; + case 4: + tcg_gen_st_i32(var, cpu_env, offset); + break; + default: + g_assert_not_reached(); + } + tcg_temp_free_i32(var); +} + /* Save the syndrome information for a Data Abort */ static void disas_set_da_iss(DisasContext *s, MemOp memop, ISSInfo issinfo) { @@ -4852,7 +4871,7 @@ static void do_coproc_insn(DisasContext *s, int cpnum= , int is64, tcg_temp_free_i32(tmp); } else { TCGv_i32 tmp =3D load_reg(s, rt); - store_cpu_offset(tmp, ri->fieldoffset); + store_cpu_offset(tmp, ri->fieldoffset, 4); } } } --=20 2.25.1 From nobody Tue May 7 20:56:36 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650625946; cv=none; d=zohomail.com; s=zohoarc; b=lHA9U6IkpKsQyZO6q7j3xvkcKjxWgWiUqXK/MZsPLjQJvObXr+G/Y2HhUosyEiUrFy5ycs0LwH4ZnnF+OB2It2v41JGmx/+r5bPXCOq4BVa43KVsGmHqxSeoJs9T75xmxwhUkJDZpNmI/nc7HD8EyPz1aAVgjkZhXxk0VV7qytk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650625946; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=/Wc2molG4qiAr3BjeYuq/HUxjFtE+KVmYa08eBlI6Z4=; b=JsAt6aBrPev4OzGqAFiUT6EKaLNrFfdgBZTbUhUr0FWwgEO6MXiv02YljMYTXPEBBDMD5dK5ZY5uHqnCMWm12pVmvVX7sd0WogEqarcvKkKSzuhlWlQo0BTNejwdTfWmpmvih7LW3W3bGu7xBgu3olQ7PnH9444ChIqESRJFiB8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650625946798429.7507497071517; Fri, 22 Apr 2022 04:12:26 -0700 (PDT) Received: from localhost ([::1]:49660 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhrD7-0004lv-KF for importer2@patchew.org; Fri, 22 Apr 2022 07:12:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59238) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhqAK-0005aL-CD for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:30 -0400 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]:34772) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhqAI-0002wQ-PX for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:28 -0400 Received: by mail-wr1-x42f.google.com with SMTP id c10so10337081wrb.1 for ; Fri, 22 Apr 2022 03:05:26 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.19 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=/Wc2molG4qiAr3BjeYuq/HUxjFtE+KVmYa08eBlI6Z4=; b=b35r+kZOGY1qAIN7AHze5z2zuAAtqsN4RtOBlCxZKZ+H2uH4eG+vjGPBgKjM+rfNTq 49LiT/KH3aCsVNwAm6kCTDyg/uHx11sA321xrFUI9XzjnWqJJqEKGytdEgQceXnbDpny lbAK+cEmhX49roo/sxcWKyMlDONFSFvBFf2bWgU+pt+PpCpYyB3LfQQh1zCposvPyB7V GcNQIJc67aSz+m0rXGdBvuBe6H2NNkB4+AsovEQjU/fFFro8p2ThFkjVz/aCa6676doV XRJByj1rj5Bn5luFy/uvV+iFMIbRKQwhHdlpVhiAiJGiJJDoxjoIVtutJgZ9Ke8RJPmG UJrg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/Wc2molG4qiAr3BjeYuq/HUxjFtE+KVmYa08eBlI6Z4=; b=jIdfxx9PH+cC+IB/n65Hj6G/NLvrtGC6ds58DI75IJao7jhn+RaW+ZeKvEY4f4sHQD ojQCwtzYaS8Rrxu0dUjB70V/t3OTwMz9zT3P/M9HQMqWtqF5z/82jZkLmwHqpMwLbj/S DRSsrz9bYrrISlfxDWrCS1f4UlQ9iXfRir5cSlEZU47fDKZ0BzKWSJ6u2e4+HEKjEd5R 1Iso/Dvo3MfF4ukUOGFpI7fiDjQZRCnSj+uDua1wCj3oXmKYtc6/Gmhsx0dbTehaLfpT 9JUSlaZ5vSYtNGnnFgXTzxk5PXXKUWeNIv6J9sRLA7ylJeoZ1l8MCfUxDhZZ2yw26ewv LOhQ== X-Gm-Message-State: AOAM531JMo9ItgIMh241ZM6pbwVFqaBivQgOcf41/lWXEqV7lDi3ASrY qXo6jFrlNjq9ins+NOhakLV33WY65UbKKg== X-Google-Smtp-Source: ABdhPJwiaKMvMAUa+Rw2dz/Y1DpnTBugJUjEE8jARF8aFpCl9j82AJnCYl11GhM/HI0n/qteSoekxg== X-Received: by 2002:a05:6000:1809:b0:20a:cafc:fd39 with SMTP id m9-20020a056000180900b0020acafcfd39mr1443525wrh.255.1650621920369; Fri, 22 Apr 2022 03:05:20 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 48/61] target/arm: Change DisasContext.thumb to bool Date: Fri, 22 Apr 2022 11:04:19 +0100 Message-Id: <20220422100432.2288247-49-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650625947410100001 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Bool is a more appropriate type for this value. Move the member down in the struct to keep the bool type members together and remove a hole. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/translate.h | 2 +- target/arm/translate-a64.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/target/arm/translate.h b/target/arm/translate.h index 8b7dd1a4c05..050d80f6f90 100644 --- a/target/arm/translate.h +++ b/target/arm/translate.h @@ -30,7 +30,6 @@ typedef struct DisasContext { bool eci_handled; /* TCG op to rewind to if this turns out to be an invalid ECI state */ TCGOp *insn_eci_rewind; - int thumb; int sctlr_b; MemOp be_data; #if !defined(CONFIG_USER_ONLY) @@ -65,6 +64,7 @@ typedef struct DisasContext { GHashTable *cp_regs; uint64_t features; /* CPU features bits */ bool aarch64; + bool thumb; /* Because unallocated encodings generate different exception syndrome * information from traps due to FP being disabled, we can't do a sing= le * "is fp access disabled" check at a high level in the decode tree. diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index f6303848918..1ae465687ad 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -14670,7 +14670,7 @@ static void aarch64_tr_init_disas_context(DisasCont= extBase *dcbase, */ dc->secure_routed_to_el3 =3D arm_feature(env, ARM_FEATURE_EL3) && !arm_el_is_aa64(env, 3); - dc->thumb =3D 0; + dc->thumb =3D false; dc->sctlr_b =3D 0; dc->be_data =3D EX_TBFLAG_ANY(tb_flags, BE_DATA) ? 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.20 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=HIzaTyax7/dChL1AhyXtTDs+LrJvN7HbLgBA7vTKI7g=; b=viCv7oilKeYVF3fhng/AiCWzKd1ICm4GTvOxTq3pEWT7+fBHYUtPcAiwRQzjKOwv1V r/3ihHxwgJ7RPTRh9vpUvie807bFEs8anub7F9HFPry036QQvCIRAyWcPMmKw21uZSka mChaERItIPwMxKpU3n7PLLuOD6eCxw28jeWu/kL3dVVpE4SdcnTB6WI7XbTcrXI9OvFE 9joRl73CbwxBG894jP/wBWC4ghjsmt2+8E8vSxiJq7QdIXndHxd0fQcJ4pI3fBFicgYG A+iXOzttlRdlYo1lUUBtCYKv0Opihak/xdJMsNm9RHAnx/FnJ+XqRD24LyUmek8T3L+m GOZA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=HIzaTyax7/dChL1AhyXtTDs+LrJvN7HbLgBA7vTKI7g=; b=hHFpX54YoYQD8QVup1MJu04kl4zZSLH2IBhvI6CXajU/tCEJklZpzmNZOoMfiXGInx X/qUkSHmwZsXLZXy0tVecKNo6R99AKXVHQQPdZgYdm6aBXPYrqX+O6U7q4yexwTfOwlO yCFiwxI9ExDMqmYFbYMEPNw9jJB/Hp8OjBj4T0fUWm+pDuvVTF5Q5+RDxXSPsxV8Vm60 4RG5DBmc2u4PuCFBLPDugEyUxcjQ8bBT2sLtU4Pj82j1WwgLZPkhKud5UozBEQV1vCup xRARr4KuRz6w0cVb24xCtQ2dAO+2Zo04qf0fisGEoFGl+kKUborX3lDzlA7Nbv9Q7TTg go9g== X-Gm-Message-State: AOAM533+hBitcPrVyHVd99Vfh/64N2514prclRybSOPvqgCrHiK6rof+ /51fH710ADLPfgKzpIJBPbAiC2j/UwSn2g== X-Google-Smtp-Source: ABdhPJzgn9auCYsCxjPfJT8H2ns4IepYOnR7fI6ik3BNMYcYVo79nL2ZKF8h2tEwl0KPJiYpiSu1ww== X-Received: by 2002:adf:c547:0:b0:207:9abc:cfa1 with SMTP id s7-20020adfc547000000b002079abccfa1mr3000657wrf.390.1650621921127; Fri, 22 Apr 2022 03:05:21 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 49/61] target/arm: Change CPUArchState.thumb to bool Date: Fri, 22 Apr 2022 11:04:20 +0100 Message-Id: <20220422100432.2288247-50-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650625181404100001 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Bool is a more appropriate type for this value. Adjust the assignments to use true/false. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/cpu.h | 2 +- linux-user/arm/cpu_loop.c | 2 +- target/arm/cpu.c | 2 +- target/arm/m_helper.c | 6 +++--- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 31e46709277..d2a34f6ea8a 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -260,6 +260,7 @@ typedef struct CPUArchState { */ uint32_t pstate; bool aarch64; /* True if CPU is in aarch64 state; inverse of PSTATE.nR= W */ + bool thumb; /* True if CPU is in thumb mode; cpsr[5] */ =20 /* Cached TBFLAGS state. See below for which bits are included. */ CPUARMTBFlags hflags; @@ -286,7 +287,6 @@ typedef struct CPUArchState { uint32_t ZF; /* Z set if zero. */ uint32_t QF; /* 0 or 1 */ uint32_t GE; /* cpsr[19:16] */ - uint32_t thumb; /* cpsr[5]. 0 =3D arm mode, 1 =3D thumb mode. */ uint32_t condexec_bits; /* IT bits. cpsr[15:10,26:25]. */ uint32_t btype; /* BTI branch type. spsr[11:10]. */ uint64_t daif; /* exception masks, in the bits they are in PSTATE */ diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c index 3268e5f1f1f..d950409d5b0 100644 --- a/linux-user/arm/cpu_loop.c +++ b/linux-user/arm/cpu_loop.c @@ -230,7 +230,7 @@ do_kernel_trap(CPUARMState *env) /* Jump back to the caller. */ addr =3D env->regs[14]; if (addr & 1) { - env->thumb =3D 1; + env->thumb =3D true; addr &=3D ~1; } env->regs[15] =3D addr; diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 7e9f7d146df..e3f82152035 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -51,7 +51,7 @@ static void arm_cpu_set_pc(CPUState *cs, vaddr value) =20 if (is_a64(env)) { env->pc =3D value; - env->thumb =3D 0; + env->thumb =3D false; } else { env->regs[15] =3D value & ~1; env->thumb =3D value & 1; diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c index b7a0fe01141..a740c3e160f 100644 --- a/target/arm/m_helper.c +++ b/target/arm/m_helper.c @@ -564,7 +564,7 @@ void HELPER(v7m_bxns)(CPUARMState *env, uint32_t dest) env->v7m.control[M_REG_S] &=3D ~R_V7M_CONTROL_SFPA_MASK; } switch_v7m_security_state(env, dest & 1); - env->thumb =3D 1; + env->thumb =3D true; env->regs[15] =3D dest & ~1; arm_rebuild_hflags(env); } @@ -590,7 +590,7 @@ void HELPER(v7m_blxns)(CPUARMState *env, uint32_t dest) * except that the low bit doesn't indicate Thumb/not. */ env->regs[14] =3D nextinst; - env->thumb =3D 1; + env->thumb =3D true; env->regs[15] =3D dest & ~1; return; } @@ -626,7 +626,7 @@ void HELPER(v7m_blxns)(CPUARMState *env, uint32_t dest) } env->v7m.control[M_REG_S] &=3D ~R_V7M_CONTROL_SFPA_MASK; switch_v7m_security_state(env, 0); - env->thumb =3D 1; + env->thumb =3D true; env->regs[15] =3D dest; arm_rebuild_hflags(env); } --=20 2.25.1 From nobody Tue May 7 20:56:36 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650627333; cv=none; d=zohomail.com; s=zohoarc; b=CNjeS8BrDtyg/b7CVRld9dn3woVOM07UnI7ivXoZ4SQnLOfW05JNuwekTy4a/J7R0tQFr3XTHY6JXKwJXD8f7FDi+yownd333zzhKUtso0DdjSimNH/eeD4yMcxw62KRXGU3+X1ckfgfKBo/4V0fk8Znm45U5Hsz0XI9era6dZQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650627333; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=NIplvZLPteSaDUAHt7JEfPh2GX+SAGRpajBGdTIzQe0=; b=A5gdE4m4MPG9DRuHmxwzd5wz5Ey7MitOnmJG4UQGWh9Lpemw/fvy2Vj1LDtL9njFJxEgL2lWvEpcoq83b6jQNM7aqLawTnKcBUo2yXq7ldagYiCv2AGDbU8hc+7+kQcm8hUNROwUbQ3CmcY0lVB1IMhRmInrZwjnTkechZz+FrE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650627333321836.0388067416385; Fri, 22 Apr 2022 04:35:33 -0700 (PDT) Received: from localhost ([::1]:46166 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhrZT-0001WO-Na for importer2@patchew.org; Fri, 22 Apr 2022 07:35:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59132) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhqAH-0005Ur-4Z for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:25 -0400 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]:33692) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhqAF-0002uV-9Q for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:24 -0400 Received: by mail-wr1-x42f.google.com with SMTP id x18so10357208wrc.0 for ; Fri, 22 Apr 2022 03:05:22 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.21 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=NIplvZLPteSaDUAHt7JEfPh2GX+SAGRpajBGdTIzQe0=; b=YiCtjKt4lG7is7rRu0fBVsFDOFHFTHeT/Pc2NJj3qRJB4z1+AbDaivf6OzpDiJy4eB tO1rNjoK3h/0RfKdui1IfFlSSJy4YTLzhHeVcQbVxLGMf7OXsjMO74f+JfovUHVpaTRz JQFzBLx6nOMuwjAz8yZ1e11uMvDPerpKQLToScjfNOprfZbDNi+fpVTPYkA03gzc2UAY rtvw6eo1VR5eSopZ79Pe7rJ4mU7N11cetsQJaSwWNlge9GPgHm3lRAYgfy0N7HguenfV jW0QEhVTxIuh+3Zs2gr+mQiiF8bQosRBkPiBy+U2aE3CjzYj5gntfx1h0r6sD6w6RMAn xCOw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=NIplvZLPteSaDUAHt7JEfPh2GX+SAGRpajBGdTIzQe0=; b=OD0g0IEg9mSOdiZIevK6M8OG9LELveXNwj/+2yBvZPs8SB563Jj8gYtk2kBLjOsYKX cQ9ez4i/Ok/s80/kwX+4GPvTOYVkdKyZ8j6ZhES/sMPaYGXJVoei+ERSLfU111KMVUUp 7z1UxAbHUvig5IkvrISFDvmkTQoW/i0WkWotGzNiuPIUtW107WH427pktGbICdCWbOla b5fNL4YNmZi2PkUewRynTsWSdtHk4+EsmDIF49IFrFIEeEqKkAlHIJuCPUJGXH5nuRR5 LMqm4UdRTxUIjE5IXzLj9UXf8+w4sbsPh+eqe0kXPgFeEUIhjCDmxdAHYrW36x7Ol9O5 YZGg== X-Gm-Message-State: AOAM530GqMMTj695EOaWaL+NZsX1EuI5d+zOC1Ew9iqgawvVOvG1k1nP 1P44XSXGc7NaU4i+H1k3P4dtPBiAlnjjew== X-Google-Smtp-Source: ABdhPJwKUOm8MlB/v6k0vnh5FtqMu/a7jMeJrt770U0rfymzPtNMMeqMIM7lJMZcY6rv6cl74UhRLg== X-Received: by 2002:a05:6000:18a8:b0:20a:8a58:1639 with SMTP id b8-20020a05600018a800b0020a8a581639mr3022592wri.483.1650621921950; Fri, 22 Apr 2022 03:05:21 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 50/61] target/arm: Remove fpexc32_access Date: Fri, 22 Apr 2022 11:04:21 +0100 Message-Id: <20220422100432.2288247-51-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650627335072100001 Content-Type: text/plain; charset="utf-8" From: Richard Henderson This function is incorrect in that it does not properly consider CPTR_EL2.FPEN. We've already got another mechanism for raising an FPU access trap: ARM_CP_FPU, so use that instead. Remove CP_ACCESS_TRAP_FP_EL{2,3}, which becomes unused. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/cpu.h | 5 ----- target/arm/helper.c | 17 ++--------------- target/arm/op_helper.c | 13 ------------- 3 files changed, 2 insertions(+), 33 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index d2a34f6ea8a..db8ff044497 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -2807,11 +2807,6 @@ typedef enum CPAccessResult { /* As CP_ACCESS_UNCATEGORIZED, but for traps directly to EL2 or EL3 */ CP_ACCESS_TRAP_UNCATEGORIZED_EL2 =3D 5, CP_ACCESS_TRAP_UNCATEGORIZED_EL3 =3D 6, - /* Access fails and results in an exception syndrome for an FP access, - * trapped directly to EL2 or EL3 - */ - CP_ACCESS_TRAP_FP_EL2 =3D 7, - CP_ACCESS_TRAP_FP_EL3 =3D 8, } CPAccessResult; =20 /* Access functions for coprocessor registers. These cannot fail and diff --git a/target/arm/helper.c b/target/arm/helper.c index f1e91b197e2..63397bbac1d 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -4784,18 +4784,6 @@ static void sctlr_write(CPUARMState *env, const ARMC= PRegInfo *ri, } } =20 -static CPAccessResult fpexc32_access(CPUARMState *env, const ARMCPRegInfo = *ri, - bool isread) -{ - if ((env->cp15.cptr_el[2] & CPTR_TFP) && arm_current_el(env) =3D=3D 2)= { - return CP_ACCESS_TRAP_FP_EL2; - } - if (env->cp15.cptr_el[3] & CPTR_TFP) { - return CP_ACCESS_TRAP_FP_EL3; - } - return CP_ACCESS_OK; -} - static void sdcr_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value) { @@ -5097,9 +5085,8 @@ static const ARMCPRegInfo v8_cp_reginfo[] =3D { .access =3D PL1_RW, .readfn =3D spsel_read, .writefn =3D spsel_write= }, { .name =3D "FPEXC32_EL2", .state =3D ARM_CP_STATE_AA64, .opc0 =3D 3, .opc1 =3D 4, .crn =3D 5, .crm =3D 3, .opc2 =3D 0, - .type =3D ARM_CP_ALIAS, - .fieldoffset =3D offsetof(CPUARMState, vfp.xregs[ARM_VFP_FPEXC]), - .access =3D PL2_RW, .accessfn =3D fpexc32_access }, + .access =3D PL2_RW, .type =3D ARM_CP_ALIAS | ARM_CP_FPU, + .fieldoffset =3D offsetof(CPUARMState, vfp.xregs[ARM_VFP_FPEXC]) }, { .name =3D "DACR32_EL2", .state =3D ARM_CP_STATE_AA64, .opc0 =3D 3, .opc1 =3D 4, .crn =3D 3, .crm =3D 0, .opc2 =3D 0, .access =3D PL2_RW, .resetvalue =3D 0, diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c index 70b42b55fd0..2b87e8808b6 100644 --- a/target/arm/op_helper.c +++ b/target/arm/op_helper.c @@ -691,19 +691,6 @@ void HELPER(access_check_cp_reg)(CPUARMState *env, voi= d *rip, uint32_t syndrome, target_el =3D 3; syndrome =3D syn_uncategorized(); break; - case CP_ACCESS_TRAP_FP_EL2: - target_el =3D 2; - /* Since we are an implementation that takes exceptions on a trapp= ed - * conditional insn only if the insn has passed its condition code - * check, we take the IMPDEF choice to always report CV=3D1 COND= =3D0xe - * (which is also the required value for AArch64 traps). - */ - syndrome =3D syn_fp_access_trap(1, 0xe, false); - break; - case CP_ACCESS_TRAP_FP_EL3: - target_el =3D 3; - syndrome =3D syn_fp_access_trap(1, 0xe, false); - break; default: g_assert_not_reached(); } --=20 2.25.1 From nobody Tue May 7 20:56:36 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650625625; cv=none; d=zohomail.com; s=zohoarc; b=NTP9yIBN9Dp4uVdqGuzY7TKmdpMjXV7IK1oL3bVCPIct7DH6CAwaR6oDGXQYvewyFyP88BnFSyiHB8wK0cDwmbZeT700+8ZFT69DkZVYlRzh1A/mARkQuCs9nNGnUUMpt/JMu/Tbdv2J2tB+O/1Fert6RCv3f5/RhUxaY1JPBKg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650625625; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=XMB2cuJAMepvczrd8k6H1C+FfGlgxfpWHFi4NbZyvtk=; b=TVbbHZQeIUXHpMXRvK0SM1cLt1F569Wmn08z31ki6y2hA9K9xcmHDCzINBcbU8dgBLHz/C0fCg9MYZfqO0+aP8nLdBxnc4Ny5KaIYE2GsBM/naFm8Hl1UQXFZN++/XGc459qazln0IjJiH1nUQRU3zCm0H4ptnbOXUDyks9Fnu0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650625625918869.5854516392179; Fri, 22 Apr 2022 04:07:05 -0700 (PDT) Received: from localhost ([::1]:40894 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhr7w-0005NX-TE for importer2@patchew.org; Fri, 22 Apr 2022 07:07:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59178) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhqAI-0005YM-Da for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:26 -0400 Received: from mail-wm1-x329.google.com ([2a00:1450:4864:20::329]:33756) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhqAG-0002uj-3q for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:26 -0400 Received: by mail-wm1-x329.google.com with SMTP id l3-20020a05600c1d0300b0038ff89c938bso4850292wms.0 for ; Fri, 22 Apr 2022 03:05:23 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.22 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=XMB2cuJAMepvczrd8k6H1C+FfGlgxfpWHFi4NbZyvtk=; b=SQkCOTVEJjf4QvNGEmezwwghpiaLVd2jQyJLtAzF/b/fXGT9oXNTkxqUZcgSsjakEd ZIQ6bonWeTDcTB8X/HswQ+zsnO6p+5f7Z9HuQvPYuZrNy/PLx4EAc3sTb//n1CM7BdSt fSsnepeLtOMlWgC80L1WJh3rDSSNvkP0VPRDroV+e75pkCHpddQejYLEK9l2dzJN3Shs kBc1eksNCBrEvxIW+tUKFF6lDTyaJ26LGwDH47EV/OnHUCRhS4olMCH/DjMv3iezHoQd 4DP9o+A+HkA/9BpmygMRnjRLcPdPRVy/GEhqHOAZnlImdecnZWdypqfjOo/F2tlVMEBr siqQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=XMB2cuJAMepvczrd8k6H1C+FfGlgxfpWHFi4NbZyvtk=; b=3wCkf+Cnu//u+N705ndKbqGXe9kqZVlII/dBHPyjh9VKWBoHwlOa6L2w6YnwiArRYq /F/q367JItIm0ciT4x/gdF8beVygc8xAH0a1fJS/Loprek0eg1HOUuXl6UCOummbbLL1 bvgKvUGxk8jHMPp7WF6QFKIwgRXBlI4LLUDOJ0KBCYiw+N3Hy5Ggt6JJMPVEQ28MA306 AnKEi9IfKttmsCcZCsR8sd32Dx15ycEvVaFSQqolIlkSb5NMRna/mbSz37GEVURRSl7T r4EobnPDD+QVZ/HmaNPrVi0Io+yOCtpN6uYFTRa4QjI4qcdWoK7NTYXMrG6rlCMh0rNR +ALw== X-Gm-Message-State: AOAM5307NlEUG6pflODUi692ED4c7v40LLPkLoepAIp9NA7Go6lO5hV0 QPncsUqkR9INsnYcfSzU8m5uyXpabOsAEw== X-Google-Smtp-Source: ABdhPJw1sJAxC322OOh2R23hzBmylTEtfNOoIKLxzhv51U73tKFHzObTXQnkidxNlNdEQJXQhwQNQw== X-Received: by 2002:a1c:f415:0:b0:37f:ab4d:1df2 with SMTP id z21-20020a1cf415000000b0037fab4d1df2mr12283016wma.75.1650621922848; Fri, 22 Apr 2022 03:05:22 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 51/61] target/arm: Split out set_btype_raw Date: Fri, 22 Apr 2022 11:04:22 +0100 Message-Id: <20220422100432.2288247-52-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650625626438100001 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Common code for reset_btype and set_btype. Use tcg_constant_i32. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/translate-a64.c | 25 ++++++++++++------------- 1 file changed, 12 insertions(+), 13 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 1ae465687ad..13a3527345f 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -128,29 +128,28 @@ static int get_a64_user_mem_index(DisasContext *s) return arm_to_core_mmu_idx(useridx); } =20 -static void reset_btype(DisasContext *s) +static void set_btype_raw(int val) { - if (s->btype !=3D 0) { - TCGv_i32 zero =3D tcg_const_i32(0); - tcg_gen_st_i32(zero, cpu_env, offsetof(CPUARMState, btype)); - tcg_temp_free_i32(zero); - s->btype =3D 0; - } + tcg_gen_st_i32(tcg_constant_i32(val), cpu_env, + offsetof(CPUARMState, btype)); } =20 static void set_btype(DisasContext *s, int val) { - TCGv_i32 tcg_val; - /* BTYPE is a 2-bit field, and 0 should be done with reset_btype. */ tcg_debug_assert(val >=3D 1 && val <=3D 3); - - tcg_val =3D tcg_const_i32(val); - tcg_gen_st_i32(tcg_val, cpu_env, offsetof(CPUARMState, btype)); - tcg_temp_free_i32(tcg_val); + set_btype_raw(val); s->btype =3D -1; } =20 +static void reset_btype(DisasContext *s) +{ + if (s->btype !=3D 0) { + set_btype_raw(0); + s->btype =3D 0; + } +} + void gen_a64_set_pc_im(uint64_t val) { tcg_gen_movi_i64(cpu_pc, val); --=20 2.25.1 From nobody Tue May 7 20:56:36 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650626097; cv=none; d=zohomail.com; s=zohoarc; b=e/1NbN0mfs/cpyIhsbp+/QpkVb7ARFfp341B8iZbqXFc6pBLTz4oFekrj7i17X1+TpGMiAH9Wgobw68SPQEU4ammSa9f3il3hODVxykoVPvwuv/0ooZc2pW8IQSIfZFBYP+MNgXFhYo/yw3otgYG6FdOS0JaYf45K0wUsbxtSg4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650626097; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=eR7NYfDsDp0GzWfno2vjeiAO+oaOfi4kY26EnfhTTNM=; b=I+xMiipsBXWkl/1UiJB0z7ITjGia1WvBOfGrTuJ96xDNKLK2Ipm+2KMqp3K5kxb/rbuL6OzRP4b8iBhe8qQZFzLLg0YK54bxsAJu+EjwRLn4H/HryMv+lqXE1ni/+316KqRnwRX0H+UThFm3hKtGhoXPJ2uUp3y3mOpDIqar+h8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650626097035678.8317011199975; Fri, 22 Apr 2022 04:14:57 -0700 (PDT) Received: from localhost ([::1]:58180 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhrFX-0002Cu-Rx for importer2@patchew.org; Fri, 22 Apr 2022 07:14:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59202) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhqAJ-0005aF-45 for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:30 -0400 Received: from mail-wr1-x432.google.com ([2a00:1450:4864:20::432]:44918) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhqAH-0002ux-5E for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:26 -0400 Received: by mail-wr1-x432.google.com with SMTP id b19so10282073wrh.11 for ; Fri, 22 Apr 2022 03:05:24 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.22 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=eR7NYfDsDp0GzWfno2vjeiAO+oaOfi4kY26EnfhTTNM=; b=qcUYVdtvDpexnRzsdu6RSVZCwmGH9zIscqLuCSbFWZ0+ZAtlBfmHMQpASWQ2AqdGIh qpFSrCXhhfTImz/ISjI4dkq6vnGj10JlLRasnVPpjQ00EZqo7X6scssNeGu3TuHYjyqR 7Zzf/gx24CKBKNlmOCoB6iKu2vbYVNy4O+TYLfvQP8+ZsTH6SMkgYdnZgueBrW1l+rvH H1TGzpxN07/xxvyJ1WyLZh8lDJybOuHRcZlPoPvAQ5S3Qo61gCyDk5AS6p3W3sLOaibY CTPtfXG4p6zdhXfZmVPT0R0xSoj2N7Sn34ooMMZQy8+US6JxVYsRfNPXsPPA3EUnRpw9 TgVQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=eR7NYfDsDp0GzWfno2vjeiAO+oaOfi4kY26EnfhTTNM=; b=Iewx36SJbP3gbm0/yNe6dTX1XH4MmDUpG41fd4AP6dAJoNveotppHkjEWqB3MsjbZG f6R307wAa5GN4+RKW6RK3skUGHgoVAKkU8GHbK9fwyi3blhUKDJsqgsqZxGkUgC/K5sp 0NjFg7hjCCRbQ6xxColNcdVDljOA0dDasOB318FUZTFlf0Oxh77L0yLE0BJEg5V41Pfw Jo0KN5SlNzR9Z4RrPUvNbcoS5A6SRrRDHptcNtX1n9TGOaX/pgIuajM6fynQzwE1VFh2 2MaJ/TUfnaZXXU1x7U5DLMNPVNBqFMOXnyFaJsQ0aR2OOT3VHQvEM1bNLMcRVL7xqaRI oJTg== X-Gm-Message-State: AOAM53107g2txLpbWVhSqmW8mCBAbwDU960ljxaRJINRHVnk02WlpM8E 3Ne/yzzeeY/A2tFrk3eCGPBBNb8sXtKkQQ== X-Google-Smtp-Source: ABdhPJw9FriSHJFeRWPz8UrcdYPSjKSwUdIMs/UpNDHE3wV8/Q5hZ3crd3PJToMkFXiYSbIx59einA== X-Received: by 2002:adf:fb48:0:b0:203:f986:874a with SMTP id c8-20020adffb48000000b00203f986874amr3092370wrs.614.1650621923733; Fri, 22 Apr 2022 03:05:23 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 52/61] target/arm: Split out gen_rebuild_hflags Date: Fri, 22 Apr 2022 11:04:23 +0100 Message-Id: <20220422100432.2288247-53-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650626098331100001 Content-Type: text/plain; charset="utf-8" From: Richard Henderson For aa32, the function has a parameter to use the new el. For aa64, that never happens. Use tcg_constant_i32 while we're at it. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/translate-a64.c | 21 +++++++++----------- target/arm/translate.c | 40 +++++++++++++++++++++++--------------- 2 files changed, 33 insertions(+), 28 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 13a3527345f..adbcd999415 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -341,6 +341,11 @@ static void a64_free_cc(DisasCompare64 *c64) tcg_temp_free_i64(c64->value); } =20 +static void gen_rebuild_hflags(DisasContext *s) +{ + gen_helper_rebuild_hflags_a64(cpu_env, tcg_constant_i32(s->current_el)= ); +} + static void gen_exception_internal(int excp) { TCGv_i32 tcg_excp =3D tcg_const_i32(excp); @@ -1667,9 +1672,7 @@ static void handle_msr_i(DisasContext *s, uint32_t in= sn, } else { clear_pstate_bits(PSTATE_UAO); } - t1 =3D tcg_const_i32(s->current_el); - gen_helper_rebuild_hflags_a64(cpu_env, t1); - tcg_temp_free_i32(t1); + gen_rebuild_hflags(s); break; =20 case 0x04: /* PAN */ @@ -1681,9 +1684,7 @@ static void handle_msr_i(DisasContext *s, uint32_t in= sn, } else { clear_pstate_bits(PSTATE_PAN); } - t1 =3D tcg_const_i32(s->current_el); - gen_helper_rebuild_hflags_a64(cpu_env, t1); - tcg_temp_free_i32(t1); + gen_rebuild_hflags(s); break; =20 case 0x05: /* SPSel */ @@ -1741,9 +1742,7 @@ static void handle_msr_i(DisasContext *s, uint32_t in= sn, } else { clear_pstate_bits(PSTATE_TCO); } - t1 =3D tcg_const_i32(s->current_el); - gen_helper_rebuild_hflags_a64(cpu_env, t1); - tcg_temp_free_i32(t1); + gen_rebuild_hflags(s); /* Many factors, including TCO, go into MTE_ACTIVE. */ s->base.is_jmp =3D DISAS_UPDATE_NOCHAIN; } else if (dc_isar_feature(aa64_mte_insn_reg, s)) { @@ -1990,9 +1989,7 @@ static void handle_sys(DisasContext *s, uint32_t insn= , bool isread, * A write to any coprocessor regiser that ends a TB * must rebuild the hflags for the next TB. */ - TCGv_i32 tcg_el =3D tcg_const_i32(s->current_el); - gen_helper_rebuild_hflags_a64(cpu_env, tcg_el); - tcg_temp_free_i32(tcg_el); + gen_rebuild_hflags(s); /* * We default to ending the TB on a coprocessor register write, * but allow this to be suppressed by the register definition diff --git a/target/arm/translate.c b/target/arm/translate.c index 1314406b193..4d7886fa853 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -351,6 +351,26 @@ void gen_set_cpsr(TCGv_i32 var, uint32_t mask) tcg_temp_free_i32(tmp_mask); } =20 +static void gen_rebuild_hflags(DisasContext *s, bool new_el) +{ + bool m_profile =3D arm_dc_feature(s, ARM_FEATURE_M); + + if (new_el) { + if (m_profile) { + gen_helper_rebuild_hflags_m32_newel(cpu_env); + } else { + gen_helper_rebuild_hflags_a32_newel(cpu_env); + } + } else { + TCGv_i32 tcg_el =3D tcg_constant_i32(s->current_el); + if (m_profile) { + gen_helper_rebuild_hflags_m32(cpu_env, tcg_el); + } else { + gen_helper_rebuild_hflags_a32(cpu_env, tcg_el); + } + } +} + static void gen_exception_internal(int excp) { TCGv_i32 tcg_excp =3D tcg_const_i32(excp); @@ -4885,17 +4905,7 @@ static void do_coproc_insn(DisasContext *s, int cpnu= m, int is64, * A write to any coprocessor register that ends a TB * must rebuild the hflags for the next TB. */ - TCGv_i32 tcg_el =3D tcg_const_i32(s->current_el); - if (arm_dc_feature(s, ARM_FEATURE_M)) { - gen_helper_rebuild_hflags_m32(cpu_env, tcg_el); - } else { - if (ri->type & ARM_CP_NEWEL) { - gen_helper_rebuild_hflags_a32_newel(cpu_env); - } else { - gen_helper_rebuild_hflags_a32(cpu_env, tcg_el); - } - } - tcg_temp_free_i32(tcg_el); + gen_rebuild_hflags(s, ri->type & ARM_CP_NEWEL); /* * We default to ending the TB on a coprocessor register write, * but allow this to be suppressed by the register definition @@ -6445,7 +6455,7 @@ static bool trans_MSR_v7m(DisasContext *s, arg_MSR_v7= m *a) tcg_temp_free_i32(addr); tcg_temp_free_i32(reg); /* If we wrote to CONTROL, the EL might have changed */ - gen_helper_rebuild_hflags_m32_newel(cpu_env); + gen_rebuild_hflags(s, true); gen_lookup_tb(s); return true; } @@ -8897,7 +8907,7 @@ static bool trans_CPS(DisasContext *s, arg_CPS *a) =20 static bool trans_CPS_v7m(DisasContext *s, arg_CPS_v7m *a) { - TCGv_i32 tmp, addr, el; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.23 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=7SQzC5lAEqp5CMAsa+8Njn6FSg2/QmhMegZg1nRW8BE=; b=r/2Fc9tM+dO9ptE5xAcfNqAZqG/+s2l3NcMwagHwZncxYBdZ+2ZJNVAOoe0/ZGVcbu Q2DrefOWE4mrFcDBFEVw0Py9oZhajDjiIIDTkcshOxPvupV/NKAWS7Po8++vbHebMCsR Q1FC8Ybxo62JaMXdoyB5auLBzlFlFKze3LfgTbUpKMjX0B1ysTjx5MCJG87jOsmx2djY OhbEmD9OouzdNc9u1bV5LybEcfhcw4w9j/3WAp4jSg769cC6Tu/WmVOVWiZQxwfM3eMH QHALCprCrDrOecdp2qYmdi55cmctDnhCVlke7AiU/hb1SLswOik5kx6rWIF+30KzdlVG QBDQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7SQzC5lAEqp5CMAsa+8Njn6FSg2/QmhMegZg1nRW8BE=; b=sSBJgZsmI3qQ6i0GgjF8jJk6Wd5eRyNTxz+dpCU9Jb60sXkNcMElTj9wGTxM/fxiIo vGaH1AOODnrcoOF7iAlhj+wvHETEIHiwC1+/6IoiCCY/Qi4J8R72ce//U+df3sM1Otea d9ygdgCuykCUDes4YwGQZ5bXRZ4opM7LWEhYLPEhjIsfNiLNVln5NE+FYKzdLUclSXwe rMVchohRb617UDLh8zdYFNshPNi5wsCDcLl333khU7y5N8U6v4gxoio0ctCIVj4gVadb WWMQ/B4i+OOYCRhD/L/aX5QBDLcwt8R7fc4ezMxqRw7Yz//D67CuEkgmFYmDy6AyEgoh BReg== X-Gm-Message-State: AOAM531aYxWXYq1/Pb9K2fYhrxjUhAHe9xRlyE5tamhvlgBMHy/p0fZ9 i5+JBLiiNUkaHnv6LsDCqmVyb2iZFrnuig== X-Google-Smtp-Source: ABdhPJx4vJu/g6zhzh/WsCQBks94d/hCoSxt/knmM+bNlOmL9ZkM1PxVKaXlDqn/g0Ejvg2bnbKjuw== X-Received: by 2002:a05:6000:1a87:b0:20a:7ea5:2aef with SMTP id f7-20020a0560001a8700b0020a7ea52aefmr3037461wry.666.1650621924610; Fri, 22 Apr 2022 03:05:24 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 53/61] target/arm: Simplify GEN_SHIFT in translate.c Date: Fri, 22 Apr 2022 11:04:24 +0100 Message-Id: <20220422100432.2288247-54-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650625455262100001 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Instead of computing tmp1 =3D shift & 0xff; dest =3D (tmp1 > 0x1f ? 0 : value) << (tmp1 & 0x1f) use tmpd =3D value << (shift & 0x1f); dest =3D shift & 0xe0 ? 0 : tmpd; which has a flatter dependency tree. Use tcg_constant_i32 while we're at it. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/translate.c | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-) diff --git a/target/arm/translate.c b/target/arm/translate.c index 4d7886fa853..0c9d50d48df 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -552,16 +552,14 @@ static void gen_sbc_CC(TCGv_i32 dest, TCGv_i32 t0, TC= Gv_i32 t1) #define GEN_SHIFT(name) \ static void gen_##name(TCGv_i32 dest, TCGv_i32 t0, TCGv_i32 t1) \ { \ - TCGv_i32 tmp1, tmp2, tmp3; \ - tmp1 =3D tcg_temp_new_i32(); \ - tcg_gen_andi_i32(tmp1, t1, 0xff); \ - tmp2 =3D tcg_const_i32(0); \ - tmp3 =3D tcg_const_i32(0x1f); \ - tcg_gen_movcond_i32(TCG_COND_GTU, tmp2, tmp1, tmp3, tmp2, t0); \ - tcg_temp_free_i32(tmp3); \ - tcg_gen_andi_i32(tmp1, tmp1, 0x1f); \ - tcg_gen_##name##_i32(dest, tmp2, tmp1); \ - tcg_temp_free_i32(tmp2); \ + TCGv_i32 tmpd =3D tcg_temp_new_i32(); \ + TCGv_i32 tmp1 =3D tcg_temp_new_i32(); \ + TCGv_i32 zero =3D tcg_constant_i32(0); \ + tcg_gen_andi_i32(tmp1, t1, 0x1f); \ + tcg_gen_##name##_i32(tmpd, t0, tmp1); \ + tcg_gen_andi_i32(tmp1, t1, 0xe0); \ + tcg_gen_movcond_i32(TCG_COND_NE, dest, tmp1, zero, zero, tmpd); \ + tcg_temp_free_i32(tmpd); \ tcg_temp_free_i32(tmp1); \ } GEN_SHIFT(shl) --=20 2.25.1 From nobody Tue May 7 20:56:36 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650625866; cv=none; d=zohomail.com; s=zohoarc; b=eY1mMi92N+mm5xfS8y04+YVp2WaujzwPd5QpHsosmjsJCkB20qhQUwSqWNk4/Ik/0P8FpMGUivCMevxexSDrUbcchLs6Du/DMaGBm6ZFTCYiUTjjLdjeqXdZUyDF3zLKlRN00kqQEjV9U7lmMGCUwvBko89GFDXwxW9awyerw9Q= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650625866; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=1C1mIsbiB+RmAWojouCaP2qiHomdsW424z2/fuwD7jI=; b=k6DsxWboYqfwNbEhZoBHXVT9fgxLiLeoeUM0N5o3YYmqqPPpQ79O1jTqBwXKzFPf6k4Ez9xpvY1HHTKPhZKnz2vmMzmNncbXlKmyZMYjH+HnI8NEyY6VzvOfOiiW256a73zi7dd87xHF+VJIiIqkBal+ZJLCCq3XngG0vUHCp2E= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650625866035745.3861060749331; Fri, 22 Apr 2022 04:11:06 -0700 (PDT) Received: from localhost ([::1]:45556 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhrBo-0000z2-Sm for importer2@patchew.org; Fri, 22 Apr 2022 07:11:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59240) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhqAK-0005aM-Fu for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:30 -0400 Received: from mail-wm1-x331.google.com ([2a00:1450:4864:20::331]:34693) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhqAI-0002wU-TZ for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:28 -0400 Received: by mail-wm1-x331.google.com with SMTP id ay36-20020a05600c1e2400b0038ebc885115so4692467wmb.1 for ; Fri, 22 Apr 2022 03:05:26 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.24 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=1C1mIsbiB+RmAWojouCaP2qiHomdsW424z2/fuwD7jI=; b=WLndpUSY3PrjvdvGp2hz0Uu4lK9/Z28LDPmYshVRNoPFu9vagmNiCcxFjEZn2I1CqX e2qBVps8euCbVt3TF3vMktFW6hyzs2vkdNTxuQ9s4eRc6RBUSWA46ylTB8AuSZcTq0GC 4Hjl+pCdQDpSQ9hFLmjFIQHZ7rA+KzPdBptJU+cW+Uj8YGi0im8tpTBs4w1ad7vr5zj8 3Roh/yLQ34cN78NRliji3XRAIqchgT1LAodo5OOGyU1H4yjfUve/Om+P3jJ6xMysPs8M ikRKV30TQ2dy7ZJc5mXG7e/eb2dM5jlgS+5ufQ9S0/t9vLqeTniD1pkpOnrGmxlUizds zNVw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1C1mIsbiB+RmAWojouCaP2qiHomdsW424z2/fuwD7jI=; b=rY1pEZS6F8chwQVnOOsZhaJOTfoBIp6WeDinU28BbEzS1eorMj7TkxFcqhajbqNnDe YflCpYsVqdlGk4j/BaAUnVLLHdx2HuoJnQMRDnjtcJK3qK28F14GhcVxxYNOhoooeaCo bfeK/H+gZriuhDDImsL+a5PpJVjjLgio6P1TZyasEzLKZBUTp1EBAgqr9lcw6iWA02sm l5ZI2LfbQiQrqyzsdOL/RK/j3Opr+HRZRU5mg4XZB/2I0EcruUCaED6LkRfcejKyA7F6 aWyE9GCXvguAVZTOIOHQsiWOn8Ap6P2FomEDEzbJnzkCpQvrDBW6oxX9EYW9YRrdL28/ z9aA== X-Gm-Message-State: AOAM53246y31Q7iLNtOLQI6KaXRPLwT9+azw0dI4UuOa01B2WQ9xXDPT l28oh9hnFQkky+hn5Re7NZwSS/szKsxKXg== X-Google-Smtp-Source: ABdhPJzBhd0Ezv6n5q18XIZoFH9R+StSUvmEWXLWEoEJMDC0IjtBXYVHy1lfDjPszHU2h3zaSgTbqQ== X-Received: by 2002:a1c:c912:0:b0:37b:e074:dfcb with SMTP id f18-20020a1cc912000000b0037be074dfcbmr12363110wmb.161.1650621925491; Fri, 22 Apr 2022 03:05:25 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 54/61] target/arm: Simplify gen_sar Date: Fri, 22 Apr 2022 11:04:25 +0100 Message-Id: <20220422100432.2288247-55-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650625867023100001 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Use tcg_gen_umin_i32 instead of tcg_gen_movcond_i32. Use tcg_constant_i32 while we're at it. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/translate.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/target/arm/translate.c b/target/arm/translate.c index 0c9d50d48df..086dc0d3b15 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -568,12 +568,10 @@ GEN_SHIFT(shr) =20 static void gen_sar(TCGv_i32 dest, TCGv_i32 t0, TCGv_i32 t1) { - TCGv_i32 tmp1, tmp2; - tmp1 =3D tcg_temp_new_i32(); + TCGv_i32 tmp1 =3D tcg_temp_new_i32(); + tcg_gen_andi_i32(tmp1, t1, 0xff); - tmp2 =3D tcg_const_i32(0x1f); - tcg_gen_movcond_i32(TCG_COND_GTU, tmp1, tmp1, tmp2, tmp2, tmp1); - tcg_temp_free_i32(tmp2); + tcg_gen_umin_i32(tmp1, tmp1, tcg_constant_i32(31)); tcg_gen_sar_i32(dest, t0, tmp1); tcg_temp_free_i32(tmp1); } --=20 2.25.1 From nobody Tue May 7 20:56:36 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650625999; cv=none; d=zohomail.com; s=zohoarc; b=TRKwBkhzOHEbcbcmFrT7uusKTx+FbbP68imNNCVjj5PFxxQ6m1Fi+e6ybJaWSqjAls6qdxsX/QpUgO/8LJYLbscEDmDbWHtEJYoWZTzxySh5A4Lx2mcnxttlIwwfyF3xGLV+gQaIegxAlSDYmhBSTZCDwhypHlUeq1s6Y5gQbus= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650625999; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Qx1JjAG3lYRZ0uJz1kolQCY/eQ8GjTyEi5vBbytSLK0=; b=i9PKK9zHFCTUf4NTeGupyP+H/rIuI7jjX3iBlFOVTZmi5yPmjQ5rnXuKs29SoM1/XNUI4Ycu7JwaunbY3+5AUEfteEGPNiC3bY1qk7Vb23xEAe5NZxwlUiGNouiMM9AvLbXrow3LR+OiAyBVmvxU8/kpV0xxO7518Ha4zia64IE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650625999588786.8818238154032; Fri, 22 Apr 2022 04:13:19 -0700 (PDT) Received: from localhost ([::1]:54186 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhrDy-0007tw-JS for importer2@patchew.org; Fri, 22 Apr 2022 07:13:18 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59260) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhqAL-0005aO-AJ for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:30 -0400 Received: from mail-wr1-x42b.google.com ([2a00:1450:4864:20::42b]:38725) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhqAJ-0002wm-NO for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:28 -0400 Received: by mail-wr1-x42b.google.com with SMTP id q7so2682417wrm.5 for ; Fri, 22 Apr 2022 03:05:27 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.25 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=Qx1JjAG3lYRZ0uJz1kolQCY/eQ8GjTyEi5vBbytSLK0=; b=iP9ToNzIPeJFtMRcC9Y5TYJ0M08wbS+1GNabsx2ZWrteJ0gwbkYp6VkbPjVjCmcA2N m8QGTMU2CEh7my8VRMKWPd2/geokc69dnMwXRfqHamWMsBHM8VQz48k8PoTjhUKvLJGf OvUmKUuUcN9VJuzdTCgmdDN0a15sRFtt64jYU5qYNIKhg4dfBn0HUf2LRxSsMcfqTcXc JCnizLGCKu3+Fpf5Y9i3YCcBRykaX87Ld4xu20zZRZ83m07ZhKBm80f5F6KmPEvqeQe6 hgZ6z7MdApdBJRBPZHfIcnkh6fIn3z2h3ETgNVLwKPMZDaTD3um/LqUKOSsQd+6SpVJz z3fA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Qx1JjAG3lYRZ0uJz1kolQCY/eQ8GjTyEi5vBbytSLK0=; b=KJ1dnNG2zaw9ResRBTnu72Uf8ToT+nBHO48KSOL/3VkCujicypxMmS/iv93c6Sf9PV jPQ/k+s0837kMdMMPWAnDqWpXXjZHNqkcBtI01iYS6CzBkEW1MmGEcO6+X1E797GfmQk JsX1amq6B/p0UV8/claofMfxnL59URK0BAbvzsTRIq8RcqpYMS+gOK5M4euuFjanKyrK 1ply+mfGWZA8QlsMRtS9wRHGPq1FuzvWJmu++FeDy5vblQRC6gO2q53JV3d4Xjg2h+ff mQP/gCJyh6b+pOUMlPqnkID04At0nlcbw2HjmkBEURFlnNYTJ2xSHct85NfoKjCCjW// 2qJg== X-Gm-Message-State: AOAM532nhgg7WfBXz7zD3ASWgN5aKv3mxIm23OoxIOzIx4ZAkPKhh5fI yicfPPyKOnPRzZdewSxnBDrbYodQVphfiA== X-Google-Smtp-Source: ABdhPJxSQhQcTsyIBLjETj5a4PawTp/p6sFOqkOneAJd+j/X3kGTnJR8ScRRlCTe376WY7QFY7uwNA== X-Received: by 2002:adf:ed8f:0:b0:207:ac33:801f with SMTP id c15-20020adfed8f000000b00207ac33801fmr2981950wro.453.1650621926405; Fri, 22 Apr 2022 03:05:26 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 55/61] target/arm: Simplify aa32 DISAS_WFI Date: Fri, 22 Apr 2022 11:04:26 +0100 Message-Id: <20220422100432.2288247-56-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650626001785100001 Content-Type: text/plain; charset="utf-8" From: Richard Henderson The length of the previous insn may be computed from the difference of start and end addresses. Use tcg_constant_i32 while we're at it. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/translate.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/target/arm/translate.c b/target/arm/translate.c index 086dc0d3b15..d09692c125b 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -9870,18 +9870,14 @@ static void arm_tr_tb_stop(DisasContextBase *dcbase= , CPUState *cpu) /* nothing more to generate */ break; case DISAS_WFI: - { - TCGv_i32 tmp =3D tcg_const_i32((dc->thumb && - !(dc->insn & (1U << 31))) ? 2 : = 4); - - gen_helper_wfi(cpu_env, tmp); - tcg_temp_free_i32(tmp); - /* The helper doesn't necessarily throw an exception, but we + gen_helper_wfi(cpu_env, + tcg_constant_i32(dc->base.pc_next - dc->pc_curr= )); + /* + * The helper doesn't necessarily throw an exception, but we * must go back to the main loop to check for interrupts anywa= y. */ tcg_gen_exit_tb(NULL, 0); break; - } case DISAS_WFE: gen_helper_wfe(cpu_env); break; --=20 2.25.1 From nobody Tue May 7 20:56:36 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650626325; cv=none; d=zohomail.com; s=zohoarc; b=WVBu9x6875fTvaAKWbTm1XnftZlenrFx6S8AOJTRmGhptG9FLlvmZNND3yPn3FGy6Mqx4XSfW6AN4D9XPHb+U65h+q/o1eW5gnpomwueh7tUBvrX41XNA41HFsWG+5ZFInODCObu3MSf94iBVz+llmxXjDeYXekB1jwzBxAiodo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650626325; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=h5cbU++jOseQZg+uHAX8kICA8i+7LryH4hXcFQtNTbo=; b=YNjeTtmqFc6wBxto2RYHwFZiYIV+nulEwQISpR7PGtH01Xnu7fZ7H6yW3xzzTYOlXtERYcp3JGw1RjQdYcLllgBBlKtJ+MfasEIEa/jgKGT70+GfhIGat2gIaHk4xq5rjFrKE0yHP/Z+59OpROYtKnK46GY+zFTCr5gmKMIThWs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650626325321170.3875550017042; Fri, 22 Apr 2022 04:18:45 -0700 (PDT) Received: from localhost ([::1]:38680 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhrJE-0008NW-9A for importer2@patchew.org; Fri, 22 Apr 2022 07:18:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59300) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhqAN-0005cB-6R for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:32 -0400 Received: from mail-wr1-x42a.google.com ([2a00:1450:4864:20::42a]:40517) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhqAL-0002x4-1b for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:30 -0400 Received: by mail-wr1-x42a.google.com with SMTP id e2so4044207wrh.7 for ; Fri, 22 Apr 2022 03:05:28 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.26 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=h5cbU++jOseQZg+uHAX8kICA8i+7LryH4hXcFQtNTbo=; b=TBRGzsiFrgB293Bb0K7JvRw/MbMBJ1QIpq2AgAdaLa17cJhVTbMH4Z5LelkUMMOxcr CEGXsB7TWyqRbZVgXY1XppE7AqyzMrY1RlpJryzugggy2j5qzYSdPduWI67jBgqzg02j Nr1MqZDLzg2FL9ljJ0/FAmTJmOCMOlOPP72B3B7tcQLtct7ACiq7TeJpkdfS5iruNOIO wYGuUccromIgEXX1EPYq/4Y7yAXh3HBiHPMiO/pv8qRdtSLLn+EI9+3J4AkNPQ49VPQo G8dwbcTdza6anrt4kI5t9N8gLFNWi1SSEhQLNZIy2Wjo9MIkU7k+zhNmonMrAqe7Kf4T 5uOA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=h5cbU++jOseQZg+uHAX8kICA8i+7LryH4hXcFQtNTbo=; b=cc2vF+SpyqimcAsyoFSrk3fye/Hy8BzWTdWvDW+k6yy0OelBKcXhDJ2M296d7YRb3p BaKhF7HYvjK5BZRoW3d+I9QC9vnEkHjaXcr5iclXYVLKMnX4hqrRNKvGS2dfEgpAwVg5 +ddaXQ1j2ghhEXXysjJirZxHsaH5kJa68tsem3ZzrkJlHtv/8AB9JLdoTFGyZt8x39mM 1JwzmLvq7kCwa6m56YceRaZNJYq8j0MwZm+fQyHSXSobJM3+YJVYGsILfDMpUivvwwlm dMlkTXl6BJdZSeJmuqjQbVTxupyDSLMi4o7Qhm13o3yt498pXMdNVcyWXS9r4vK0TEs9 BdoA== X-Gm-Message-State: AOAM532RjMMQ/Bg3NDdSRXWiD8qn85ea8cxEKUUmtz27Wune0udd6tuF JKBV5QiHPlKO05fIG2DQbilVS59FxMwNOg== X-Google-Smtp-Source: ABdhPJzLgQIiTxBl5yMFO7rYnxDzwo+Mido7EE9Ruq+di7eTeoD8ckZWafLv8iwDYpRxH9gl4xkZAQ== X-Received: by 2002:adf:d1ce:0:b0:20a:992a:3b54 with SMTP id b14-20020adfd1ce000000b0020a992a3b54mr3007286wrd.270.1650621927254; Fri, 22 Apr 2022 03:05:27 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 56/61] target/arm: Use tcg_constant in translate-m-nocp.c Date: Fri, 22 Apr 2022 11:04:27 +0100 Message-Id: <20220422100432.2288247-57-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650626326178100001 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Use tcg_constant_{i32,i64} as appropriate throughout. This fixes a bug in trans_VSCCLRM() where we were leaking a TCGv. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/translate-m-nocp.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/target/arm/translate-m-nocp.c b/target/arm/translate-m-nocp.c index d9e144e8eb3..27363a7b4ec 100644 --- a/target/arm/translate-m-nocp.c +++ b/target/arm/translate-m-nocp.c @@ -173,7 +173,7 @@ static bool trans_VSCCLRM(DisasContext *s, arg_VSCCLRM = *a) } =20 /* Zero the Sregs from btmreg to topreg inclusive. */ - zero =3D tcg_const_i64(0); + zero =3D tcg_constant_i64(0); if (btmreg & 1) { write_neon_element64(zero, btmreg >> 1, 1, MO_32); btmreg++; @@ -187,8 +187,7 @@ static bool trans_VSCCLRM(DisasContext *s, arg_VSCCLRM = *a) } assert(btmreg =3D=3D topreg + 1); if (dc_isar_feature(aa32_mve, s)) { - TCGv_i32 z32 =3D tcg_const_i32(0); - store_cpu_field(z32, v7m.vpr); + store_cpu_field(tcg_constant_i32(0), v7m.vpr); } =20 clear_eci_state(s); @@ -512,7 +511,7 @@ static bool gen_M_fp_sysreg_read(DisasContext *s, int r= egno, } case ARM_VFP_FPCXT_NS: { - TCGv_i32 control, sfpa, fpscr, fpdscr, zero; + TCGv_i32 control, sfpa, fpscr, fpdscr; TCGLabel *lab_active =3D gen_new_label(); =20 lookup_tb =3D true; @@ -552,10 +551,9 @@ static bool gen_M_fp_sysreg_read(DisasContext *s, int = regno, storefn(s, opaque, tmp, true); /* If SFPA is zero then set FPSCR from FPDSCR_NS */ fpdscr =3D load_cpu_field(v7m.fpdscr[M_REG_NS]); - zero =3D tcg_const_i32(0); - tcg_gen_movcond_i32(TCG_COND_EQ, fpscr, sfpa, zero, fpdscr, fpscr); + tcg_gen_movcond_i32(TCG_COND_EQ, fpscr, sfpa, tcg_constant_i32(0), + fpdscr, fpscr); gen_helper_vfp_set_fpscr(cpu_env, fpscr); - tcg_temp_free_i32(zero); tcg_temp_free_i32(sfpa); tcg_temp_free_i32(fpdscr); tcg_temp_free_i32(fpscr); --=20 2.25.1 From nobody Tue May 7 20:56:36 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650627703; cv=none; d=zohomail.com; s=zohoarc; b=fCh80JHzW9FKfMgf9mh5VcnW7RyabzZoQb+IO1vyyfJiUc22ZTJQOVxfCxLGymO+mQiEMYO8XIkO/CTCBIvTQOWcaXVXizp8vzoaJ7ds3Z9MXvyaGcq9DbtTYqjoJKa9VZVh0wRmy3yDEjwDw66+FNKey2pKau7d3cZL+jGquc4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650627703; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=yoqGxrEuo7I20WDwXqzVyfNrC/olOohOaVj3LWj1G34=; b=inVTGrNiDDbRUJG5Jr1HhRjbzGtGH3mjmS/QiTIWv4ZltHXh2HA0KewhX0rlp/o0p2Nw4iKu4wFSnov/gbOz1DT1JUdGyKwKJf2RmeTehefBUIsXauC1fug8xHoym3Fu7fFpgT3n1tB7KuqhMB5D+uauYWQgJTETFFSOr4mU1B4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650627703481932.037134024142; Fri, 22 Apr 2022 04:41:43 -0700 (PDT) Received: from localhost ([::1]:54612 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhrfR-0008Lp-Fj for importer2@patchew.org; Fri, 22 Apr 2022 07:41:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59326) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhqAO-0005cG-77 for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:33 -0400 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]:38899) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhqAL-0002xY-Pq for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:31 -0400 Received: by mail-wm1-x330.google.com with SMTP id r187-20020a1c44c4000000b0038ccb70e239so7619145wma.3 for ; Fri, 22 Apr 2022 03:05:29 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.27 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=yoqGxrEuo7I20WDwXqzVyfNrC/olOohOaVj3LWj1G34=; b=s60jTgZao/qCB51Yz2M8VR4RCNei7e0duKPv7WMidFV3SDwLadDY8myMpxz9X7SnnQ tvh3ok12Psm88zMqlHXaCdWZA6sSXJsaaceA5U1LTDcKG2xW7ztcTTEPTChBt6JXH4Ow 75tGDBXwnVPxG5iTnCknP9ioJw1mOZ3TTeC7FNDUKuXwxtzIezFRA3OdmkR0mXMYx8I8 VaWWb5BDUTTWNjEL+KQTCcpZ/U/Oba5qlSa1exq3/IrSWk4QxoGUtI6QYI7XwRIJFeEX cDmi0Fqb8A2gykJ0ET7JJKxGqvlFXtVr2UbDIg7dh+5vUvpUydmBHhNLX8VsIES3GzL3 0ctw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yoqGxrEuo7I20WDwXqzVyfNrC/olOohOaVj3LWj1G34=; b=aJiQ2ickB66TEM+DUxjZAnB2F2s8VNYr1Cgws9l6E3NZRdta7x9+swoy1ODvIggFLk tgN/hFoR39/njP1aJx9Bw/uJEohu3NqlTCipBpIiQHF7yw3EiETwYZNA3PyGKBuwWiUK HXhajx9P/+967vrhmQ1GUJhqBzOaB7uOa+BEbcLein3NgFzAafNKvVxq7Q48q/g79vzp EcOVlAbHn4lR+fRmrs+b6T6uMyHiCoRXEyX+Ry+rzeTrw72A8dgJIWEK0+t7tMbEbw51 gTgp4qmqgkDjnVxsOVmSlwljLl7E15NMbtXapqCHBXCVbC9RZOosHiJ84ZlICf3dl/WB H7/g== X-Gm-Message-State: AOAM530fTGSILUbnIvQe4t1dnUqYppzCe/eLk2d/2iqvS5CIsaFKxk0P 30c+CnQiEDCS2y00dhpPCyv+dSL6oZjUoA== X-Google-Smtp-Source: ABdhPJzApJmfyPS6Lp2iBWODiXdC7doeA2cWJpsiSITbBDuvZ2aunyDAZJ6/E56DBCPQiBNQbXf07Q== X-Received: by 2002:a05:600c:1d9d:b0:38e:c8e0:209f with SMTP id p29-20020a05600c1d9d00b0038ec8e0209fmr3504808wms.43.1650621928123; Fri, 22 Apr 2022 03:05:28 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 57/61] target/arm: Use tcg_constant in translate-neon.c Date: Fri, 22 Apr 2022 11:04:28 +0100 Message-Id: <20220422100432.2288247-58-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650627704189100001 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Use tcg_constant_{i32,i64} as appropriate throughout. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/translate-neon.c | 21 +++++++-------------- 1 file changed, 7 insertions(+), 14 deletions(-) diff --git a/target/arm/translate-neon.c b/target/arm/translate-neon.c index 384604c0095..2e4d1ec87d9 100644 --- a/target/arm/translate-neon.c +++ b/target/arm/translate-neon.c @@ -447,7 +447,7 @@ static bool trans_VLDST_multiple(DisasContext *s, arg_V= LDST_multiple *a) int mmu_idx =3D get_mem_index(s); int size =3D a->size; TCGv_i64 tmp64; - TCGv_i32 addr, tmp; + TCGv_i32 addr; =20 if (!arm_dc_feature(s, ARM_FEATURE_NEON)) { return false; @@ -513,7 +513,6 @@ static bool trans_VLDST_multiple(DisasContext *s, arg_V= LDST_multiple *a) =20 tmp64 =3D tcg_temp_new_i64(); addr =3D tcg_temp_new_i32(); - tmp =3D tcg_const_i32(1 << size); load_reg_var(s, addr, a->rn); =20 mop =3D endian | size | align; @@ -530,7 +529,7 @@ static bool trans_VLDST_multiple(DisasContext *s, arg_V= LDST_multiple *a) neon_load_element64(tmp64, tt, n, size); gen_aa32_st_internal_i64(s, tmp64, addr, mmu_idx, mop); } - tcg_gen_add_i32(addr, addr, tmp); + tcg_gen_addi_i32(addr, addr, 1 << size); =20 /* Subsequent memory operations inherit alignment */ mop &=3D ~MO_AMASK; @@ -538,7 +537,6 @@ static bool trans_VLDST_multiple(DisasContext *s, arg_V= LDST_multiple *a) } } tcg_temp_free_i32(addr); - tcg_temp_free_i32(tmp); tcg_temp_free_i64(tmp64); =20 gen_neon_ldst_base_update(s, a->rm, a->rn, nregs * interleave * 8); @@ -1348,7 +1346,7 @@ static bool do_2shift_env_64(DisasContext *s, arg_2re= g_shift *a, * To avoid excessive duplication of ops we implement shift * by immediate using the variable shift operations. */ - constimm =3D tcg_const_i64(dup_const(a->size, a->shift)); + constimm =3D tcg_constant_i64(dup_const(a->size, a->shift)); =20 for (pass =3D 0; pass < a->q + 1; pass++) { TCGv_i64 tmp =3D tcg_temp_new_i64(); @@ -1358,7 +1356,6 @@ static bool do_2shift_env_64(DisasContext *s, arg_2re= g_shift *a, write_neon_element64(tmp, a->vd, pass, MO_64); tcg_temp_free_i64(tmp); } - tcg_temp_free_i64(constimm); return true; } =20 @@ -1394,7 +1391,7 @@ static bool do_2shift_env_32(DisasContext *s, arg_2re= g_shift *a, * To avoid excessive duplication of ops we implement shift * by immediate using the variable shift operations. */ - constimm =3D tcg_const_i32(dup_const(a->size, a->shift)); + constimm =3D tcg_constant_i32(dup_const(a->size, a->shift)); tmp =3D tcg_temp_new_i32(); =20 for (pass =3D 0; pass < (a->q ? 4 : 2); pass++) { @@ -1403,7 +1400,6 @@ static bool do_2shift_env_32(DisasContext *s, arg_2re= g_shift *a, write_neon_element32(tmp, a->vd, pass, MO_32); } tcg_temp_free_i32(tmp); - tcg_temp_free_i32(constimm); return true; } =20 @@ -1457,7 +1453,7 @@ static bool do_2shift_narrow_64(DisasContext *s, arg_= 2reg_shift *a, * This is always a right shift, and the shiftfn is always a * left-shift helper, which thus needs the negated shift count. */ - constimm =3D tcg_const_i64(-a->shift); + constimm =3D tcg_constant_i64(-a->shift); rm1 =3D tcg_temp_new_i64(); rm2 =3D tcg_temp_new_i64(); rd =3D tcg_temp_new_i32(); @@ -1477,7 +1473,6 @@ static bool do_2shift_narrow_64(DisasContext *s, arg_= 2reg_shift *a, tcg_temp_free_i32(rd); tcg_temp_free_i64(rm1); tcg_temp_free_i64(rm2); - tcg_temp_free_i64(constimm); =20 return true; } @@ -1521,7 +1516,7 @@ static bool do_2shift_narrow_32(DisasContext *s, arg_= 2reg_shift *a, /* size =3D=3D 2 */ imm =3D -a->shift; } - constimm =3D tcg_const_i32(imm); + constimm =3D tcg_constant_i32(imm); =20 /* Load all inputs first to avoid potential overwrite */ rm1 =3D tcg_temp_new_i32(); @@ -1546,7 +1541,6 @@ static bool do_2shift_narrow_32(DisasContext *s, arg_= 2reg_shift *a, =20 shiftfn(rm3, rm3, constimm); shiftfn(rm4, rm4, constimm); - tcg_temp_free_i32(constimm); =20 tcg_gen_concat_i32_i64(rtmp, rm3, rm4); tcg_temp_free_i32(rm4); @@ -2911,7 +2905,7 @@ static bool trans_VTBL(DisasContext *s, arg_VTBL *a) return true; } =20 - desc =3D tcg_const_i32((a->vn << 2) | a->len); + desc =3D tcg_constant_i32((a->vn << 2) | a->len); def =3D tcg_temp_new_i64(); if (a->op) { read_neon_element64(def, a->vd, 0, MO_64); @@ -2926,7 +2920,6 @@ static bool trans_VTBL(DisasContext *s, arg_VTBL *a) =20 tcg_temp_free_i64(def); tcg_temp_free_i64(val); - tcg_temp_free_i32(desc); return true; } =20 --=20 2.25.1 From nobody Tue May 7 20:56:36 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650626572; cv=none; d=zohomail.com; s=zohoarc; b=CBlR2/1wTFAhVonabVjamTsaD7cFHwPml7oC2kTalFQgXCmK9DxdfMTGPnLyFToq5vfwIRoMrq+IL/KI8YA55BQWmIzncRX3ex4drqAMthGe2c2TIQuR4Kg1t12vTmo9pfHyPDkBaHWFh25bHUScBpmx/chtMKZqUvGLZoiuH1U= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650626572; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=zaKs7nV/Bv9VFOMg50MhiPk1cL7Obi+7zlrOm4dY3bM=; b=Eio0TIm9slvv0AgdnLlD/6CCH/qYoDwHbRSvoe85VOZckelBcRH59ew68XRbOyRK4++/AgzwXVcljMk97YeQ2LwIveqvB4Yhh89QSrhatuD9QZT32UKVo8nxeuU1w9SLFMfoOMA69KmmkDhdM074ndAvcYgv++BK7Vs8Ab3PuFs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 165062657252785.23253852090374; Fri, 22 Apr 2022 04:22:52 -0700 (PDT) Received: from localhost ([::1]:46114 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhrND-00055p-Hi for importer2@patchew.org; Fri, 22 Apr 2022 07:22:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59376) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhqAV-0005hg-W9 for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:40 -0400 Received: from mail-wm1-x333.google.com ([2a00:1450:4864:20::333]:34695) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhqAM-0002xh-Rb for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:38 -0400 Received: by mail-wm1-x333.google.com with SMTP id ay36-20020a05600c1e2400b0038ebc885115so4692547wmb.1 for ; Fri, 22 Apr 2022 03:05:30 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.28 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=zaKs7nV/Bv9VFOMg50MhiPk1cL7Obi+7zlrOm4dY3bM=; b=aw74E6hdP1Rf33WMmCKAhc0wtRx2sTcz0n4Eg40KXzBjH0fdbgU0CzXwxBKaOWCVNF g4CkbKTmf4M3+AxBe1IZOqOIlZB0GAg3kL4Q5zgcVtiJJYOndQpsBnOX5NUbV2KHKDhF yNQR83OLf+iOWV+yPOegRi6wW4svRfqbSMwxiS23LCbMuKZjpz5xGhLoekpiCn6oTeHZ b3EZJgr5zeDaGtdnVwrB8Z9rB2d5nWNwyzAA0QaP1IWYTFq8kKfCeT630KVA21xwoQo0 jtSeaE6rOWBVdr1R1t6VzhPp1QSde/r4AEWmYrAfBKqEnZf7TpVn0YgcSYjriHvgv27N qixw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=zaKs7nV/Bv9VFOMg50MhiPk1cL7Obi+7zlrOm4dY3bM=; b=Z5LSmStvY7eJNp2Aylu5s1hbIrRqKzDir12JfWwidx1bPOq4jhnP99yLChFQSlHFrF Ok9SUJv7ReSwsvo8AzMKGEyXYCl6khwoXmFU0fvGWyWO4DTMRGCGoFdOhhgEDPRKg6Sc eAwwHhgty5uwcQhu4McAjxCcD8swL+xO2186ySE9+2puNrxWOGxiM2y2Bfu+5yqZEiSn VLGBDidaUhaljfkwPLXc10O3rx5pAXVEdwPqFR189DF74L7S2VdemAAWF2VewwLAyRpa 3DYBeidb6qFsidD2JD9jclPhTtgQRNqRCAoV8+G/N1kC80PVl020/mmJ3cPnNdOfbvMZ Gumw== X-Gm-Message-State: AOAM532WUeSeIGtPILTvLaM/lwVm6dvtd4YXWbBzcLcILJfEkMdAupQ9 vjU5Mxq9x6slJP7+jLQw/3i/0kEJEQaFYw== X-Google-Smtp-Source: ABdhPJx6oO/INrFIEXi8hzdH+jJbZFDBFVEj6EydSQgytQMSMO4eomwa5oO3SLzXJTlO82TIIK05Vg== X-Received: by 2002:a05:600c:29c7:b0:38e:c58d:7b00 with SMTP id s7-20020a05600c29c700b0038ec58d7b00mr3535714wmd.47.1650621929065; Fri, 22 Apr 2022 03:05:29 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 58/61] target/arm: Use smin/smax for do_sat_addsub_32 Date: Fri, 22 Apr 2022 11:04:29 +0100 Message-Id: <20220422100432.2288247-59-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650626574096100001 Content-Type: text/plain; charset="utf-8" From: Richard Henderson The operation we're performing with the movcond is either min/max depending on cond -- simplify. Use tcg_constant_i64 while we're at it. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/translate-sve.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c index 180e14d9f88..726cf88d7c5 100644 --- a/target/arm/translate-sve.c +++ b/target/arm/translate-sve.c @@ -1916,8 +1916,6 @@ static bool trans_PNEXT(DisasContext *s, arg_rr_esz *= a) static void do_sat_addsub_32(TCGv_i64 reg, TCGv_i64 val, bool u, bool d) { int64_t ibound; - TCGv_i64 bound; - TCGCond cond; =20 /* Use normal 64-bit arithmetic to detect 32-bit overflow. */ if (u) { @@ -1928,15 +1926,12 @@ static void do_sat_addsub_32(TCGv_i64 reg, TCGv_i64= val, bool u, bool d) if (d) { tcg_gen_sub_i64(reg, reg, val); ibound =3D (u ? 0 : INT32_MIN); - cond =3D TCG_COND_LT; + tcg_gen_smax_i64(reg, reg, tcg_constant_i64(ibound)); } else { tcg_gen_add_i64(reg, reg, val); ibound =3D (u ? UINT32_MAX : INT32_MAX); - cond =3D TCG_COND_GT; + tcg_gen_smin_i64(reg, reg, tcg_constant_i64(ibound)); } - bound =3D tcg_const_i64(ibound); - tcg_gen_movcond_i64(cond, reg, reg, bound, bound, reg); - tcg_temp_free_i64(bound); } =20 /* Similarly with 64-bit values. */ --=20 2.25.1 From nobody Tue May 7 20:56:36 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650625877; cv=none; d=zohomail.com; s=zohoarc; b=FyFgPy7aDiqqEKW5IEeAmjyDVuXwubk4fFmp64KWd6sPM6miWYpSxaoh11jHKHfb0R6Gh7zU9/yDjIB8ddjPXi28os0pHNSiKE6m4siq/AR+E3myCIEmhVtDhc3nqcvbFO1iP4qOUpmKjHgGEoyIcTqpWCbmQCOvHecGIPf+1uQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1650625877; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=w6FKJY6h72UKhiMo8F0Q/EK0rQTfrxHRC6BdPcnyVtE=; b=AOGhppJvJDYn9hxPVD+VHx9W8KUBUjFh6TcQ8cBi6FjnpoH4aLDbQwZItB16Zg0KxvLbM/GKonqWnrPPJ7XS0FGC8fYrIB392GfccmbeDTBz1G3UagCXBRQL+Ik4Qk5yIc0udH3Fj73W1hAXVTJBalPd67e8RdKhGBPvYq+6UIg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 16506258775901003.2882617889984; Fri, 22 Apr 2022 04:11:17 -0700 (PDT) Received: from localhost ([::1]:46226 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhrC0-0001ap-A9 for importer2@patchew.org; Fri, 22 Apr 2022 07:11:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59372) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhqAS-0005di-3Q for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:36 -0400 Received: from mail-wm1-x331.google.com ([2a00:1450:4864:20::331]:46988) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhqAP-0002zX-Tb for qemu-devel@nongnu.org; Fri, 22 Apr 2022 06:05:35 -0400 Received: by mail-wm1-x331.google.com with SMTP id l62-20020a1c2541000000b0038e4570af2fso5079609wml.5 for ; Fri, 22 Apr 2022 03:05:33 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.29 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=w6FKJY6h72UKhiMo8F0Q/EK0rQTfrxHRC6BdPcnyVtE=; b=kdGmiq7gBE8fF9Mo5+lZGmQS2OKBmEBToQ52GiTpHhSUUpbgoVnhnB4wUQ1C1QLIUk D7qEivumfldzE54Npf/IdCXizCHEDIyGrx0/aL2xeYRBpbQZ+ncWC19bP7eu4BK1BFpQ fzdnmI5f7VmH5L88ZAQxSKKv2HfGjXAEgy8qhBesl9YFQ0sP0EVDyQ4GoA7oA1giOide IOskSRk8iOpTDmc/AH5DHbzoBa8le2eqPH1HJOTPP28Sq6/ZRtJX9OnjMpIWTXWQwTnX n9SfgSK0E1SVCeUDh6n8usU01DFnF0PsgjlBc1GIf6cYRfDrdHZKsLJFaretH3GTAfLk MzVA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=w6FKJY6h72UKhiMo8F0Q/EK0rQTfrxHRC6BdPcnyVtE=; b=7Q1+impsV/Z6Js60Y3EqGibH1d+Am9f07RZBY7XuTllgFuzQ78nZrA6dvGjOcpOb3a bfzTSiYUUhPpAoqKg8d5TGTzEka7fVKCLa89Wdw6ASwESmQqrl8TvXcuNBbUQ+xQmlEB bzhxCk+rzpRWdoh287zbgSS/N3IOG1HmTZ8G+KSGowXIpLAqOKt5J0Sr0lrPA+np4DFd 9bBVwEmqm5QmaNUJ/sT9Fw/zTyVxYCWYxrGWUysrhaVg6dAcLei3rwJMnONJQhIEvBzg 108FF1OXkl5GIY232AqNRoOPt64lpw/b/vaXhBYiLLhSxIun7v/cuYu3lPZpSmCBy/KM VDdg== X-Gm-Message-State: AOAM530JnnHHyMWQhdVp/Gl3FrArEwg+7gcbSWtrdlebVKajlbdNfq8m TL08r8vGlVQdumm5sL+rzLgFoN2sIOkiRQ== X-Google-Smtp-Source: ABdhPJyR6zXW+Q3OWo97vXDRTrsPl1wT1JYmsCi6lwhfaVaSoACk26u1oOWDNK9AM0J6zaQ9tY4JaA== X-Received: by 2002:a05:600c:4f87:b0:392:8e86:4754 with SMTP id n7-20020a05600c4f8700b003928e864754mr12347678wmq.130.1650621931796; Fri, 22 Apr 2022 03:05:31 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 59/61] target/arm: Use tcg_constant in translate-vfp.c Date: Fri, 22 Apr 2022 11:04:30 +0100 Message-Id: <20220422100432.2288247-60-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650625879154100001 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Use tcg_constant_{i32,i64} as appropriate throughout. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/translate-vfp.c | 76 ++++++++++++-------------------------- 1 file changed, 23 insertions(+), 53 deletions(-) diff --git a/target/arm/translate-vfp.c b/target/arm/translate-vfp.c index 6a95a67a69e..40a513b8221 100644 --- a/target/arm/translate-vfp.c +++ b/target/arm/translate-vfp.c @@ -180,8 +180,7 @@ static void gen_update_fp_context(DisasContext *s) gen_helper_vfp_set_fpscr(cpu_env, fpscr); tcg_temp_free_i32(fpscr); if (dc_isar_feature(aa32_mve, s)) { - TCGv_i32 z32 =3D tcg_const_i32(0); - store_cpu_field(z32, v7m.vpr); + store_cpu_field(tcg_constant_i32(0), v7m.vpr); } /* * We just updated the FPSCR and VPR. Some of this state is cached @@ -317,7 +316,7 @@ static bool trans_VSEL(DisasContext *s, arg_VSEL *a) TCGv_i64 frn, frm, dest; TCGv_i64 tmp, zero, zf, nf, vf; =20 - zero =3D tcg_const_i64(0); + zero =3D tcg_constant_i64(0); =20 frn =3D tcg_temp_new_i64(); frm =3D tcg_temp_new_i64(); @@ -335,27 +334,22 @@ static bool trans_VSEL(DisasContext *s, arg_VSEL *a) vfp_load_reg64(frm, rm); switch (a->cc) { case 0: /* eq: Z */ - tcg_gen_movcond_i64(TCG_COND_EQ, dest, zf, zero, - frn, frm); + tcg_gen_movcond_i64(TCG_COND_EQ, dest, zf, zero, frn, frm); break; case 1: /* vs: V */ - tcg_gen_movcond_i64(TCG_COND_LT, dest, vf, zero, - frn, frm); + tcg_gen_movcond_i64(TCG_COND_LT, dest, vf, zero, frn, frm); break; case 2: /* ge: N =3D=3D V -> N ^ V =3D=3D 0 */ tmp =3D tcg_temp_new_i64(); tcg_gen_xor_i64(tmp, vf, nf); - tcg_gen_movcond_i64(TCG_COND_GE, dest, tmp, zero, - frn, frm); + tcg_gen_movcond_i64(TCG_COND_GE, dest, tmp, zero, frn, frm); tcg_temp_free_i64(tmp); break; case 3: /* gt: !Z && N =3D=3D V */ - tcg_gen_movcond_i64(TCG_COND_NE, dest, zf, zero, - frn, frm); + tcg_gen_movcond_i64(TCG_COND_NE, dest, zf, zero, frn, frm); tmp =3D tcg_temp_new_i64(); tcg_gen_xor_i64(tmp, vf, nf); - tcg_gen_movcond_i64(TCG_COND_GE, dest, tmp, zero, - dest, frm); + tcg_gen_movcond_i64(TCG_COND_GE, dest, tmp, zero, dest, frm); tcg_temp_free_i64(tmp); break; } @@ -367,13 +361,11 @@ static bool trans_VSEL(DisasContext *s, arg_VSEL *a) tcg_temp_free_i64(zf); tcg_temp_free_i64(nf); tcg_temp_free_i64(vf); - - tcg_temp_free_i64(zero); } else { TCGv_i32 frn, frm, dest; TCGv_i32 tmp, zero; =20 - zero =3D tcg_const_i32(0); + zero =3D tcg_constant_i32(0); =20 frn =3D tcg_temp_new_i32(); frm =3D tcg_temp_new_i32(); @@ -382,27 +374,22 @@ static bool trans_VSEL(DisasContext *s, arg_VSEL *a) vfp_load_reg32(frm, rm); switch (a->cc) { case 0: /* eq: Z */ - tcg_gen_movcond_i32(TCG_COND_EQ, dest, cpu_ZF, zero, - frn, frm); + tcg_gen_movcond_i32(TCG_COND_EQ, dest, cpu_ZF, zero, frn, frm); break; case 1: /* vs: V */ - tcg_gen_movcond_i32(TCG_COND_LT, dest, cpu_VF, zero, - frn, frm); + tcg_gen_movcond_i32(TCG_COND_LT, dest, cpu_VF, zero, frn, frm); break; case 2: /* ge: N =3D=3D V -> N ^ V =3D=3D 0 */ tmp =3D tcg_temp_new_i32(); tcg_gen_xor_i32(tmp, cpu_VF, cpu_NF); - tcg_gen_movcond_i32(TCG_COND_GE, dest, tmp, zero, - frn, frm); + tcg_gen_movcond_i32(TCG_COND_GE, dest, tmp, zero, frn, frm); tcg_temp_free_i32(tmp); break; case 3: /* gt: !Z && N =3D=3D V */ - tcg_gen_movcond_i32(TCG_COND_NE, dest, cpu_ZF, zero, - frn, frm); + tcg_gen_movcond_i32(TCG_COND_NE, dest, cpu_ZF, zero, frn, frm); tmp =3D tcg_temp_new_i32(); tcg_gen_xor_i32(tmp, cpu_VF, cpu_NF); - tcg_gen_movcond_i32(TCG_COND_GE, dest, tmp, zero, - dest, frm); + tcg_gen_movcond_i32(TCG_COND_GE, dest, tmp, zero, dest, frm); tcg_temp_free_i32(tmp); break; } @@ -414,8 +401,6 @@ static bool trans_VSEL(DisasContext *s, arg_VSEL *a) tcg_temp_free_i32(frn); tcg_temp_free_i32(frm); tcg_temp_free_i32(dest); - - tcg_temp_free_i32(zero); } =20 return true; @@ -547,7 +532,7 @@ static bool trans_VCVT(DisasContext *s, arg_VCVT *a) fpst =3D fpstatus_ptr(FPST_FPCR); } =20 - tcg_shift =3D tcg_const_i32(0); + tcg_shift =3D tcg_constant_i32(0); =20 tcg_rmode =3D tcg_const_i32(arm_rmode_to_sf(rounding)); gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst); @@ -595,8 +580,6 @@ static bool trans_VCVT(DisasContext *s, arg_VCVT *a) gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst); tcg_temp_free_i32(tcg_rmode); =20 - tcg_temp_free_i32(tcg_shift); - tcg_temp_free_ptr(fpst); =20 return true; @@ -850,15 +833,11 @@ static bool trans_VMSR_VMRS(DisasContext *s, arg_VMSR= _VMRS *a) case ARM_VFP_MVFR2: case ARM_VFP_FPSID: if (s->current_el =3D=3D 1) { - TCGv_i32 tcg_reg, tcg_rt; - gen_set_condexec(s); gen_set_pc_im(s, s->pc_curr); - tcg_reg =3D tcg_const_i32(a->reg); - tcg_rt =3D tcg_const_i32(a->rt); - gen_helper_check_hcr_el2_trap(cpu_env, tcg_rt, tcg_reg); - tcg_temp_free_i32(tcg_reg); - tcg_temp_free_i32(tcg_rt); + gen_helper_check_hcr_el2_trap(cpu_env, + tcg_constant_i32(a->rt), + tcg_constant_i32(a->reg)); } /* fall through */ case ARM_VFP_FPEXC: @@ -2388,8 +2367,6 @@ MAKE_VFM_TRANS_FNS(dp) =20 static bool trans_VMOV_imm_hp(DisasContext *s, arg_VMOV_imm_sp *a) { - TCGv_i32 fd; - if (!dc_isar_feature(aa32_fp16_arith, s)) { return false; } @@ -2402,9 +2379,7 @@ static bool trans_VMOV_imm_hp(DisasContext *s, arg_VM= OV_imm_sp *a) return true; } =20 - fd =3D tcg_const_i32(vfp_expand_imm(MO_16, a->imm)); - vfp_store_reg32(fd, a->vd); - tcg_temp_free_i32(fd); + vfp_store_reg32(tcg_constant_i32(vfp_expand_imm(MO_16, a->imm)), a->vd= ); return true; } =20 @@ -2440,7 +2415,7 @@ static bool trans_VMOV_imm_sp(DisasContext *s, arg_VM= OV_imm_sp *a) } } =20 - fd =3D tcg_const_i32(vfp_expand_imm(MO_32, a->imm)); + fd =3D tcg_constant_i32(vfp_expand_imm(MO_32, a->imm)); =20 for (;;) { vfp_store_reg32(fd, vd); @@ -2454,7 +2429,6 @@ static bool trans_VMOV_imm_sp(DisasContext *s, arg_VM= OV_imm_sp *a) vd =3D vfp_advance_sreg(vd, delta_d); } =20 - tcg_temp_free_i32(fd); return true; } =20 @@ -2495,7 +2469,7 @@ static bool trans_VMOV_imm_dp(DisasContext *s, arg_VM= OV_imm_dp *a) } } =20 - fd =3D tcg_const_i64(vfp_expand_imm(MO_64, a->imm)); + fd =3D tcg_constant_i64(vfp_expand_imm(MO_64, a->imm)); =20 for (;;) { vfp_store_reg64(fd, vd); @@ -2509,7 +2483,6 @@ static bool trans_VMOV_imm_dp(DisasContext *s, arg_VM= OV_imm_dp *a) vd =3D vfp_advance_dreg(vd, delta_d); } =20 - tcg_temp_free_i64(fd); return true; } =20 @@ -3294,7 +3267,7 @@ static bool trans_VCVT_fix_hp(DisasContext *s, arg_VC= VT_fix_sp *a) vfp_load_reg32(vd, a->vd); =20 fpst =3D fpstatus_ptr(FPST_FPCR_F16); - shift =3D tcg_const_i32(frac_bits); + shift =3D tcg_constant_i32(frac_bits); =20 /* Switch on op:U:sx bits */ switch (a->opc) { @@ -3328,7 +3301,6 @@ static bool trans_VCVT_fix_hp(DisasContext *s, arg_VC= VT_fix_sp *a) =20 vfp_store_reg32(vd, a->vd); tcg_temp_free_i32(vd); - tcg_temp_free_i32(shift); tcg_temp_free_ptr(fpst); return true; } @@ -3353,7 +3325,7 @@ static bool trans_VCVT_fix_sp(DisasContext *s, arg_VC= VT_fix_sp *a) vfp_load_reg32(vd, a->vd); =20 fpst =3D fpstatus_ptr(FPST_FPCR); - shift =3D tcg_const_i32(frac_bits); + shift =3D tcg_constant_i32(frac_bits); =20 /* Switch on op:U:sx bits */ switch (a->opc) { @@ -3387,7 +3359,6 @@ static bool trans_VCVT_fix_sp(DisasContext *s, arg_VC= VT_fix_sp *a) =20 vfp_store_reg32(vd, a->vd); tcg_temp_free_i32(vd); - tcg_temp_free_i32(shift); tcg_temp_free_ptr(fpst); return true; } @@ -3418,7 +3389,7 @@ static bool trans_VCVT_fix_dp(DisasContext *s, arg_VC= VT_fix_dp *a) vfp_load_reg64(vd, a->vd); =20 fpst =3D fpstatus_ptr(FPST_FPCR); - shift =3D tcg_const_i32(frac_bits); + shift =3D tcg_constant_i32(frac_bits); =20 /* Switch on op:U:sx bits */ switch (a->opc) { @@ -3452,7 +3423,6 @@ static bool trans_VCVT_fix_dp(DisasContext *s, arg_VC= VT_fix_dp *a) =20 vfp_store_reg64(vd, a->vd); tcg_temp_free_i64(vd); - tcg_temp_free_i32(shift); tcg_temp_free_ptr(fpst); return true; } --=20 2.25.1 From nobody Tue May 7 20:56:36 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650626229; cv=none; d=zohomail.com; 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envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650626231736100001 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/translate.h | 13 +++---------- 1 file changed, 3 insertions(+), 10 deletions(-) diff --git a/target/arm/translate.h b/target/arm/translate.h index 050d80f6f90..6f0ebdc88e5 100644 --- a/target/arm/translate.h +++ b/target/arm/translate.h @@ -332,16 +332,9 @@ static inline void gen_ss_advance(DisasContext *s) static inline void gen_exception(int excp, uint32_t syndrome, uint32_t target_el) { - TCGv_i32 tcg_excp =3D tcg_const_i32(excp); - TCGv_i32 tcg_syn =3D tcg_const_i32(syndrome); - TCGv_i32 tcg_el =3D tcg_const_i32(target_el); - - gen_helper_exception_with_syndrome(cpu_env, tcg_excp, - tcg_syn, tcg_el); - - tcg_temp_free_i32(tcg_el); - tcg_temp_free_i32(tcg_syn); - tcg_temp_free_i32(tcg_excp); + gen_helper_exception_with_syndrome(cpu_env, tcg_constant_i32(excp), + tcg_constant_i32(syndrome), + tcg_constant_i32(target_el)); } =20 /* Generate an architectural singlestep exception */ --=20 2.25.1 From nobody Tue May 7 20:56:36 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1650627918; cv=none; d=zohomail.com; s=zohoarc; b=LgmWU0Vkt/DFmJVBFekVlxfw90YNo0tIhn4ihJuS82I8sk3zV0ZtWCKqi2gUclbK7wPBgiWnx3kyhKh41dtfzaAkUEWNZ5ZluMEUyY1PhxMpKN0u7NCnQLWtxn9BfFTQH9jY1ab6C6T018ogf4JyN+FTy3qo7SakhKsZKbPq3Wg= ARC-Message-Signature: i=1; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id e16-20020a05600c2dd000b0038ed449cbdbsm4312148wmh.3.2022.04.22.03.05.32 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 03:05:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=F5JxzY641qwLK/UV9n1xJjYcWBo1utd1eisOSylOdzc=; b=IbkzBmU8ns9+Kr9vM+cGnoJpbNjXCiI5a2t+w1oC+u2vfERwiiTFn5+2S16VH1to+g XY3J9I5N2+uuV4/XvaTQz72qskARdO7yws+DCY8zBgPW5ZdPqleagDxKZz0z1p2cL0cc qkSB2T6epdcZUwjdII4JBjeuph0SxIEP4Hp3155dERIydsaXVX3THoCnmauJrnAwDwuS sGnR1HCg8PuaLrf9uLtmL0bQMg7+/A9RRFBjkRV/3Xr/M3qQqPCI8SNHQQ5zvBb1RXyD zeaqgGFU9eulz5Lj8TSEXgDb5vlqMr+eGxlRgP0oGO2MSwWl2yWlGJFha2xg+QgZ0cHx fzdg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=F5JxzY641qwLK/UV9n1xJjYcWBo1utd1eisOSylOdzc=; b=ewKAvhNI+3GwDSVQ+EjVo/+6be+4a5LduGJXv2iRHUaLQaKRbB/LmOd3E2zg4pBbfq a7t1bSN2ItTPxV3/kKIkae8tcvb4OU9HI0D9Kk55CW1T7IN/svhuhrfnhTT6c4grjEp0 5W8wA2/RMW3SbJ20PIjbSrTCl2mpUbphQpM6hwZ0fNM5BR6GQ8yzdn2EzF0Ffo6tPi4T eJ4pxgVg9VAWogiK+yTRjYR3mV6Los4HafutB2CiYzl3JJsSugUUZD6rmcxUtYGAzEmd 4GHvoWcqN8GQa14tFNfa4oqkr/B36Rr6TWYVRWK3vEt3nddzJz4z6kNtpwFmF8vYnnJ4 q1DQ== X-Gm-Message-State: AOAM533iCPqAzxuY+BaRtdUAKenr5f6YSCDicfSA1HbDjBWktDYYEyJA OX/42/NsF/ksqR/mhsjNYMQHagWETXVbDw== X-Google-Smtp-Source: ABdhPJy1wE+1PWHycnoxeJn7pqsN5w9y8L3NHphDxjB+utLDtKOVis+OKHY48RPMkWELToIRLFVUFA== X-Received: by 2002:a05:600c:240a:b0:38e:af6f:510f with SMTP id 10-20020a05600c240a00b0038eaf6f510fmr12558318wmp.46.1650621933367; Fri, 22 Apr 2022 03:05:33 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 61/61] hw/arm/smmuv3: Pass the actual perm to returned IOMMUTLBEntry in smmuv3_translate() Date: Fri, 22 Apr 2022 11:04:32 +0100 Message-Id: <20220422100432.2288247-62-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422100432.2288247-1-peter.maydell@linaro.org> References: <20220422100432.2288247-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1650627920937100001 Content-Type: text/plain; charset="utf-8" From: Xiang Chen It always calls the IOMMU MR translate() callback with flag=3DIOMMU_NONE in memory_region_iommu_replay(). Currently, smmuv3_translate() return an IOMMUTLBEntry with perm set to IOMMU_NONE even if the translation success, whereas it is expected to return the actual permission set in the table entry. So pass the actual perm to returned IOMMUTLBEntry in the table entry. Signed-off-by: Xiang Chen Reviewed-by: Eric Auger Message-id: 1650094695-121918-1-git-send-email-chenxiang66@hisilicon.com Signed-off-by: Peter Maydell --- hw/arm/smmuv3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index 674623aabea..707eb430c23 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -760,7 +760,7 @@ epilogue: qemu_mutex_unlock(&s->mutex); switch (status) { case SMMU_TRANS_SUCCESS: - entry.perm =3D flag; + entry.perm =3D cached_entry->entry.perm; entry.translated_addr =3D cached_entry->entry.translated_addr + (addr & cached_entry->entry.addr_mask); entry.addr_mask =3D cached_entry->entry.addr_mask; --=20 2.25.1