From nobody Mon May 6 16:25:59 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650654735737762.2153226391333; Fri, 22 Apr 2022 12:12:15 -0700 (PDT) Received: from localhost ([::1]:33406 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhyhS-0005n5-F1 for importer2@patchew.org; Fri, 22 Apr 2022 15:12:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:44634) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhyQt-0001rp-HT; Fri, 22 Apr 2022 14:55:07 -0400 Received: from [187.72.171.209] (port=52505 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhyQr-0000CU-Aa; Fri, 22 Apr 2022 14:55:07 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Fri, 22 Apr 2022 15:54:53 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id A796F80060F; Fri, 22 Apr 2022 15:54:53 -0300 (-03) From: =?UTF-8?q?V=C3=ADctor=20Colombo?= To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 01/20] target/ppc: Remove fpscr_* macros from cpu.h Date: Fri, 22 Apr 2022 15:54:31 -0300 Message-Id: <20220422185450.107256-2-victor.colombo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422185450.107256-1-victor.colombo@eldorado.org.br> References: <20220422185450.107256-1-victor.colombo@eldorado.org.br> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-OriginalArrivalTime: 22 Apr 2022 18:54:53.0999 (UTC) FILETIME=[74062BF0:01D8567A] X-Host-Lookup-Failed: Reverse DNS lookup failed for 187.72.171.209 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=187.72.171.209; envelope-from=victor.colombo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, richard.henderson@linaro.org, groug@kaod.org, victor.colombo@eldorado.org.br, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1650654736638100001 fpscr_* defined macros are hiding the usage of *env behind them. Substitute the usage of these macros with `env->fpscr & FP_*` to make the code cleaner. Suggested-by: Richard Henderson Signed-off-by: V=C3=ADctor Colombo Reviewed-by: Richard Henderson --- target/ppc/cpu.c | 2 +- target/ppc/cpu.h | 29 ----------------------------- target/ppc/fpu_helper.c | 28 ++++++++++++++-------------- 3 files changed, 15 insertions(+), 44 deletions(-) diff --git a/target/ppc/cpu.c b/target/ppc/cpu.c index d7b42bae52..401b6f9e63 100644 --- a/target/ppc/cpu.c +++ b/target/ppc/cpu.c @@ -88,7 +88,7 @@ static inline void fpscr_set_rounding_mode(CPUPPCState *e= nv) int rnd_type; =20 /* Set rounding mode */ - switch (fpscr_rn) { + switch (env->fpscr & FP_RN) { case 0: /* Best approximation (round to nearest) */ rnd_type =3D float_round_nearest_even; diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index c2b6c987c0..ad31e51d69 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -713,41 +713,12 @@ enum { #define FPSCR_NI 2 /* Floating-point non-IEEE mode = */ #define FPSCR_RN1 1 #define FPSCR_RN0 0 /* Floating-point rounding control = */ -#define fpscr_drn (((env->fpscr) & FP_DRN) >> FPSCR_DRN0) -#define fpscr_fex (((env->fpscr) >> FPSCR_FEX) & 0x1) -#define fpscr_vx (((env->fpscr) >> FPSCR_VX) & 0x1) -#define fpscr_ox (((env->fpscr) >> FPSCR_OX) & 0x1) -#define fpscr_ux (((env->fpscr) >> FPSCR_UX) & 0x1) -#define fpscr_zx (((env->fpscr) >> FPSCR_ZX) & 0x1) -#define fpscr_xx (((env->fpscr) >> FPSCR_XX) & 0x1) -#define fpscr_vxsnan (((env->fpscr) >> FPSCR_VXSNAN) & 0x1) -#define fpscr_vxisi (((env->fpscr) >> FPSCR_VXISI) & 0x1) -#define fpscr_vxidi (((env->fpscr) >> FPSCR_VXIDI) & 0x1) -#define fpscr_vxzdz (((env->fpscr) >> FPSCR_VXZDZ) & 0x1) -#define fpscr_vximz (((env->fpscr) >> FPSCR_VXIMZ) & 0x1) -#define fpscr_vxvc (((env->fpscr) >> FPSCR_VXVC) & 0x1) -#define fpscr_fpcc (((env->fpscr) >> FPSCR_FPCC) & 0xF) -#define fpscr_vxsoft (((env->fpscr) >> FPSCR_VXSOFT) & 0x1) -#define fpscr_vxsqrt (((env->fpscr) >> FPSCR_VXSQRT) & 0x1) -#define fpscr_vxcvi (((env->fpscr) >> FPSCR_VXCVI) & 0x1) -#define fpscr_ve (((env->fpscr) >> FPSCR_VE) & 0x1) -#define fpscr_oe (((env->fpscr) >> FPSCR_OE) & 0x1) -#define fpscr_ue (((env->fpscr) >> FPSCR_UE) & 0x1) -#define fpscr_ze (((env->fpscr) >> FPSCR_ZE) & 0x1) -#define fpscr_xe (((env->fpscr) >> FPSCR_XE) & 0x1) -#define fpscr_ni (((env->fpscr) >> FPSCR_NI) & 0x1) -#define fpscr_rn (((env->fpscr) >> FPSCR_RN0) & 0x3) /* Invalid operation exception summary */ #define FPSCR_IX ((1 << FPSCR_VXSNAN) | (1 << FPSCR_VXISI) | \ (1 << FPSCR_VXIDI) | (1 << FPSCR_VXZDZ) | \ (1 << FPSCR_VXIMZ) | (1 << FPSCR_VXVC) | \ (1 << FPSCR_VXSOFT) | (1 << FPSCR_VXSQRT) | \ (1 << FPSCR_VXCVI)) -/* exception summary */ -#define fpscr_ex (((env->fpscr) >> FPSCR_XX) & 0x1F) -/* enabled exception summary */ -#define fpscr_eex (((env->fpscr) >> FPSCR_XX) & ((env->fpscr) >> FPSCR_XE)= & \ - 0x1F) =20 #define FP_DRN2 (1ull << FPSCR_DRN2) #define FP_DRN1 (1ull << FPSCR_DRN1) diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index 99281cc37a..f6c8318a71 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -202,7 +202,7 @@ static void finish_invalid_op_excp(CPUPPCState *env, in= t op, uintptr_t retaddr) env->fpscr |=3D FP_VX; /* Update the floating-point exception summary */ env->fpscr |=3D FP_FX; - if (fpscr_ve !=3D 0) { + if (env->fpscr & FP_VE) { /* Update the floating-point enabled exception summary */ env->fpscr |=3D FP_FEX; if (fp_exceptions_enabled(env)) { @@ -216,7 +216,7 @@ static void finish_invalid_op_arith(CPUPPCState *env, i= nt op, bool set_fpcc, uintptr_t retaddr) { env->fpscr &=3D ~(FP_FR | FP_FI); - if (fpscr_ve =3D=3D 0) { + if (!(env->fpscr & FP_VE)) { if (set_fpcc) { env->fpscr &=3D ~FP_FPCC; env->fpscr |=3D (FP_C | FP_FU); @@ -286,7 +286,7 @@ static void float_invalid_op_vxvc(CPUPPCState *env, boo= l set_fpcc, /* Update the floating-point exception summary */ env->fpscr |=3D FP_FX; /* We must update the target FPR before raising the exception */ - if (fpscr_ve !=3D 0) { + if (env->fpscr & FP_VE) { CPUState *cs =3D env_cpu(env); =20 cs->exception_index =3D POWERPC_EXCP_PROGRAM; @@ -303,7 +303,7 @@ static void float_invalid_op_vxcvi(CPUPPCState *env, bo= ol set_fpcc, { env->fpscr |=3D FP_VXCVI; env->fpscr &=3D ~(FP_FR | FP_FI); - if (fpscr_ve =3D=3D 0) { + if (!(env->fpscr & FP_VE)) { if (set_fpcc) { env->fpscr &=3D ~FP_FPCC; env->fpscr |=3D (FP_C | FP_FU); @@ -318,7 +318,7 @@ static inline void float_zero_divide_excp(CPUPPCState *= env, uintptr_t raddr) env->fpscr &=3D ~(FP_FR | FP_FI); /* Update the floating-point exception summary */ env->fpscr |=3D FP_FX; - if (fpscr_ze !=3D 0) { + if (env->fpscr & FP_ZE) { /* Update the floating-point enabled exception summary */ env->fpscr |=3D FP_FEX; if (fp_exceptions_enabled(env)) { @@ -336,7 +336,7 @@ static inline void float_overflow_excp(CPUPPCState *env) env->fpscr |=3D FP_OX; /* Update the floating-point exception summary */ env->fpscr |=3D FP_FX; - if (fpscr_oe !=3D 0) { + if (env->fpscr & FP_OE) { /* XXX: should adjust the result */ /* Update the floating-point enabled exception summary */ env->fpscr |=3D FP_FEX; @@ -356,7 +356,7 @@ static inline void float_underflow_excp(CPUPPCState *en= v) env->fpscr |=3D FP_UX; /* Update the floating-point exception summary */ env->fpscr |=3D FP_FX; - if (fpscr_ue !=3D 0) { + if (env->fpscr & FP_UE) { /* XXX: should adjust the result */ /* Update the floating-point enabled exception summary */ env->fpscr |=3D FP_FEX; @@ -374,7 +374,7 @@ static inline void float_inexact_excp(CPUPPCState *env) env->fpscr |=3D FP_XX; /* Update the floating-point exception summary */ env->fpscr |=3D FP_FX; - if (fpscr_xe !=3D 0) { + if (env->fpscr & FP_XE) { /* Update the floating-point enabled exception summary */ env->fpscr |=3D FP_FEX; /* We must update the target FPR before raising the exception */ @@ -2274,7 +2274,7 @@ VSX_MADDQ(XSNMSUBQPO, NMSUB_FLGS, 0) vxvc =3D svxvc; = \ if (flags & float_flag_invalid_snan) { = \ float_invalid_op_vxsnan(env, GETPC()); = \ - vxvc &=3D fpscr_ve =3D=3D 0; = \ + vxvc &=3D !(env->fpscr & FP_VE); = \ } = \ if (vxvc) { = \ float_invalid_op_vxvc(env, 0, GETPC()); = \ @@ -2375,7 +2375,7 @@ static inline void do_scalar_cmp(CPUPPCState *env, pp= c_vsr_t *xa, ppc_vsr_t *xb, if (float64_is_signaling_nan(xa->VsrD(0), &env->fp_status) || float64_is_signaling_nan(xb->VsrD(0), &env->fp_status)) { vxsnan_flag =3D true; - if (fpscr_ve =3D=3D 0 && ordered) { + if (!(env->fpscr & FP_VE) && ordered) { vxvc_flag =3D true; } } else if (float64_is_quiet_nan(xa->VsrD(0), &env->fp_status) || @@ -2440,7 +2440,7 @@ static inline void do_scalar_cmpq(CPUPPCState *env, p= pc_vsr_t *xa, if (float128_is_signaling_nan(xa->f128, &env->fp_status) || float128_is_signaling_nan(xb->f128, &env->fp_status)) { vxsnan_flag =3D true; - if (fpscr_ve =3D=3D 0 && ordered) { + if (!(env->fpscr & FP_VE) && ordered) { vxvc_flag =3D true; } } else if (float128_is_quiet_nan(xa->f128, &env->fp_status) || @@ -2590,7 +2590,7 @@ void helper_##name(CPUPPCState *env, = \ t.VsrD(0) =3D xb->VsrD(0); = \ } = \ = \ - vex_flag =3D fpscr_ve & vxsnan_flag; = \ + vex_flag =3D (env->fpscr & FP_VE) && vxsnan_flag; = \ if (vxsnan_flag) { = \ float_invalid_op_vxsnan(env, GETPC()); = \ } = \ @@ -3320,7 +3320,7 @@ void helper_xsrqpi(CPUPPCState *env, uint32_t opcode, if (r =3D=3D 0 && rmc =3D=3D 0) { rmode =3D float_round_ties_away; } else if (r =3D=3D 0 && rmc =3D=3D 0x3) { - rmode =3D fpscr_rn; + rmode =3D env->fpscr & FP_RN; } else if (r =3D=3D 1) { switch (rmc) { case 0: @@ -3374,7 +3374,7 @@ void helper_xsrqpxp(CPUPPCState *env, uint32_t opcode, if (r =3D=3D 0 && rmc =3D=3D 0) { rmode =3D float_round_ties_away; } else if (r =3D=3D 0 && rmc =3D=3D 0x3) { - rmode =3D fpscr_rn; + rmode =3D env->fpscr & FP_RN; } else if (r =3D=3D 1) { switch (rmc) { case 0: --=20 2.25.1 From nobody Mon May 6 16:25:59 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650654638105766.9008213047491; Fri, 22 Apr 2022 12:10:38 -0700 (PDT) Received: from localhost ([::1]:58520 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhyfr-0003g3-G7 for importer2@patchew.org; Fri, 22 Apr 2022 15:10:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:44674) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhyQw-0001zy-BN; Fri, 22 Apr 2022 14:55:10 -0400 Received: from [187.72.171.209] (port=52505 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhyQu-0000CU-P0; Fri, 22 Apr 2022 14:55:10 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Fri, 22 Apr 2022 15:54:54 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id CB77C80031F; Fri, 22 Apr 2022 15:54:53 -0300 (-03) From: =?UTF-8?q?V=C3=ADctor=20Colombo?= To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 02/20] target/ppc: Remove unused msr_* macros Date: Fri, 22 Apr 2022 15:54:32 -0300 Message-Id: <20220422185450.107256-3-victor.colombo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422185450.107256-1-victor.colombo@eldorado.org.br> References: <20220422185450.107256-1-victor.colombo@eldorado.org.br> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-OriginalArrivalTime: 22 Apr 2022 18:54:54.0092 (UTC) FILETIME=[74145CC0:01D8567A] X-Host-Lookup-Failed: Reverse DNS lookup failed for 187.72.171.209 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=187.72.171.209; envelope-from=victor.colombo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, richard.henderson@linaro.org, groug@kaod.org, victor.colombo@eldorado.org.br, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1650654640186100001 Some msr_* macros are not used anywhere. Remove them as part of the work to remove all hidden usage of *env. Suggested-by: Richard Henderson Signed-off-by: V=C3=ADctor Colombo Reviewed-by: Richard Henderson --- target/ppc/cpu.h | 21 --------------------- 1 file changed, 21 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index ad31e51d69..106b555b86 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -463,23 +463,14 @@ typedef enum { #define HFSCR_MSGP PPC_BIT(53) /* Privileged Message Send Facilities */ #define HFSCR_IC_MSGP 0xA =20 -#define msr_sf ((env->msr >> MSR_SF) & 1) -#define msr_isf ((env->msr >> MSR_ISF) & 1) #if defined(TARGET_PPC64) #define msr_hv ((env->msr >> MSR_HV) & 1) #else #define msr_hv (0) #endif #define msr_cm ((env->msr >> MSR_CM) & 1) -#define msr_icm ((env->msr >> MSR_ICM) & 1) #define msr_gs ((env->msr >> MSR_GS) & 1) -#define msr_ucle ((env->msr >> MSR_UCLE) & 1) -#define msr_vr ((env->msr >> MSR_VR) & 1) -#define msr_spe ((env->msr >> MSR_SPE) & 1) -#define msr_vsx ((env->msr >> MSR_VSX) & 1) -#define msr_key ((env->msr >> MSR_KEY) & 1) #define msr_pow ((env->msr >> MSR_POW) & 1) -#define msr_tgpr ((env->msr >> MSR_TGPR) & 1) #define msr_ce ((env->msr >> MSR_CE) & 1) #define msr_ile ((env->msr >> MSR_ILE) & 1) #define msr_ee ((env->msr >> MSR_EE) & 1) @@ -487,25 +478,13 @@ typedef enum { #define msr_fp ((env->msr >> MSR_FP) & 1) #define msr_me ((env->msr >> MSR_ME) & 1) #define msr_fe0 ((env->msr >> MSR_FE0) & 1) -#define msr_se ((env->msr >> MSR_SE) & 1) -#define msr_dwe ((env->msr >> MSR_DWE) & 1) -#define msr_uble ((env->msr >> MSR_UBLE) & 1) -#define msr_be ((env->msr >> MSR_BE) & 1) -#define msr_de ((env->msr >> MSR_DE) & 1) #define msr_fe1 ((env->msr >> MSR_FE1) & 1) -#define msr_al ((env->msr >> MSR_AL) & 1) #define msr_ep ((env->msr >> MSR_EP) & 1) #define msr_ir ((env->msr >> MSR_IR) & 1) #define msr_dr ((env->msr >> MSR_DR) & 1) -#define msr_is ((env->msr >> MSR_IS) & 1) #define msr_ds ((env->msr >> MSR_DS) & 1) -#define msr_pe ((env->msr >> MSR_PE) & 1) -#define msr_px ((env->msr >> MSR_PX) & 1) -#define msr_pmm ((env->msr >> MSR_PMM) & 1) -#define msr_ri ((env->msr >> MSR_RI) & 1) #define msr_le ((env->msr >> MSR_LE) & 1) #define msr_ts ((env->msr >> MSR_TS1) & 3) -#define msr_tm ((env->msr >> MSR_TM) & 1) =20 #define DBCR0_ICMP (1 << 27) #define DBCR0_BRT (1 << 26) --=20 2.25.1 From nobody Mon May 6 16:25:59 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650654132523530.9114233472884; Fri, 22 Apr 2022 12:02:12 -0700 (PDT) Received: from localhost ([::1]:37008 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhyXi-0004N3-KO for importer2@patchew.org; Fri, 22 Apr 2022 15:02:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:44700) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhyR0-00027N-54; Fri, 22 Apr 2022 14:55:14 -0400 Received: from [187.72.171.209] (port=52505 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhyQx-0000CU-7I; Fri, 22 Apr 2022 14:55:12 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Fri, 22 Apr 2022 15:54:54 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id E489E800902; Fri, 22 Apr 2022 15:54:53 -0300 (-03) From: =?UTF-8?q?V=C3=ADctor=20Colombo?= To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 03/20] target/ppc: Substitute msr_pr macro with new M_MSR_PR macro Date: Fri, 22 Apr 2022 15:54:33 -0300 Message-Id: <20220422185450.107256-4-victor.colombo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422185450.107256-1-victor.colombo@eldorado.org.br> References: <20220422185450.107256-1-victor.colombo@eldorado.org.br> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-OriginalArrivalTime: 22 Apr 2022 18:54:54.0186 (UTC) FILETIME=[7422B4A0:01D8567A] X-Host-Lookup-Failed: Reverse DNS lookup failed for 187.72.171.209 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=187.72.171.209; envelope-from=victor.colombo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, richard.henderson@linaro.org, groug@kaod.org, victor.colombo@eldorado.org.br, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1650654134065100002 Suggested-by: Richard Henderson Signed-off-by: V=C3=ADctor Colombo --- hw/ppc/pegasos2.c | 2 +- hw/ppc/spapr.c | 2 +- target/ppc/cpu.h | 3 ++- target/ppc/cpu_init.c | 4 ++-- target/ppc/excp_helper.c | 6 +++--- target/ppc/mem_helper.c | 4 ++-- target/ppc/mmu-radix64.c | 4 ++-- target/ppc/mmu_common.c | 23 ++++++++++++----------- 8 files changed, 25 insertions(+), 23 deletions(-) diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c index 56bf203dfd..27ed54a71d 100644 --- a/hw/ppc/pegasos2.c +++ b/hw/ppc/pegasos2.c @@ -461,7 +461,7 @@ static void pegasos2_hypercall(PPCVirtualHypervisor *vh= yp, PowerPCCPU *cpu) /* The TCG path should also be holding the BQL at this point */ g_assert(qemu_mutex_iothread_locked()); =20 - if (msr_pr) { + if (env->msr & M_MSR_PR) { qemu_log_mask(LOG_GUEST_ERROR, "Hypercall made with MSR[PR]=3D1\n"= ); env->gpr[3] =3D H_PRIVILEGE; } else if (env->gpr[3] =3D=3D KVMPPC_H_RTAS) { diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 22569305d2..c947494099 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1269,7 +1269,7 @@ static void emulate_spapr_hypercall(PPCVirtualHypervi= sor *vhyp, =20 g_assert(!vhyp_cpu_in_nested(cpu)); =20 - if (msr_pr) { + if (env->msr & M_MSR_PR) { hcall_dprintf("Hypercall made with MSR[PR]=3D1\n"); env->gpr[3] =3D H_PRIVILEGE; } else { diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 106b555b86..2ad023e981 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -353,6 +353,8 @@ typedef enum { #define MSR_RI 1 /* Recoverable interrupt 1 = */ #define MSR_LE 0 /* Little-endian mode 1 hfla= gs */ =20 +#define M_MSR_PR (1ull << MSR_PR) + /* PMU bits */ #define MMCR0_FC PPC_BIT(32) /* Freeze Counters */ #define MMCR0_PMAO PPC_BIT(56) /* Perf Monitor Alert Ocurred */ @@ -474,7 +476,6 @@ typedef enum { #define msr_ce ((env->msr >> MSR_CE) & 1) #define msr_ile ((env->msr >> MSR_ILE) & 1) #define msr_ee ((env->msr >> MSR_EE) & 1) -#define msr_pr ((env->msr >> MSR_PR) & 1) #define msr_fp ((env->msr >> MSR_FP) & 1) #define msr_me ((env->msr >> MSR_ME) & 1) #define msr_fe0 ((env->msr >> MSR_FE0) & 1) diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index d42e2ba8e0..6e2b23a859 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -6303,7 +6303,7 @@ static bool cpu_has_work_POWER9(CPUState *cs) if ((env->pending_interrupts & (1u << PPC_INTERRUPT_EXT)) && (env->spr[SPR_LPCR] & LPCR_EEE)) { bool heic =3D !!(env->spr[SPR_LPCR] & LPCR_HEIC); - if (heic =3D=3D 0 || !msr_hv || msr_pr) { + if (!heic || !msr_hv || (env->msr & M_MSR_PR)) { return true; } } @@ -6517,7 +6517,7 @@ static bool cpu_has_work_POWER10(CPUState *cs) if ((env->pending_interrupts & (1u << PPC_INTERRUPT_EXT)) && (env->spr[SPR_LPCR] & LPCR_EEE)) { bool heic =3D !!(env->spr[SPR_LPCR] & LPCR_HEIC); - if (heic =3D=3D 0 || !msr_hv || msr_pr) { + if (!heic || !msr_hv || (env->msr & M_MSR_PR)) { return true; } } diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index d3e2cfcd71..10cd381be2 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -1738,7 +1738,7 @@ static void ppc_hw_interrupt(CPUPPCState *env) bool lpes0 =3D !!(env->spr[SPR_LPCR] & LPCR_LPES0); bool heic =3D !!(env->spr[SPR_LPCR] & LPCR_HEIC); /* HEIC blocks delivery to the hypervisor */ - if ((async_deliver && !(heic && msr_hv && !msr_pr)) || + if ((async_deliver && !(heic && msr_hv && !(env->msr & M_MSR_PR)))= || (env->has_hv_mode && msr_hv =3D=3D 0 && !lpes0)) { if (books_vhyp_promotes_external_to_hvirt(cpu)) { powerpc_excp(cpu, POWERPC_EXCP_HVIRT); @@ -1818,7 +1818,7 @@ static void ppc_hw_interrupt(CPUPPCState *env) * EBB exception must be taken in problem state and * with BESCR_GE set. */ - if (msr_pr =3D=3D 1 && env->spr[SPR_BESCR] & BESCR_GE) { + if ((env->msr & M_MSR_PR) && (env->spr[SPR_BESCR] & BESCR_GE))= { env->pending_interrupts &=3D ~(1 << PPC_INTERRUPT_EBB); =20 if (env->spr[SPR_BESCR] & BESCR_PMEO) { @@ -2094,7 +2094,7 @@ static void do_ebb(CPUPPCState *env, int ebb_excp) env->spr[SPR_BESCR] |=3D BESCR_EEO; } =20 - if (msr_pr =3D=3D 1) { + if (env->msr & M_MSR_PR) { powerpc_excp(cpu, ebb_excp); } else { env->pending_interrupts |=3D 1 << PPC_INTERRUPT_EBB; diff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c index c4ff8fd632..bd219e9c9c 100644 --- a/target/ppc/mem_helper.c +++ b/target/ppc/mem_helper.c @@ -613,10 +613,10 @@ void helper_tbegin(CPUPPCState *env) (1ULL << TEXASR_FAILURE_PERSISTENT) | (1ULL << TEXASR_NESTING_OVERFLOW) | (msr_hv << TEXASR_PRIVILEGE_HV) | - (msr_pr << TEXASR_PRIVILEGE_PR) | + (!!(env->msr & M_MSR_PR) << TEXASR_PRIVILEGE_PR) | (1ULL << TEXASR_FAILURE_SUMMARY) | (1ULL << TEXASR_TFIAR_EXACT); - env->spr[SPR_TFIAR] =3D env->nip | (msr_hv << 1) | msr_pr; + env->spr[SPR_TFIAR] =3D env->nip | (msr_hv << 1) | !!(env->msr & M_MSR= _PR); env->spr[SPR_TFHAR] =3D env->nip + 4; env->crf[0] =3D 0xB; /* 0b1010 =3D transaction failure */ } diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c index 5414fd63c1..d7b8b97ee7 100644 --- a/target/ppc/mmu-radix64.c +++ b/target/ppc/mmu-radix64.c @@ -191,12 +191,12 @@ static bool ppc_radix64_check_prot(PowerPCCPU *cpu, M= MUAccessType access_type, } =20 /* Determine permissions allowed by Encoded Access Authority */ - if (!partition_scoped && (pte & R_PTE_EAA_PRIV) && msr_pr) { + if (!partition_scoped && (pte & R_PTE_EAA_PRIV) && (env->msr & M_MSR_P= R)) { *prot =3D 0; } else if (mmuidx_pr(mmu_idx) || (pte & R_PTE_EAA_PRIV) || partition_scoped) { *prot =3D ppc_radix64_get_prot_eaa(pte); - } else { /* !msr_pr && !(pte & R_PTE_EAA_PRIV) && !partition_scoped */ + } else { /* !M_MSR_PR && !(pte & R_PTE_EAA_PRIV) && !partition_scoped = */ *prot =3D ppc_radix64_get_prot_eaa(pte); *prot &=3D ppc_radix64_get_prot_amr(cpu); /* Least combined permis= sions */ } diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c index e9c5b14c0f..fef2b11733 100644 --- a/target/ppc/mmu_common.c +++ b/target/ppc/mmu_common.c @@ -273,8 +273,8 @@ static inline void bat_size_prot(CPUPPCState *env, targ= et_ulong *blp, bl =3D (*BATu & 0x00001FFC) << 15; valid =3D 0; prot =3D 0; - if (((msr_pr =3D=3D 0) && (*BATu & 0x00000002)) || - ((msr_pr !=3D 0) && (*BATu & 0x00000001))) { + if ((!(env->msr & M_MSR_PR) && (*BATu & 0x00000002)) || + ((env->msr & M_MSR_PR) && (*BATu & 0x00000001))) { valid =3D 1; pp =3D *BATl & 0x00000003; if (pp !=3D 0) { @@ -368,16 +368,17 @@ static int get_segment_6xx_tlb(CPUPPCState *env, mmu_= ctx_t *ctx, PowerPCCPU *cpu =3D env_archcpu(env); hwaddr hash; target_ulong vsid; - int ds, pr, target_page_bits; + int ds, target_page_bits; + bool pr; int ret; target_ulong sr, pgidx; =20 - pr =3D msr_pr; + pr =3D env->msr & M_MSR_PR; ctx->eaddr =3D eaddr; =20 sr =3D env->sr[eaddr >> 28]; - ctx->key =3D (((sr & 0x20000000) && (pr !=3D 0)) || - ((sr & 0x40000000) && (pr =3D=3D 0))) ? 1 : 0; + ctx->key =3D (((sr & 0x20000000) && pr) || + ((sr & 0x40000000) && !pr)) ? 1 : 0; ds =3D sr & 0x80000000 ? 1 : 0; ctx->nx =3D sr & 0x10000000 ? 1 : 0; vsid =3D sr & 0x00FFFFFF; @@ -386,8 +387,8 @@ static int get_segment_6xx_tlb(CPUPPCState *env, mmu_ct= x_t *ctx, "Check segment v=3D" TARGET_FMT_lx " %d " TARGET_FMT_lx " nip=3D" TARGET_FMT_lx " lr=3D" TARGET_FMT_lx " ir=3D%d dr=3D%d pr=3D%d %d t=3D%d\n", - eaddr, (int)(eaddr >> 28), sr, env->nip, env->lr, (int)m= sr_ir, - (int)msr_dr, pr !=3D 0 ? 1 : 0, + eaddr, (int)(eaddr >> 28), sr, env->nip, env->lr, + (int)msr_ir, (int)msr_dr, pr ? 1 : 0, access_type =3D=3D MMU_DATA_STORE, type); pgidx =3D (eaddr & ~SEGMENT_MASK_256M) >> target_page_bits; hash =3D vsid ^ pgidx; @@ -530,7 +531,7 @@ static int mmu40x_get_physical_address(CPUPPCState *env= , mmu_ctx_t *ctx, =20 ret =3D -1; raddr =3D (hwaddr)-1ULL; - pr =3D msr_pr; + pr =3D env->msr & M_MSR_PR; for (i =3D 0; i < env->nb_tlb; i++) { tlb =3D &env->tlb.tlbe[i]; if (ppcemb_tlb_check(env, tlb, &raddr, address, @@ -618,7 +619,7 @@ static int mmubooke_check_tlb(CPUPPCState *env, ppcemb_= tlb_t *tlb, =20 found_tlb: =20 - if (msr_pr !=3D 0) { + if (env->msr & M_MSR_PR) { prot2 =3D tlb->prot & 0xF; } else { prot2 =3D (tlb->prot >> 4) & 0xF; @@ -768,7 +769,7 @@ static bool mmubooke206_get_as(CPUPPCState *env, return true; } else { *as_out =3D msr_ds; - *pr_out =3D msr_pr; + *pr_out =3D env->msr & M_MSR_PR; return false; } } --=20 2.25.1 From nobody Mon May 6 16:25:59 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650654949482633.2788656278462; Fri, 22 Apr 2022 12:15:49 -0700 (PDT) Received: from localhost ([::1]:42464 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhyku-0003L9-3X for importer2@patchew.org; Fri, 22 Apr 2022 15:15:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:44730) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhyR2-0002Cc-2D; Fri, 22 Apr 2022 14:55:16 -0400 Received: from [187.72.171.209] (port=52505 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhyR0-0000CU-8C; Fri, 22 Apr 2022 14:55:15 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Fri, 22 Apr 2022 15:54:54 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id 12D6D80060F; Fri, 22 Apr 2022 15:54:54 -0300 (-03) From: =?UTF-8?q?V=C3=ADctor=20Colombo?= To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 04/20] target/ppc: Substitute msr_le macro with new M_MSR_LE macro Date: Fri, 22 Apr 2022 15:54:34 -0300 Message-Id: <20220422185450.107256-5-victor.colombo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422185450.107256-1-victor.colombo@eldorado.org.br> References: <20220422185450.107256-1-victor.colombo@eldorado.org.br> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-OriginalArrivalTime: 22 Apr 2022 18:54:54.0311 (UTC) FILETIME=[7435C770:01D8567A] X-Host-Lookup-Failed: Reverse DNS lookup failed for 187.72.171.209 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=187.72.171.209; envelope-from=victor.colombo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, richard.henderson@linaro.org, groug@kaod.org, victor.colombo@eldorado.org.br, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1650654949865100001 Suggested-by: Richard Henderson Signed-off-by: V=C3=ADctor Colombo --- target/ppc/cpu.h | 2 +- target/ppc/cpu_init.c | 2 +- target/ppc/gdbstub.c | 2 +- target/ppc/mem_helper.c | 16 ++++++++-------- 4 files changed, 11 insertions(+), 11 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 2ad023e981..d25a778b7c 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -354,6 +354,7 @@ typedef enum { #define MSR_LE 0 /* Little-endian mode 1 hfla= gs */ =20 #define M_MSR_PR (1ull << MSR_PR) +#define M_MSR_LE (1ull << MSR_LE) =20 /* PMU bits */ #define MMCR0_FC PPC_BIT(32) /* Freeze Counters */ @@ -484,7 +485,6 @@ typedef enum { #define msr_ir ((env->msr >> MSR_IR) & 1) #define msr_dr ((env->msr >> MSR_DR) & 1) #define msr_ds ((env->msr >> MSR_DS) & 1) -#define msr_le ((env->msr >> MSR_LE) & 1) #define msr_ts ((env->msr >> MSR_TS1) & 3) =20 #define DBCR0_ICMP (1 << 27) diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 6e2b23a859..9dddc0e8f6 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -7210,7 +7210,7 @@ static bool ppc_cpu_is_big_endian(CPUState *cs) =20 cpu_synchronize_state(cs); =20 - return !msr_le; + return !(env->msr & M_MSR_LE); } =20 #ifdef CONFIG_TCG diff --git a/target/ppc/gdbstub.c b/target/ppc/gdbstub.c index 1252429a2a..df1dcd90f0 100644 --- a/target/ppc/gdbstub.c +++ b/target/ppc/gdbstub.c @@ -95,7 +95,7 @@ static int ppc_gdb_register_len(int n) void ppc_maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len) { #ifndef CONFIG_USER_ONLY - if (!msr_le) { + if (!(env->msr & M_MSR_LE)) { /* do nothing */ } else if (len =3D=3D 4) { bswap32s((uint32_t *)mem_buf); diff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c index bd219e9c9c..8ff99a6568 100644 --- a/target/ppc/mem_helper.c +++ b/target/ppc/mem_helper.c @@ -33,9 +33,9 @@ static inline bool needs_byteswap(const CPUPPCState *env) { #if TARGET_BIG_ENDIAN - return msr_le; + return env->msr & M_MSR_LE; #else - return !msr_le; + return !(env->msr & M_MSR_LE); #endif } =20 @@ -470,8 +470,8 @@ uint32_t helper_stqcx_be_parallel(CPUPPCState *env, tar= get_ulong addr, #endif =20 /* - * We use msr_le to determine index ordering in a vector. However, - * byteswapping is not simply controlled by msr_le. We also need to + * We use MSR_LE to determine index ordering in a vector. However, + * byteswapping is not simply controlled by MSR_LE. We also need to * take into account endianness of the target. This is done for the * little-endian PPC64 user-mode target. */ @@ -484,7 +484,7 @@ uint32_t helper_stqcx_be_parallel(CPUPPCState *env, tar= get_ulong addr, int adjust =3D HI_IDX * (n_elems - 1); \ int sh =3D sizeof(r->element[0]) >> 1; \ int index =3D (addr & 0xf) >> sh; \ - if (msr_le) { \ + if (env->msr & M_MSR_LE) { \ index =3D n_elems - index - 1; \ } \ \ @@ -511,7 +511,7 @@ LVE(lvewx, cpu_ldl_data_ra, bswap32, u32) int adjust =3D HI_IDX * (n_elems - 1); \ int sh =3D sizeof(r->element[0]) >> 1; \ int index =3D (addr & 0xf) >> sh; \ - if (msr_le) { \ + if (env->msr & M_MSR_LE) { \ index =3D n_elems - index - 1; \ } \ \ @@ -545,7 +545,7 @@ void helper_##name(CPUPPCState *env, target_ulong addr,= \ t.s128 =3D int128_zero(); \ if (nb) { \ nb =3D (nb >=3D 16) ? 16 : nb; = \ - if (msr_le && !lj) { \ + if ((env->msr & M_MSR_LE) && !lj) { \ for (i =3D 16; i > 16 - nb; i--) { \ t.VsrB(i - 1) =3D cpu_ldub_data_ra(env, addr, GETPC()); \ addr =3D addr_add(env, addr, 1); \ @@ -576,7 +576,7 @@ void helper_##name(CPUPPCState *env, target_ulong addr,= \ } \ \ nb =3D (nb >=3D 16) ? 16 : nb; \ - if (msr_le && !lj) { \ + if ((env->msr & M_MSR_LE) && !lj) { \ for (i =3D 16; i > 16 - nb; i--) { \ cpu_stb_data_ra(env, addr, xt->VsrB(i - 1), GETPC()); \ addr =3D addr_add(env, addr, 1); \ --=20 2.25.1 From nobody Mon May 6 16:25:59 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650654133299519.2935819045967; Fri, 22 Apr 2022 12:02:13 -0700 (PDT) Received: from localhost ([::1]:37096 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhyXk-0004Rf-5K for importer2@patchew.org; Fri, 22 Apr 2022 15:02:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:44754) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhyR5-0002KL-Dc; Fri, 22 Apr 2022 14:55:19 -0400 Received: from [187.72.171.209] (port=52505 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhyR3-0000CU-2B; Fri, 22 Apr 2022 14:55:19 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Fri, 22 Apr 2022 15:54:54 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id 2695280031F; Fri, 22 Apr 2022 15:54:54 -0300 (-03) From: =?UTF-8?q?V=C3=ADctor=20Colombo?= To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 05/20] target/ppc: Substitute msr_ds macro with new M_MSR_DS macro Date: Fri, 22 Apr 2022 15:54:35 -0300 Message-Id: <20220422185450.107256-6-victor.colombo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422185450.107256-1-victor.colombo@eldorado.org.br> References: <20220422185450.107256-1-victor.colombo@eldorado.org.br> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-OriginalArrivalTime: 22 Apr 2022 18:54:54.0452 (UTC) FILETIME=[744B4B40:01D8567A] X-Host-Lookup-Failed: Reverse DNS lookup failed for 187.72.171.209 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=187.72.171.209; envelope-from=victor.colombo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, richard.henderson@linaro.org, groug@kaod.org, victor.colombo@eldorado.org.br, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1650654134052100001 Suggested-by: Richard Henderson Signed-off-by: V=C3=ADctor Colombo --- target/ppc/cpu.h | 2 +- target/ppc/mmu_common.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index d25a778b7c..e81f1f2d68 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -354,6 +354,7 @@ typedef enum { #define MSR_LE 0 /* Little-endian mode 1 hfla= gs */ =20 #define M_MSR_PR (1ull << MSR_PR) +#define M_MSR_DS (1ull << MSR_DS) #define M_MSR_LE (1ull << MSR_LE) =20 /* PMU bits */ @@ -484,7 +485,6 @@ typedef enum { #define msr_ep ((env->msr >> MSR_EP) & 1) #define msr_ir ((env->msr >> MSR_IR) & 1) #define msr_dr ((env->msr >> MSR_DR) & 1) -#define msr_ds ((env->msr >> MSR_DS) & 1) #define msr_ts ((env->msr >> MSR_TS1) & 3) =20 #define DBCR0_ICMP (1 << 27) diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c index fef2b11733..b7865d24b2 100644 --- a/target/ppc/mmu_common.c +++ b/target/ppc/mmu_common.c @@ -768,7 +768,7 @@ static bool mmubooke206_get_as(CPUPPCState *env, *pr_out =3D !!(epidr & EPID_EPR); return true; } else { - *as_out =3D msr_ds; + *as_out =3D env->msr & M_MSR_DS; *pr_out =3D env->msr & M_MSR_PR; return false; } --=20 2.25.1 From nobody Mon May 6 16:25:59 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650654891411251.69470583500254; Fri, 22 Apr 2022 12:14:51 -0700 (PDT) Received: from localhost ([::1]:40226 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhyjy-0001rz-Ei for importer2@patchew.org; Fri, 22 Apr 2022 15:14:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:44774) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhyR8-0002Sf-9Y; Fri, 22 Apr 2022 14:55:22 -0400 Received: from [187.72.171.209] (port=52505 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhyR6-0000CU-UP; Fri, 22 Apr 2022 14:55:22 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Fri, 22 Apr 2022 15:54:54 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id 478D5800902; Fri, 22 Apr 2022 15:54:54 -0300 (-03) From: =?UTF-8?q?V=C3=ADctor=20Colombo?= To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 06/20] target/ppc: Substitute msr_ile macro with new M_MSR_ILE macro Date: Fri, 22 Apr 2022 15:54:36 -0300 Message-Id: <20220422185450.107256-7-victor.colombo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422185450.107256-1-victor.colombo@eldorado.org.br> References: <20220422185450.107256-1-victor.colombo@eldorado.org.br> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-OriginalArrivalTime: 22 Apr 2022 18:54:54.0499 (UTC) FILETIME=[74527730:01D8567A] X-Host-Lookup-Failed: Reverse DNS lookup failed for 187.72.171.209 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=187.72.171.209; envelope-from=victor.colombo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, richard.henderson@linaro.org, groug@kaod.org, victor.colombo@eldorado.org.br, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1650654893547100001 Suggested-by: Richard Henderson Signed-off-by: V=C3=ADctor Colombo --- target/ppc/cpu.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index e81f1f2d68..95c28c3c1b 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -353,6 +353,7 @@ typedef enum { #define MSR_RI 1 /* Recoverable interrupt 1 = */ #define MSR_LE 0 /* Little-endian mode 1 hfla= gs */ =20 +#define M_MSR_ILE (1ull << MSR_ILE) #define M_MSR_PR (1ull << MSR_PR) #define M_MSR_DS (1ull << MSR_DS) #define M_MSR_LE (1ull << MSR_LE) @@ -476,7 +477,6 @@ typedef enum { #define msr_gs ((env->msr >> MSR_GS) & 1) #define msr_pow ((env->msr >> MSR_POW) & 1) #define msr_ce ((env->msr >> MSR_CE) & 1) -#define msr_ile ((env->msr >> MSR_ILE) & 1) #define msr_ee ((env->msr >> MSR_EE) & 1) #define msr_fp ((env->msr >> MSR_FP) & 1) #define msr_me ((env->msr >> MSR_ME) & 1) @@ -2677,7 +2677,7 @@ static inline bool ppc_interrupts_little_endian(Power= PCCPU *cpu, bool hv) } else if (pcc->lpcr_mask & LPCR_ILE) { ile =3D !!(env->spr[SPR_LPCR] & LPCR_ILE); } else { - ile =3D !!(msr_ile); + ile =3D !!(env->msr & M_MSR_ILE); } =20 return ile; --=20 2.25.1 From nobody Mon May 6 16:25:59 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650655174518395.5552500732563; Fri, 22 Apr 2022 12:19:34 -0700 (PDT) Received: from localhost ([::1]:49128 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhyoX-0007rN-Gh for importer2@patchew.org; Fri, 22 Apr 2022 15:19:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:44980) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhySA-0004SV-2U; Fri, 22 Apr 2022 14:56:26 -0400 Received: from [187.72.171.209] (port=10601 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhyS8-0000Zc-AH; Fri, 22 Apr 2022 14:56:25 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Fri, 22 Apr 2022 15:54:54 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id 59E5080060F; Fri, 22 Apr 2022 15:54:54 -0300 (-03) From: =?UTF-8?q?V=C3=ADctor=20Colombo?= To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 07/20] target/ppc: Substitute msr_ee macro with new M_MSR_EE macro Date: Fri, 22 Apr 2022 15:54:37 -0300 Message-Id: <20220422185450.107256-8-victor.colombo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422185450.107256-1-victor.colombo@eldorado.org.br> References: <20220422185450.107256-1-victor.colombo@eldorado.org.br> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-OriginalArrivalTime: 22 Apr 2022 18:54:54.0624 (UTC) FILETIME=[74658A00:01D8567A] X-Host-Lookup-Failed: Reverse DNS lookup failed for 187.72.171.209 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=187.72.171.209; envelope-from=victor.colombo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, richard.henderson@linaro.org, groug@kaod.org, victor.colombo@eldorado.org.br, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1650655175224100001 Suggested-by: Richard Henderson Signed-off-by: V=C3=ADctor Colombo --- target/ppc/cpu.h | 2 +- target/ppc/cpu_init.c | 15 ++++++++++----- target/ppc/excp_helper.c | 2 +- target/ppc/kvm.c | 3 ++- 4 files changed, 14 insertions(+), 8 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 95c28c3c1b..bfde66ed66 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -354,6 +354,7 @@ typedef enum { #define MSR_LE 0 /* Little-endian mode 1 hfla= gs */ =20 #define M_MSR_ILE (1ull << MSR_ILE) +#define M_MSR_EE (1ull << MSR_EE) #define M_MSR_PR (1ull << MSR_PR) #define M_MSR_DS (1ull << MSR_DS) #define M_MSR_LE (1ull << MSR_LE) @@ -477,7 +478,6 @@ typedef enum { #define msr_gs ((env->msr >> MSR_GS) & 1) #define msr_pow ((env->msr >> MSR_POW) & 1) #define msr_ce ((env->msr >> MSR_CE) & 1) -#define msr_ee ((env->msr >> MSR_EE) & 1) #define msr_fp ((env->msr >> MSR_FP) & 1) #define msr_me ((env->msr >> MSR_ME) & 1) #define msr_fe0 ((env->msr >> MSR_FE0) & 1) diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 9dddc0e8f6..4d949ab1f1 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -5949,7 +5949,8 @@ static bool cpu_has_work_POWER7(CPUState *cs) } return false; } else { - return msr_ee && (cs->interrupt_request & CPU_INTERRUPT_HARD); + return (env->msr & M_MSR_EE) && + (cs->interrupt_request & CPU_INTERRUPT_HARD); } } =20 @@ -6120,7 +6121,8 @@ static bool cpu_has_work_POWER8(CPUState *cs) } return false; } else { - return msr_ee && (cs->interrupt_request & CPU_INTERRUPT_HARD); + return (env->msr & M_MSR_EE) && + (cs->interrupt_request & CPU_INTERRUPT_HARD); } } =20 @@ -6337,7 +6339,8 @@ static bool cpu_has_work_POWER9(CPUState *cs) } return false; } else { - return msr_ee && (cs->interrupt_request & CPU_INTERRUPT_HARD); + return (env->msr & M_MSR_EE) && + (cs->interrupt_request & CPU_INTERRUPT_HARD); } } =20 @@ -6551,7 +6554,8 @@ static bool cpu_has_work_POWER10(CPUState *cs) } return false; } else { - return msr_ee && (cs->interrupt_request & CPU_INTERRUPT_HARD); + return (env->msr & M_MSR_EE) && + (cs->interrupt_request & CPU_INTERRUPT_HARD); } } =20 @@ -7119,7 +7123,8 @@ static bool ppc_cpu_has_work(CPUState *cs) PowerPCCPU *cpu =3D POWERPC_CPU(cs); CPUPPCState *env =3D &cpu->env; =20 - return msr_ee && (cs->interrupt_request & CPU_INTERRUPT_HARD); + return (env->msr & M_MSR_EE) && + (cs->interrupt_request & CPU_INTERRUPT_HARD); } =20 static void ppc_cpu_reset(DeviceState *dev) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 10cd381be2..39d1c2a543 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -1709,7 +1709,7 @@ static void ppc_hw_interrupt(CPUPPCState *env) * clear when coming out of some power management states (in order * for them to become a 0x100). */ - async_deliver =3D (msr_ee !=3D 0) || env->resume_as_sreset; + async_deliver =3D (env->msr & M_MSR_EE) || env->resume_as_sreset; =20 /* Hypervisor decrementer exception */ if (env->pending_interrupts & (1 << PPC_INTERRUPT_HDECR)) { diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index a3c31b4e48..1ca18f21b2 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -1351,7 +1351,8 @@ static int kvmppc_handle_halt(PowerPCCPU *cpu) CPUState *cs =3D CPU(cpu); CPUPPCState *env =3D &cpu->env; =20 - if (!(cs->interrupt_request & CPU_INTERRUPT_HARD) && (msr_ee)) { + if (!(cs->interrupt_request & CPU_INTERRUPT_HARD) && + (env->msr & M_MSR_EE)) { cs->halted =3D 1; cs->exception_index =3D EXCP_HLT; } --=20 2.25.1 From nobody Mon May 6 16:25:59 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650655245442653.422429611967; Fri, 22 Apr 2022 12:20:45 -0700 (PDT) Received: from localhost ([::1]:51646 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhypg-00017D-C7 for importer2@patchew.org; Fri, 22 Apr 2022 15:20:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:44998) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhySC-0004aM-KY; Fri, 22 Apr 2022 14:56:28 -0400 Received: from [187.72.171.209] (port=10601 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhySB-0000Zc-2M; Fri, 22 Apr 2022 14:56:28 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Fri, 22 Apr 2022 15:54:54 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id 7740B80031F; Fri, 22 Apr 2022 15:54:54 -0300 (-03) From: =?UTF-8?q?V=C3=ADctor=20Colombo?= To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 08/20] target/ppc: Substitute msr_ce macro with new M_MSR_CE macro Date: Fri, 22 Apr 2022 15:54:38 -0300 Message-Id: <20220422185450.107256-9-victor.colombo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422185450.107256-1-victor.colombo@eldorado.org.br> References: <20220422185450.107256-1-victor.colombo@eldorado.org.br> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-OriginalArrivalTime: 22 Apr 2022 18:54:54.0733 (UTC) FILETIME=[74762BD0:01D8567A] X-Host-Lookup-Failed: Reverse DNS lookup failed for 187.72.171.209 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=187.72.171.209; envelope-from=victor.colombo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, richard.henderson@linaro.org, groug@kaod.org, victor.colombo@eldorado.org.br, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1650655245920100001 Suggested-by: Richard Henderson Signed-off-by: V=C3=ADctor Colombo --- target/ppc/cpu.h | 2 +- target/ppc/excp_helper.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index bfde66ed66..3f10c1f5b2 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -353,6 +353,7 @@ typedef enum { #define MSR_RI 1 /* Recoverable interrupt 1 = */ #define MSR_LE 0 /* Little-endian mode 1 hfla= gs */ =20 +#define M_MSR_CE (1ull << MSR_CE) #define M_MSR_ILE (1ull << MSR_ILE) #define M_MSR_EE (1ull << MSR_EE) #define M_MSR_PR (1ull << MSR_PR) @@ -477,7 +478,6 @@ typedef enum { #define msr_cm ((env->msr >> MSR_CM) & 1) #define msr_gs ((env->msr >> MSR_GS) & 1) #define msr_pow ((env->msr >> MSR_POW) & 1) -#define msr_ce ((env->msr >> MSR_CE) & 1) #define msr_fp ((env->msr >> MSR_FP) & 1) #define msr_me ((env->msr >> MSR_ME) & 1) #define msr_fe0 ((env->msr >> MSR_FE0) & 1) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 39d1c2a543..6dcaa79516 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -1748,7 +1748,7 @@ static void ppc_hw_interrupt(CPUPPCState *env) return; } } - if (msr_ce !=3D 0) { + if (env->msr & M_MSR_CE) { /* External critical interrupt */ if (env->pending_interrupts & (1 << PPC_INTERRUPT_CEXT)) { powerpc_excp(cpu, POWERPC_EXCP_CRITICAL); --=20 2.25.1 From nobody Mon May 6 16:25:59 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650654456895343.4311529629491; Fri, 22 Apr 2022 12:07:36 -0700 (PDT) Received: from localhost ([::1]:50568 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhycx-0005w1-90 for importer2@patchew.org; Fri, 22 Apr 2022 15:07:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45030) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhySG-0004lC-2R; Fri, 22 Apr 2022 14:56:32 -0400 Received: from [187.72.171.209] (port=10601 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhySD-0000Zc-EU; Fri, 22 Apr 2022 14:56:30 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Fri, 22 Apr 2022 15:54:54 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id 9564E800902; Fri, 22 Apr 2022 15:54:54 -0300 (-03) From: =?UTF-8?q?V=C3=ADctor=20Colombo?= To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 09/20] target/ppc: Substitute msr_pow macro with new M_MSR_POW macro Date: Fri, 22 Apr 2022 15:54:39 -0300 Message-Id: <20220422185450.107256-10-victor.colombo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422185450.107256-1-victor.colombo@eldorado.org.br> References: <20220422185450.107256-1-victor.colombo@eldorado.org.br> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-OriginalArrivalTime: 22 Apr 2022 18:54:54.0889 (UTC) FILETIME=[748DF990:01D8567A] X-Host-Lookup-Failed: Reverse DNS lookup failed for 187.72.171.209 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=187.72.171.209; envelope-from=victor.colombo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, richard.henderson@linaro.org, groug@kaod.org, victor.colombo@eldorado.org.br, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1650654459280100001 Suggested-by: Richard Henderson Signed-off-by: V=C3=ADctor Colombo --- target/ppc/cpu.h | 2 +- target/ppc/excp_helper.c | 12 ++++++------ target/ppc/helper_regs.c | 2 +- 3 files changed, 8 insertions(+), 8 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 3f10c1f5b2..b79c00dd65 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -353,6 +353,7 @@ typedef enum { #define MSR_RI 1 /* Recoverable interrupt 1 = */ #define MSR_LE 0 /* Little-endian mode 1 hfla= gs */ =20 +#define M_MSR_POW (1ull << MSR_POW) #define M_MSR_CE (1ull << MSR_CE) #define M_MSR_ILE (1ull << MSR_ILE) #define M_MSR_EE (1ull << MSR_EE) @@ -477,7 +478,6 @@ typedef enum { #endif #define msr_cm ((env->msr >> MSR_CM) & 1) #define msr_gs ((env->msr >> MSR_GS) & 1) -#define msr_pow ((env->msr >> MSR_POW) & 1) #define msr_fp ((env->msr >> MSR_FP) & 1) #define msr_me ((env->msr >> MSR_ME) & 1) #define msr_fe0 ((env->msr >> MSR_FE0) & 1) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 6dcaa79516..91af089d2e 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -661,7 +661,7 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp) case POWERPC_EXCP_ITLB: /* Instruction TLB error = */ break; case POWERPC_EXCP_RESET: /* System reset exception = */ - if (msr_pow) { + if (env->msr & M_MSR_POW) { cpu_abort(cs, "Trying to deliver power-saving system reset " "exception %d with no HV support\n", excp); } @@ -853,7 +853,7 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp) case POWERPC_EXCP_DECR: /* Decrementer exception = */ break; case POWERPC_EXCP_RESET: /* System reset exception = */ - if (msr_pow) { + if (env->msr & M_MSR_POW) { cpu_abort(cs, "Trying to deliver power-saving system reset " "exception %d with no HV support\n", excp); } @@ -1038,7 +1038,7 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int ex= cp) case POWERPC_EXCP_DECR: /* Decrementer exception = */ break; case POWERPC_EXCP_RESET: /* System reset exception = */ - if (msr_pow) { + if (env->msr & M_MSR_POW) { cpu_abort(cs, "Trying to deliver power-saving system reset " "exception %d with no HV support\n", excp); } @@ -1248,7 +1248,7 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int e= xcp) env->spr[SPR_BOOKE_ESR] =3D ESR_SPV; break; case POWERPC_EXCP_RESET: /* System reset exception = */ - if (msr_pow) { + if (env->msr & M_MSR_POW) { cpu_abort(cs, "Trying to deliver power-saving system reset " "exception %d with no HV support\n", excp); } @@ -1507,7 +1507,7 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int e= xcp) break; case POWERPC_EXCP_RESET: /* System reset exception = */ /* A power-saving exception sets ME, otherwise it is unchanged */ - if (msr_pow) { + if (env->msr & M_MSR_POW) { /* indicate that we resumed from power save mode */ msr |=3D 0x10000; new_msr |=3D ((target_ulong)1 << MSR_ME); @@ -1519,7 +1519,7 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int e= xcp) */ new_msr |=3D (target_ulong)MSR_HVB; } else { - if (msr_pow) { + if (env->msr & M_MSR_POW) { cpu_abort(cs, "Trying to deliver power-saving system reset= " "exception %d with no HV support\n", excp); } diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c index 9a691d6833..a9bedfce50 100644 --- a/target/ppc/helper_regs.c +++ b/target/ppc/helper_regs.c @@ -261,7 +261,7 @@ int hreg_store_msr(CPUPPCState *env, target_ulong value= , int alter_hv) env->msr =3D value; hreg_compute_hflags(env); #if !defined(CONFIG_USER_ONLY) - if (unlikely(msr_pow =3D=3D 1)) { + if (unlikely(env->msr & M_MSR_POW)) { if (!env->pending_interrupts && (*env->check_pow)(env)) { cs->halted =3D 1; excp =3D EXCP_HALTED; --=20 2.25.1 From nobody Mon May 6 16:25:59 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650654461859431.7143416640812; Fri, 22 Apr 2022 12:07:41 -0700 (PDT) Received: from localhost ([::1]:51048 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhyd2-0006Tj-Pf for importer2@patchew.org; Fri, 22 Apr 2022 15:07:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45054) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhySI-0004vv-Kw; Fri, 22 Apr 2022 14:56:34 -0400 Received: from [187.72.171.209] (port=10601 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhySG-0000Zc-0F; Fri, 22 Apr 2022 14:56:33 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Fri, 22 Apr 2022 15:54:54 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id AD62480060F; Fri, 22 Apr 2022 15:54:54 -0300 (-03) From: =?UTF-8?q?V=C3=ADctor=20Colombo?= To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 10/20] target/ppc: Substitute msr_me macro with new M_MSR_ME macro Date: Fri, 22 Apr 2022 15:54:40 -0300 Message-Id: <20220422185450.107256-11-victor.colombo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422185450.107256-1-victor.colombo@eldorado.org.br> References: <20220422185450.107256-1-victor.colombo@eldorado.org.br> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-OriginalArrivalTime: 22 Apr 2022 18:54:54.0999 (UTC) FILETIME=[749EC270:01D8567A] X-Host-Lookup-Failed: Reverse DNS lookup failed for 187.72.171.209 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=187.72.171.209; envelope-from=victor.colombo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, richard.henderson@linaro.org, groug@kaod.org, victor.colombo@eldorado.org.br, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1650654463299100001 Suggested-by: Richard Henderson Signed-off-by: V=C3=ADctor Colombo --- target/ppc/cpu.h | 2 +- target/ppc/excp_helper.c | 12 ++++++------ 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index b79c00dd65..aa20a604ab 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -358,6 +358,7 @@ typedef enum { #define M_MSR_ILE (1ull << MSR_ILE) #define M_MSR_EE (1ull << MSR_EE) #define M_MSR_PR (1ull << MSR_PR) +#define M_MSR_ME (1ull << MSR_ME) #define M_MSR_DS (1ull << MSR_DS) #define M_MSR_LE (1ull << MSR_LE) =20 @@ -479,7 +480,6 @@ typedef enum { #define msr_cm ((env->msr >> MSR_CM) & 1) #define msr_gs ((env->msr >> MSR_GS) & 1) #define msr_fp ((env->msr >> MSR_FP) & 1) -#define msr_me ((env->msr >> MSR_ME) & 1) #define msr_fe0 ((env->msr >> MSR_FE0) & 1) #define msr_fe1 ((env->msr >> MSR_FE1) & 1) #define msr_ep ((env->msr >> MSR_EP) & 1) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 91af089d2e..0548b493a7 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -444,7 +444,7 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp) srr1 =3D SPR_40x_SRR3; break; case POWERPC_EXCP_MCHECK: /* Machine check exception = */ - if (msr_me =3D=3D 0) { + if (!(env->msr & M_MSR_ME)) { /* * Machine check exception is not enabled. Enter * checkstop state. @@ -575,7 +575,7 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp) case POWERPC_EXCP_CRITICAL: /* Critical input = */ break; case POWERPC_EXCP_MCHECK: /* Machine check exception = */ - if (msr_me =3D=3D 0) { + if (!(env->msr & M_MSR_ME)) { /* * Machine check exception is not enabled. Enter * checkstop state. @@ -748,7 +748,7 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp) =20 switch (excp) { case POWERPC_EXCP_MCHECK: /* Machine check exception = */ - if (msr_me =3D=3D 0) { + if (!(env->msr & M_MSR_ME)) { /* * Machine check exception is not enabled. Enter * checkstop state. @@ -933,7 +933,7 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp) =20 switch (excp) { case POWERPC_EXCP_MCHECK: /* Machine check exception = */ - if (msr_me =3D=3D 0) { + if (!(env->msr & M_MSR_ME)) { /* * Machine check exception is not enabled. Enter * checkstop state. @@ -1128,7 +1128,7 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int e= xcp) srr1 =3D SPR_BOOKE_CSRR1; break; case POWERPC_EXCP_MCHECK: /* Machine check exception = */ - if (msr_me =3D=3D 0) { + if (!(env->msr & M_MSR_ME)) { /* * Machine check exception is not enabled. Enter * checkstop state. @@ -1366,7 +1366,7 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int e= xcp) =20 switch (excp) { case POWERPC_EXCP_MCHECK: /* Machine check exception = */ - if (msr_me =3D=3D 0) { + if (!(env->msr & M_MSR_ME)) { /* * Machine check exception is not enabled. Enter * checkstop state. --=20 2.25.1 From nobody Mon May 6 16:25:59 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650654672939382.32279212467324; Fri, 22 Apr 2022 12:11:12 -0700 (PDT) Received: from localhost ([::1]:59986 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhygR-0004dl-Sq for importer2@patchew.org; Fri, 22 Apr 2022 15:11:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45074) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhySL-00051A-7G; Fri, 22 Apr 2022 14:56:37 -0400 Received: from [187.72.171.209] (port=10601 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhySI-0000Zc-K4; Fri, 22 Apr 2022 14:56:35 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Fri, 22 Apr 2022 15:54:55 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id CC77980031F; Fri, 22 Apr 2022 15:54:54 -0300 (-03) From: =?UTF-8?q?V=C3=ADctor=20Colombo?= To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 11/20] target/ppc: Substitute msr_gs macro with new M_MSR_GS macro Date: Fri, 22 Apr 2022 15:54:41 -0300 Message-Id: <20220422185450.107256-12-victor.colombo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422185450.107256-1-victor.colombo@eldorado.org.br> References: <20220422185450.107256-1-victor.colombo@eldorado.org.br> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-OriginalArrivalTime: 22 Apr 2022 18:54:55.0077 (UTC) FILETIME=[74AAA950:01D8567A] X-Host-Lookup-Failed: Reverse DNS lookup failed for 187.72.171.209 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=187.72.171.209; envelope-from=victor.colombo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, richard.henderson@linaro.org, groug@kaod.org, victor.colombo@eldorado.org.br, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1650654674312100001 Suggested-by: Richard Henderson Signed-off-by: V=C3=ADctor Colombo --- target/ppc/cpu.h | 2 +- target/ppc/helper_regs.c | 2 +- target/ppc/mmu_helper.c | 4 ++-- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index aa20a604ab..15f5d059a3 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -353,6 +353,7 @@ typedef enum { #define MSR_RI 1 /* Recoverable interrupt 1 = */ #define MSR_LE 0 /* Little-endian mode 1 hfla= gs */ =20 +#define M_MSR_GS (1ull << MSR_GS) #define M_MSR_POW (1ull << MSR_POW) #define M_MSR_CE (1ull << MSR_CE) #define M_MSR_ILE (1ull << MSR_ILE) @@ -478,7 +479,6 @@ typedef enum { #define msr_hv (0) #endif #define msr_cm ((env->msr >> MSR_CM) & 1) -#define msr_gs ((env->msr >> MSR_GS) & 1) #define msr_fp ((env->msr >> MSR_FP) & 1) #define msr_fe0 ((env->msr >> MSR_FE0) & 1) #define msr_fe1 ((env->msr >> MSR_FE1) & 1) diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c index a9bedfce50..2742938abf 100644 --- a/target/ppc/helper_regs.c +++ b/target/ppc/helper_regs.c @@ -233,7 +233,7 @@ int hreg_store_msr(CPUPPCState *env, target_ulong value= , int alter_hv) } if ((env->mmu_model =3D=3D POWERPC_MMU_BOOKE || env->mmu_model =3D=3D POWERPC_MMU_BOOKE206) && - ((value >> MSR_GS) & 1) !=3D msr_gs) { + !(value & env->msr & M_MSR_GS)) { cpu_interrupt_exittb(cs); } if (unlikely((env->flags & POWERPC_FLAG_TGPR) && diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index 142a717255..9044b7b036 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -935,7 +935,7 @@ void helper_booke206_tlbwe(CPUPPCState *env) } =20 if (((env->spr[SPR_BOOKE_MAS0] & MAS0_ATSEL) =3D=3D MAS0_ATSEL_LRAT) && - !msr_gs) { + !(env->msr & M_MSR_GS)) { /* XXX we don't support direct LRAT setting yet */ fprintf(stderr, "cpu: don't support LRAT setting yet\n"); return; @@ -962,7 +962,7 @@ void helper_booke206_tlbwe(CPUPPCState *env) POWERPC_EXCP_INVAL_INVAL, GETPC()); } =20 - if (msr_gs) { + if (env->msr & M_MSR_GS) { cpu_abort(env_cpu(env), "missing HV implementation\n"); } =20 --=20 2.25.1 From nobody Mon May 6 16:25:59 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650654712721262.59528131431637; Fri, 22 Apr 2022 12:11:52 -0700 (PDT) Received: from localhost ([::1]:60760 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhyh5-000590-Mw for importer2@patchew.org; Fri, 22 Apr 2022 15:11:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45090) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhySN-00058B-KU; Fri, 22 Apr 2022 14:56:39 -0400 Received: from [187.72.171.209] (port=10601 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhySM-0000Zc-4D; Fri, 22 Apr 2022 14:56:39 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Fri, 22 Apr 2022 15:54:55 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id E0D54800902; Fri, 22 Apr 2022 15:54:54 -0300 (-03) From: =?UTF-8?q?V=C3=ADctor=20Colombo?= To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 12/20] target/ppc: Substitute msr_fp macro with new M_MSR_FP macro Date: Fri, 22 Apr 2022 15:54:42 -0300 Message-Id: <20220422185450.107256-13-victor.colombo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422185450.107256-1-victor.colombo@eldorado.org.br> References: <20220422185450.107256-1-victor.colombo@eldorado.org.br> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-OriginalArrivalTime: 22 Apr 2022 18:54:55.0186 (UTC) FILETIME=[74BB4B20:01D8567A] X-Host-Lookup-Failed: Reverse DNS lookup failed for 187.72.171.209 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=187.72.171.209; envelope-from=victor.colombo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, richard.henderson@linaro.org, groug@kaod.org, victor.colombo@eldorado.org.br, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1650654714549100003 Suggested-by: Richard Henderson Signed-off-by: V=C3=ADctor Colombo --- target/ppc/cpu.h | 2 +- target/ppc/excp_helper.c | 12 ++++++------ 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 15f5d059a3..634c05a9d2 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -359,6 +359,7 @@ typedef enum { #define M_MSR_ILE (1ull << MSR_ILE) #define M_MSR_EE (1ull << MSR_EE) #define M_MSR_PR (1ull << MSR_PR) +#define M_MSR_FP (1ull << MSR_FP) #define M_MSR_ME (1ull << MSR_ME) #define M_MSR_DS (1ull << MSR_DS) #define M_MSR_LE (1ull << MSR_LE) @@ -479,7 +480,6 @@ typedef enum { #define msr_hv (0) #endif #define msr_cm ((env->msr >> MSR_CM) & 1) -#define msr_fp ((env->msr >> MSR_FP) & 1) #define msr_fe0 ((env->msr >> MSR_FE0) & 1) #define msr_fe1 ((env->msr >> MSR_FE1) & 1) #define msr_ep ((env->msr >> MSR_EP) & 1) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 0548b493a7..3e52061cd6 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -478,7 +478,7 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp) case POWERPC_EXCP_PROGRAM: /* Program exception = */ switch (env->error_code & ~0xF) { case POWERPC_EXCP_FP: - if ((msr_fe0 =3D=3D 0 && msr_fe1 =3D=3D 0) || msr_fp =3D=3D 0)= { + if ((msr_fe0 =3D=3D 0 && msr_fe1 =3D=3D 0) || !(env->msr & M_M= SR_FP)) { trace_ppc_excp_fp_ignore(); powerpc_reset_excp_state(cpu); return; @@ -615,7 +615,7 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp) case POWERPC_EXCP_PROGRAM: /* Program exception = */ switch (env->error_code & ~0xF) { case POWERPC_EXCP_FP: - if ((msr_fe0 =3D=3D 0 && msr_fe1 =3D=3D 0) || msr_fp =3D=3D 0)= { + if ((msr_fe0 =3D=3D 0 && msr_fe1 =3D=3D 0) || !(env->msr & M_M= SR_FP)) { trace_ppc_excp_fp_ignore(); powerpc_reset_excp_state(cpu); return; @@ -788,7 +788,7 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp) case POWERPC_EXCP_PROGRAM: /* Program exception = */ switch (env->error_code & ~0xF) { case POWERPC_EXCP_FP: - if ((msr_fe0 =3D=3D 0 && msr_fe1 =3D=3D 0) || msr_fp =3D=3D 0)= { + if ((msr_fe0 =3D=3D 0 && msr_fe1 =3D=3D 0) || !(env->msr & M_M= SR_FP)) { trace_ppc_excp_fp_ignore(); powerpc_reset_excp_state(cpu); return; @@ -973,7 +973,7 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp) case POWERPC_EXCP_PROGRAM: /* Program exception = */ switch (env->error_code & ~0xF) { case POWERPC_EXCP_FP: - if ((msr_fe0 =3D=3D 0 && msr_fe1 =3D=3D 0) || msr_fp =3D=3D 0)= { + if ((msr_fe0 =3D=3D 0 && msr_fe1 =3D=3D 0) || !(env->msr & M_M= SR_FP)) { trace_ppc_excp_fp_ignore(); powerpc_reset_excp_state(cpu); return; @@ -1171,7 +1171,7 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int e= xcp) case POWERPC_EXCP_PROGRAM: /* Program exception = */ switch (env->error_code & ~0xF) { case POWERPC_EXCP_FP: - if ((msr_fe0 =3D=3D 0 && msr_fe1 =3D=3D 0) || msr_fp =3D=3D 0)= { + if ((msr_fe0 =3D=3D 0 && msr_fe1 =3D=3D 0) || !(env->msr & M_M= SR_FP)) { trace_ppc_excp_fp_ignore(); powerpc_reset_excp_state(cpu); return; @@ -1434,7 +1434,7 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int e= xcp) case POWERPC_EXCP_PROGRAM: /* Program exception = */ switch (env->error_code & ~0xF) { case POWERPC_EXCP_FP: - if ((msr_fe0 =3D=3D 0 && msr_fe1 =3D=3D 0) || msr_fp =3D=3D 0)= { + if ((msr_fe0 =3D=3D 0 && msr_fe1 =3D=3D 0) || !(env->msr & M_M= SR_FP)) { trace_ppc_excp_fp_ignore(); powerpc_reset_excp_state(cpu); return; --=20 2.25.1 From nobody Mon May 6 16:25:59 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650654903025337.7032188294976; Fri, 22 Apr 2022 12:15:03 -0700 (PDT) Received: from localhost ([::1]:40696 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhyk9-0002C2-RH for importer2@patchew.org; Fri, 22 Apr 2022 15:15:01 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45112) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhySQ-0005Ei-9y; Fri, 22 Apr 2022 14:56:42 -0400 Received: from [187.72.171.209] (port=10601 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhySO-0000Zc-Ne; Fri, 22 Apr 2022 14:56:41 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Fri, 22 Apr 2022 15:54:55 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id 0D98780060F; Fri, 22 Apr 2022 15:54:55 -0300 (-03) From: =?UTF-8?q?V=C3=ADctor=20Colombo?= To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 13/20] target/ppc: Substitute msr_cm macro with new M_MSR_CM macro Date: Fri, 22 Apr 2022 15:54:43 -0300 Message-Id: <20220422185450.107256-14-victor.colombo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422185450.107256-1-victor.colombo@eldorado.org.br> References: <20220422185450.107256-1-victor.colombo@eldorado.org.br> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-OriginalArrivalTime: 22 Apr 2022 18:54:55.0296 (UTC) FILETIME=[74CC1400:01D8567A] X-Host-Lookup-Failed: Reverse DNS lookup failed for 187.72.171.209 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=187.72.171.209; envelope-from=victor.colombo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, richard.henderson@linaro.org, groug@kaod.org, victor.colombo@eldorado.org.br, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1650654903780100001 Suggested-by: Richard Henderson Signed-off-by: V=C3=ADctor Colombo --- target/ppc/cpu.h | 2 +- target/ppc/mmu_common.c | 2 +- target/ppc/mmu_helper.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 634c05a9d2..e26530fa09 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -353,6 +353,7 @@ typedef enum { #define MSR_RI 1 /* Recoverable interrupt 1 = */ #define MSR_LE 0 /* Little-endian mode 1 hfla= gs */ =20 +#define M_MSR_CM (1ull << MSR_CM) #define M_MSR_GS (1ull << MSR_GS) #define M_MSR_POW (1ull << MSR_POW) #define M_MSR_CE (1ull << MSR_CE) @@ -479,7 +480,6 @@ typedef enum { #else #define msr_hv (0) #endif -#define msr_cm ((env->msr >> MSR_CM) & 1) #define msr_fe0 ((env->msr >> MSR_FE0) & 1) #define msr_fe1 ((env->msr >> MSR_FE1) & 1) #define msr_ep ((env->msr >> MSR_EP) & 1) diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c index b7865d24b2..a82649f2ff 100644 --- a/target/ppc/mmu_common.c +++ b/target/ppc/mmu_common.c @@ -692,7 +692,7 @@ int ppcmas_tlb_check(CPUPPCState *env, ppcmas_tlb_t *tl= b, hwaddr mask; uint32_t tlb_pid; =20 - if (!msr_cm) { + if (!(env->msr & M_MSR_CM)) { /* In 32bit mode we can only address 32bit EAs */ address =3D (uint32_t)address; } diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index 9044b7b036..6c49920d0a 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -1003,7 +1003,7 @@ void helper_booke206_tlbwe(CPUPPCState *env) /* Add a mask for page attributes */ mask |=3D MAS2_ACM | MAS2_VLE | MAS2_W | MAS2_I | MAS2_M | MAS2_G | MA= S2_E; =20 - if (!msr_cm) { + if (!(env->msr & M_MSR_CM)) { /* * Executing a tlbwe instruction in 32-bit mode will set bits * 0:31 of the TLB EPN field to zero. --=20 2.25.1 From nobody Mon May 6 16:25:59 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650655228515662.3651289071272; Fri, 22 Apr 2022 12:20:28 -0700 (PDT) Received: from localhost ([::1]:50636 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhypO-0000SO-Vt for importer2@patchew.org; Fri, 22 Apr 2022 15:20:27 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45148) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhyST-0005P7-2p; Fri, 22 Apr 2022 14:56:45 -0400 Received: from [187.72.171.209] (port=10601 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhySR-0000Zc-9l; Fri, 22 Apr 2022 14:56:44 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Fri, 22 Apr 2022 15:54:55 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id 21CB980031F; Fri, 22 Apr 2022 15:54:55 -0300 (-03) From: =?UTF-8?q?V=C3=ADctor=20Colombo?= To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 14/20] target/ppc: Substitute msr_ir macro with new M_MSR_IR macro Date: Fri, 22 Apr 2022 15:54:44 -0300 Message-Id: <20220422185450.107256-15-victor.colombo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422185450.107256-1-victor.colombo@eldorado.org.br> References: <20220422185450.107256-1-victor.colombo@eldorado.org.br> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-OriginalArrivalTime: 22 Apr 2022 18:54:55.0452 (UTC) FILETIME=[74E3E1C0:01D8567A] X-Host-Lookup-Failed: Reverse DNS lookup failed for 187.72.171.209 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=187.72.171.209; envelope-from=victor.colombo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, richard.henderson@linaro.org, groug@kaod.org, victor.colombo@eldorado.org.br, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1650655229729100003 Suggested-by: Richard Henderson Signed-off-by: V=C3=ADctor Colombo --- target/ppc/cpu.h | 2 +- target/ppc/helper_regs.c | 2 +- target/ppc/mmu_common.c | 11 ++++++----- 3 files changed, 8 insertions(+), 7 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index e26530fa09..cc0b5d72de 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -362,6 +362,7 @@ typedef enum { #define M_MSR_PR (1ull << MSR_PR) #define M_MSR_FP (1ull << MSR_FP) #define M_MSR_ME (1ull << MSR_ME) +#define M_MSR_IR (1ull << MSR_IR) #define M_MSR_DS (1ull << MSR_DS) #define M_MSR_LE (1ull << MSR_LE) =20 @@ -483,7 +484,6 @@ typedef enum { #define msr_fe0 ((env->msr >> MSR_FE0) & 1) #define msr_fe1 ((env->msr >> MSR_FE1) & 1) #define msr_ep ((env->msr >> MSR_EP) & 1) -#define msr_ir ((env->msr >> MSR_IR) & 1) #define msr_dr ((env->msr >> MSR_DR) & 1) #define msr_ts ((env->msr >> MSR_TS1) & 3) =20 diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c index 2742938abf..fa8f213cd5 100644 --- a/target/ppc/helper_regs.c +++ b/target/ppc/helper_regs.c @@ -227,7 +227,7 @@ int hreg_store_msr(CPUPPCState *env, target_ulong value= , int alter_hv) value &=3D ~MSR_HVB; value |=3D env->msr & MSR_HVB; } - if (((value >> MSR_IR) & 1) !=3D msr_ir || + if (!(value & env->msr & M_MSR_IR) || ((value >> MSR_DR) & 1) !=3D msr_dr) { cpu_interrupt_exittb(cs); } diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c index a82649f2ff..918c15f78d 100644 --- a/target/ppc/mmu_common.c +++ b/target/ppc/mmu_common.c @@ -388,7 +388,7 @@ static int get_segment_6xx_tlb(CPUPPCState *env, mmu_ct= x_t *ctx, " nip=3D" TARGET_FMT_lx " lr=3D" TARGET_FMT_lx " ir=3D%d dr=3D%d pr=3D%d %d t=3D%d\n", eaddr, (int)(eaddr >> 28), sr, env->nip, env->lr, - (int)msr_ir, (int)msr_dr, pr ? 1 : 0, + !!(env->msr & M_MSR_IR), (int)msr_dr, pr ? 1 : 0, access_type =3D=3D MMU_DATA_STORE, type); pgidx =3D (eaddr & ~SEGMENT_MASK_256M) >> target_page_bits; hash =3D vsid ^ pgidx; @@ -626,7 +626,8 @@ found_tlb: } =20 /* Check the address space */ - if ((access_type =3D=3D MMU_INST_FETCH ? msr_ir : msr_dr) !=3D (tlb->a= ttr & 1)) { + if ((access_type =3D=3D MMU_INST_FETCH ? + !!(env->msr & M_MSR_IR) : msr_dr) !=3D (tlb->attr & 1)) { qemu_log_mask(CPU_LOG_MMU, "%s: AS doesn't match\n", __func__); return -1; } @@ -839,7 +840,7 @@ found_tlb: if (access_type =3D=3D MMU_INST_FETCH) { /* There is no way to fetch code using epid load */ assert(!use_epid); - as =3D msr_ir; + as =3D env->msr & M_MSR_IR; } =20 if (as !=3D ((tlb->mas1 & MAS1_TS) >> MAS1_TS_SHIFT)) { @@ -1169,7 +1170,7 @@ int get_physical_address_wtlb(CPUPPCState *env, mmu_c= tx_t *ctx, int mmu_idx) { int ret =3D -1; - bool real_mode =3D (type =3D=3D ACCESS_CODE && msr_ir =3D=3D 0) + bool real_mode =3D (type =3D=3D ACCESS_CODE && !(env->msr & M_MSR_IR)) || (type !=3D ACCESS_CODE && msr_dr =3D=3D 0); =20 switch (env->mmu_model) { @@ -1231,7 +1232,7 @@ static void booke206_update_mas_tlb_miss(CPUPPCState = *env, target_ulong address, bool use_epid =3D mmubooke206_get_as(env, mmu_idx, &epid, &as, &pr); =20 if (access_type =3D=3D MMU_INST_FETCH) { - as =3D msr_ir; + as =3D env->msr & M_MSR_IR; } env->spr[SPR_BOOKE_MAS0] =3D env->spr[SPR_BOOKE_MAS4] & MAS4_TLBSELD_M= ASK; env->spr[SPR_BOOKE_MAS1] =3D env->spr[SPR_BOOKE_MAS4] & MAS4_TSIZED_MA= SK; --=20 2.25.1 From nobody Mon May 6 16:25:59 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 16506553567581013.7019231651371; Fri, 22 Apr 2022 12:22:36 -0700 (PDT) Received: from localhost ([::1]:57916 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhyrT-0005UJ-M2 for importer2@patchew.org; Fri, 22 Apr 2022 15:22:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45194) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhySV-0005Uy-In; Fri, 22 Apr 2022 14:56:52 -0400 Received: from [187.72.171.209] (port=10601 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhySU-0000Zc-2w; Fri, 22 Apr 2022 14:56:47 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Fri, 22 Apr 2022 15:54:55 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id 3C74F800902; Fri, 22 Apr 2022 15:54:55 -0300 (-03) From: =?UTF-8?q?V=C3=ADctor=20Colombo?= To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 15/20] target/ppc: Substitute msr_dr macro with new M_MSR_DR macro Date: Fri, 22 Apr 2022 15:54:45 -0300 Message-Id: <20220422185450.107256-16-victor.colombo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422185450.107256-1-victor.colombo@eldorado.org.br> References: <20220422185450.107256-1-victor.colombo@eldorado.org.br> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-OriginalArrivalTime: 22 Apr 2022 18:54:55.0514 (UTC) FILETIME=[74ED57A0:01D8567A] X-Host-Lookup-Failed: Reverse DNS lookup failed for 187.72.171.209 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=187.72.171.209; envelope-from=victor.colombo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, richard.henderson@linaro.org, groug@kaod.org, victor.colombo@eldorado.org.br, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1650655358470100001 Suggested-by: Richard Henderson Signed-off-by: V=C3=ADctor Colombo --- target/ppc/cpu.h | 2 +- target/ppc/helper_regs.c | 2 +- target/ppc/mmu_common.c | 6 +++--- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index cc0b5d72de..3a5218a2cd 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -363,6 +363,7 @@ typedef enum { #define M_MSR_FP (1ull << MSR_FP) #define M_MSR_ME (1ull << MSR_ME) #define M_MSR_IR (1ull << MSR_IR) +#define M_MSR_DR (1ull << MSR_DR) #define M_MSR_DS (1ull << MSR_DS) #define M_MSR_LE (1ull << MSR_LE) =20 @@ -484,7 +485,6 @@ typedef enum { #define msr_fe0 ((env->msr >> MSR_FE0) & 1) #define msr_fe1 ((env->msr >> MSR_FE1) & 1) #define msr_ep ((env->msr >> MSR_EP) & 1) -#define msr_dr ((env->msr >> MSR_DR) & 1) #define msr_ts ((env->msr >> MSR_TS1) & 3) =20 #define DBCR0_ICMP (1 << 27) diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c index fa8f213cd5..1c67fbf7c1 100644 --- a/target/ppc/helper_regs.c +++ b/target/ppc/helper_regs.c @@ -228,7 +228,7 @@ int hreg_store_msr(CPUPPCState *env, target_ulong value= , int alter_hv) value |=3D env->msr & MSR_HVB; } if (!(value & env->msr & M_MSR_IR) || - ((value >> MSR_DR) & 1) !=3D msr_dr) { + !(value & env->msr & M_MSR_DR)) { cpu_interrupt_exittb(cs); } if ((env->mmu_model =3D=3D POWERPC_MMU_BOOKE || diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c index 918c15f78d..dbb657d9bc 100644 --- a/target/ppc/mmu_common.c +++ b/target/ppc/mmu_common.c @@ -388,7 +388,7 @@ static int get_segment_6xx_tlb(CPUPPCState *env, mmu_ct= x_t *ctx, " nip=3D" TARGET_FMT_lx " lr=3D" TARGET_FMT_lx " ir=3D%d dr=3D%d pr=3D%d %d t=3D%d\n", eaddr, (int)(eaddr >> 28), sr, env->nip, env->lr, - !!(env->msr & M_MSR_IR), (int)msr_dr, pr ? 1 : 0, + !!(env->msr & M_MSR_IR), !!(env->msr & M_MSR_DR), pr ? 1= : 0, access_type =3D=3D MMU_DATA_STORE, type); pgidx =3D (eaddr & ~SEGMENT_MASK_256M) >> target_page_bits; hash =3D vsid ^ pgidx; @@ -627,7 +627,7 @@ found_tlb: =20 /* Check the address space */ if ((access_type =3D=3D MMU_INST_FETCH ? - !!(env->msr & M_MSR_IR) : msr_dr) !=3D (tlb->attr & 1)) { + !!(env->msr & M_MSR_IR) : !!(env->msr & M_MSR_DR)) !=3D (tlb->attr= & 1)) { qemu_log_mask(CPU_LOG_MMU, "%s: AS doesn't match\n", __func__); return -1; } @@ -1171,7 +1171,7 @@ int get_physical_address_wtlb(CPUPPCState *env, mmu_c= tx_t *ctx, { int ret =3D -1; bool real_mode =3D (type =3D=3D ACCESS_CODE && !(env->msr & M_MSR_IR)) - || (type !=3D ACCESS_CODE && msr_dr =3D=3D 0); + || (type !=3D ACCESS_CODE && !(env->msr & M_MSR_DR)); =20 switch (env->mmu_model) { case POWERPC_MMU_SOFT_6xx: --=20 2.25.1 From nobody Mon May 6 16:25:59 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650654939899379.9889305560753; Fri, 22 Apr 2022 12:15:39 -0700 (PDT) Received: from localhost ([::1]:42390 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhykk-0003Hx-Mk for importer2@patchew.org; Fri, 22 Apr 2022 15:15:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45216) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhySb-0005XF-3b; Fri, 22 Apr 2022 14:56:53 -0400 Received: from [187.72.171.209] (port=10601 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhySZ-0000Zc-Mf; Fri, 22 Apr 2022 14:56:52 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Fri, 22 Apr 2022 15:54:55 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id 5D30280060F; Fri, 22 Apr 2022 15:54:55 -0300 (-03) From: =?UTF-8?q?V=C3=ADctor=20Colombo?= To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 16/20] target/ppc: Substitute msr_ep macro with new M_MSR_EP macro Date: Fri, 22 Apr 2022 15:54:46 -0300 Message-Id: <20220422185450.107256-17-victor.colombo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422185450.107256-1-victor.colombo@eldorado.org.br> References: <20220422185450.107256-1-victor.colombo@eldorado.org.br> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-OriginalArrivalTime: 22 Apr 2022 18:54:55.0639 (UTC) FILETIME=[75006A70:01D8567A] X-Host-Lookup-Failed: Reverse DNS lookup failed for 187.72.171.209 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=187.72.171.209; envelope-from=victor.colombo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, richard.henderson@linaro.org, groug@kaod.org, victor.colombo@eldorado.org.br, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1650654941841100001 Suggested-by: Richard Henderson Signed-off-by: V=C3=ADctor Colombo --- target/ppc/cpu.h | 2 +- target/ppc/helper_regs.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 3a5218a2cd..1767a3a430 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -362,6 +362,7 @@ typedef enum { #define M_MSR_PR (1ull << MSR_PR) #define M_MSR_FP (1ull << MSR_FP) #define M_MSR_ME (1ull << MSR_ME) +#define M_MSR_EP (1ull << MSR_EP) #define M_MSR_IR (1ull << MSR_IR) #define M_MSR_DR (1ull << MSR_DR) #define M_MSR_DS (1ull << MSR_DS) @@ -484,7 +485,6 @@ typedef enum { #endif #define msr_fe0 ((env->msr >> MSR_FE0) & 1) #define msr_fe1 ((env->msr >> MSR_FE1) & 1) -#define msr_ep ((env->msr >> MSR_EP) & 1) #define msr_ts ((env->msr >> MSR_TS1) & 3) =20 #define DBCR0_ICMP (1 << 27) diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c index 1c67fbf7c1..f9d2e123cf 100644 --- a/target/ppc/helper_regs.c +++ b/target/ppc/helper_regs.c @@ -241,8 +241,8 @@ int hreg_store_msr(CPUPPCState *env, target_ulong value= , int alter_hv) /* Swap temporary saved registers with GPRs */ hreg_swap_gpr_tgpr(env); } - if (unlikely((value >> MSR_EP) & 1) !=3D msr_ep) { - env->excp_prefix =3D ((value >> MSR_EP) & 1) * 0xFFF00000; + if (unlikely(!(value & env->msr & M_MSR_EP))) { + env->excp_prefix =3D !!(value & M_MSR_EP) * 0xFFF00000; } /* * If PR=3D1 then EE, IR and DR must be 1 --=20 2.25.1 From nobody Mon May 6 16:25:59 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650655238986441.69132016048025; Fri, 22 Apr 2022 12:20:38 -0700 (PDT) Received: from localhost ([::1]:51362 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhypZ-0000v8-TW for importer2@patchew.org; Fri, 22 Apr 2022 15:20:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45346) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhyTc-00089t-8R; Fri, 22 Apr 2022 14:57:56 -0400 Received: from [187.72.171.209] (port=45652 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhyTa-0000lo-IV; Fri, 22 Apr 2022 14:57:55 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Fri, 22 Apr 2022 15:54:55 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id 6F35580031F; Fri, 22 Apr 2022 15:54:55 -0300 (-03) From: =?UTF-8?q?V=C3=ADctor=20Colombo?= To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 17/20] target/ppc: Substitute msr_fe macro with new M_MSR_FE macro Date: Fri, 22 Apr 2022 15:54:47 -0300 Message-Id: <20220422185450.107256-18-victor.colombo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422185450.107256-1-victor.colombo@eldorado.org.br> References: <20220422185450.107256-1-victor.colombo@eldorado.org.br> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-OriginalArrivalTime: 22 Apr 2022 18:54:55.0686 (UTC) FILETIME=[75079660:01D8567A] X-Host-Lookup-Failed: Reverse DNS lookup failed for 187.72.171.209 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=187.72.171.209; envelope-from=victor.colombo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, richard.henderson@linaro.org, groug@kaod.org, victor.colombo@eldorado.org.br, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1650655239854100001 Suggested-by: Richard Henderson Signed-off-by: V=C3=ADctor Colombo --- target/ppc/cpu.h | 5 +++-- target/ppc/excp_helper.c | 12 ++++++------ 2 files changed, 9 insertions(+), 8 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 1767a3a430..b957fc95e0 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -362,6 +362,9 @@ typedef enum { #define M_MSR_PR (1ull << MSR_PR) #define M_MSR_FP (1ull << MSR_FP) #define M_MSR_ME (1ull << MSR_ME) +#define M_MSR_FE0 (1ull << MSR_FE0) +#define M_MSR_FE1 (1ull << MSR_FE1) +#define M_MSR_FE (M_MSR_FE0 | M_MSR_FE1) #define M_MSR_EP (1ull << MSR_EP) #define M_MSR_IR (1ull << MSR_IR) #define M_MSR_DR (1ull << MSR_DR) @@ -483,8 +486,6 @@ typedef enum { #else #define msr_hv (0) #endif -#define msr_fe0 ((env->msr >> MSR_FE0) & 1) -#define msr_fe1 ((env->msr >> MSR_FE1) & 1) #define msr_ts ((env->msr >> MSR_TS1) & 3) =20 #define DBCR0_ICMP (1 << 27) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 3e52061cd6..88e5eb91f1 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -478,7 +478,7 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp) case POWERPC_EXCP_PROGRAM: /* Program exception = */ switch (env->error_code & ~0xF) { case POWERPC_EXCP_FP: - if ((msr_fe0 =3D=3D 0 && msr_fe1 =3D=3D 0) || !(env->msr & M_M= SR_FP)) { + if (!(env->msr & M_MSR_FE) || !(env->msr & M_MSR_FP)) { trace_ppc_excp_fp_ignore(); powerpc_reset_excp_state(cpu); return; @@ -615,7 +615,7 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp) case POWERPC_EXCP_PROGRAM: /* Program exception = */ switch (env->error_code & ~0xF) { case POWERPC_EXCP_FP: - if ((msr_fe0 =3D=3D 0 && msr_fe1 =3D=3D 0) || !(env->msr & M_M= SR_FP)) { + if (!(env->msr & M_MSR_FE) || !(env->msr & M_MSR_FP)) { trace_ppc_excp_fp_ignore(); powerpc_reset_excp_state(cpu); return; @@ -788,7 +788,7 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp) case POWERPC_EXCP_PROGRAM: /* Program exception = */ switch (env->error_code & ~0xF) { case POWERPC_EXCP_FP: - if ((msr_fe0 =3D=3D 0 && msr_fe1 =3D=3D 0) || !(env->msr & M_M= SR_FP)) { + if (!(env->msr & M_MSR_FE) || !(env->msr & M_MSR_FP)) { trace_ppc_excp_fp_ignore(); powerpc_reset_excp_state(cpu); return; @@ -973,7 +973,7 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp) case POWERPC_EXCP_PROGRAM: /* Program exception = */ switch (env->error_code & ~0xF) { case POWERPC_EXCP_FP: - if ((msr_fe0 =3D=3D 0 && msr_fe1 =3D=3D 0) || !(env->msr & M_M= SR_FP)) { + if (!(env->msr & M_MSR_FE) || !(env->msr & M_MSR_FP)) { trace_ppc_excp_fp_ignore(); powerpc_reset_excp_state(cpu); return; @@ -1171,7 +1171,7 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int e= xcp) case POWERPC_EXCP_PROGRAM: /* Program exception = */ switch (env->error_code & ~0xF) { case POWERPC_EXCP_FP: - if ((msr_fe0 =3D=3D 0 && msr_fe1 =3D=3D 0) || !(env->msr & M_M= SR_FP)) { + if (!(env->msr & M_MSR_FE) || !(env->msr & M_MSR_FP)) { trace_ppc_excp_fp_ignore(); powerpc_reset_excp_state(cpu); return; @@ -1434,7 +1434,7 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int e= xcp) case POWERPC_EXCP_PROGRAM: /* Program exception = */ switch (env->error_code & ~0xF) { case POWERPC_EXCP_FP: - if ((msr_fe0 =3D=3D 0 && msr_fe1 =3D=3D 0) || !(env->msr & M_M= SR_FP)) { + if (!(env->msr & M_MSR_FE) || !(env->msr & M_MSR_FP)) { trace_ppc_excp_fp_ignore(); powerpc_reset_excp_state(cpu); return; --=20 2.25.1 From nobody Mon May 6 16:25:59 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650655465135906.8991045236567; Fri, 22 Apr 2022 12:24:25 -0700 (PDT) Received: from localhost ([::1]:32878 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhytD-0007hi-12 for importer2@patchew.org; Fri, 22 Apr 2022 15:24:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45360) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhyTe-0008IN-JO; Fri, 22 Apr 2022 14:57:58 -0400 Received: from [187.72.171.209] (port=45652 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhyTd-0000lo-3V; Fri, 22 Apr 2022 14:57:58 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Fri, 22 Apr 2022 15:54:55 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id 8A416800902; Fri, 22 Apr 2022 15:54:55 -0300 (-03) From: =?UTF-8?q?V=C3=ADctor=20Colombo?= To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 18/20] target/ppc: Substitute msr_ts macro with new M_MSR_TS macro Date: Fri, 22 Apr 2022 15:54:48 -0300 Message-Id: <20220422185450.107256-19-victor.colombo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422185450.107256-1-victor.colombo@eldorado.org.br> References: <20220422185450.107256-1-victor.colombo@eldorado.org.br> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-OriginalArrivalTime: 22 Apr 2022 18:54:55.0796 (UTC) FILETIME=[75185F40:01D8567A] X-Host-Lookup-Failed: Reverse DNS lookup failed for 187.72.171.209 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=187.72.171.209; envelope-from=victor.colombo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, richard.henderson@linaro.org, groug@kaod.org, victor.colombo@eldorado.org.br, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1650655465827100005 Suggested-by: Richard Henderson Signed-off-by: V=C3=ADctor Colombo --- target/ppc/cpu.h | 4 +++- target/ppc/kvm.c | 4 ++-- target/ppc/machine.c | 2 +- 3 files changed, 6 insertions(+), 4 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index b957fc95e0..ee00b27818 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -353,6 +353,9 @@ typedef enum { #define MSR_RI 1 /* Recoverable interrupt 1 = */ #define MSR_LE 0 /* Little-endian mode 1 hfla= gs */ =20 +#define M_MSR_TS0 (1ull << MSR_TS0) +#define M_MSR_TS1 (1ull << MSR_TS1) +#define M_MSR_TS (M_MSR_TS0 | M_MSR_TS1) #define M_MSR_CM (1ull << MSR_CM) #define M_MSR_GS (1ull << MSR_GS) #define M_MSR_POW (1ull << MSR_POW) @@ -486,7 +489,6 @@ typedef enum { #else #define msr_hv (0) #endif -#define msr_ts ((env->msr >> MSR_TS1) & 3) =20 #define DBCR0_ICMP (1 << 27) #define DBCR0_BRT (1 << 26) diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index 1ca18f21b2..3cccac41fd 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -973,7 +973,7 @@ int kvm_arch_put_registers(CPUState *cs, int level) } =20 #ifdef TARGET_PPC64 - if (msr_ts) { + if (env->msr & M_MSR_TS) { for (i =3D 0; i < ARRAY_SIZE(env->tm_gpr); i++) { kvm_set_one_reg(cs, KVM_REG_PPC_TM_GPR(i), &env->tm_gpr[i]= ); } @@ -1281,7 +1281,7 @@ int kvm_arch_get_registers(CPUState *cs) } =20 #ifdef TARGET_PPC64 - if (msr_ts) { + if (env->msr & M_MSR_TS) { for (i =3D 0; i < ARRAY_SIZE(env->tm_gpr); i++) { kvm_get_one_reg(cs, KVM_REG_PPC_TM_GPR(i), &env->tm_gpr[i]= ); } diff --git a/target/ppc/machine.c b/target/ppc/machine.c index e673944597..51832c4bde 100644 --- a/target/ppc/machine.c +++ b/target/ppc/machine.c @@ -417,7 +417,7 @@ static bool tm_needed(void *opaque) { PowerPCCPU *cpu =3D opaque; CPUPPCState *env =3D &cpu->env; - return msr_ts; + return env->msr & M_MSR_TS; } =20 static const VMStateDescription vmstate_tm =3D { --=20 2.25.1 From nobody Mon May 6 16:25:59 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650655651753661.1998244043832; Fri, 22 Apr 2022 12:27:31 -0700 (PDT) Received: from localhost ([::1]:38886 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhywE-0004Bm-4D for importer2@patchew.org; Fri, 22 Apr 2022 15:27:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45374) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhyTh-0008MH-5i; Fri, 22 Apr 2022 14:58:04 -0400 Received: from [187.72.171.209] (port=45652 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhyTf-0000lo-Fk; Fri, 22 Apr 2022 14:58:00 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Fri, 22 Apr 2022 15:54:55 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id A6F5980060F; Fri, 22 Apr 2022 15:54:55 -0300 (-03) From: =?UTF-8?q?V=C3=ADctor=20Colombo?= To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 19/20] target/ppc: Substitute msr_hv macro with new M_MSR_HV macro Date: Fri, 22 Apr 2022 15:54:49 -0300 Message-Id: <20220422185450.107256-20-victor.colombo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422185450.107256-1-victor.colombo@eldorado.org.br> References: <20220422185450.107256-1-victor.colombo@eldorado.org.br> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-OriginalArrivalTime: 22 Apr 2022 18:54:55.0967 (UTC) FILETIME=[753276F0:01D8567A] X-Host-Lookup-Failed: Reverse DNS lookup failed for 187.72.171.209 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=187.72.171.209; envelope-from=victor.colombo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, richard.henderson@linaro.org, groug@kaod.org, victor.colombo@eldorado.org.br, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1650655652135100001 Suggested-by: Richard Henderson Signed-off-by: V=C3=ADctor Colombo --- target/ppc/cpu.h | 11 +++++------ target/ppc/cpu_init.c | 4 ++-- target/ppc/excp_helper.c | 9 +++++---- target/ppc/mem_helper.c | 5 +++-- target/ppc/misc_helper.c | 2 +- target/ppc/mmu-radix64.c | 6 +++--- 6 files changed, 19 insertions(+), 18 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index ee00b27818..3cbecc96d8 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -353,6 +353,11 @@ typedef enum { #define MSR_RI 1 /* Recoverable interrupt 1 = */ #define MSR_LE 0 /* Little-endian mode 1 hfla= gs */ =20 +#if defined(TARGET_PPC64) +#define M_MSR_HV (1ull << MSR_HV) +#else +#define M_MSR_HV 0 +#endif #define M_MSR_TS0 (1ull << MSR_TS0) #define M_MSR_TS1 (1ull << MSR_TS1) #define M_MSR_TS (M_MSR_TS0 | M_MSR_TS1) @@ -484,12 +489,6 @@ typedef enum { #define HFSCR_MSGP PPC_BIT(53) /* Privileged Message Send Facilities */ #define HFSCR_IC_MSGP 0xA =20 -#if defined(TARGET_PPC64) -#define msr_hv ((env->msr >> MSR_HV) & 1) -#else -#define msr_hv (0) -#endif - #define DBCR0_ICMP (1 << 27) #define DBCR0_BRT (1 << 26) #define DBSR_ICMP (1 << 27) diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 4d949ab1f1..d2a7911a86 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -6305,7 +6305,7 @@ static bool cpu_has_work_POWER9(CPUState *cs) if ((env->pending_interrupts & (1u << PPC_INTERRUPT_EXT)) && (env->spr[SPR_LPCR] & LPCR_EEE)) { bool heic =3D !!(env->spr[SPR_LPCR] & LPCR_HEIC); - if (!heic || !msr_hv || (env->msr & M_MSR_PR)) { + if (!heic || !(env->msr & M_MSR_HV) || (env->msr & M_MSR_PR)) { return true; } } @@ -6520,7 +6520,7 @@ static bool cpu_has_work_POWER10(CPUState *cs) if ((env->pending_interrupts & (1u << PPC_INTERRUPT_EXT)) && (env->spr[SPR_LPCR] & LPCR_EEE)) { bool heic =3D !!(env->spr[SPR_LPCR] & LPCR_HEIC); - if (!heic || !msr_hv || (env->msr & M_MSR_PR)) { + if (!heic || !(env->msr & M_MSR_HV) || (env->msr & M_MSR_PR)) { return true; } } diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 88e5eb91f1..06bee7689b 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -1715,7 +1715,7 @@ static void ppc_hw_interrupt(CPUPPCState *env) if (env->pending_interrupts & (1 << PPC_INTERRUPT_HDECR)) { /* LPCR will be clear when not supported so this will work */ bool hdice =3D !!(env->spr[SPR_LPCR] & LPCR_HDICE); - if ((async_deliver || msr_hv =3D=3D 0) && hdice) { + if ((async_deliver || !(env->msr & M_MSR_HV)) && hdice) { /* HDEC clears on delivery */ env->pending_interrupts &=3D ~(1 << PPC_INTERRUPT_HDECR); powerpc_excp(cpu, POWERPC_EXCP_HDECR); @@ -1727,7 +1727,7 @@ static void ppc_hw_interrupt(CPUPPCState *env) if (env->pending_interrupts & (1 << PPC_INTERRUPT_HVIRT)) { /* LPCR will be clear when not supported so this will work */ bool hvice =3D !!(env->spr[SPR_LPCR] & LPCR_HVICE); - if ((async_deliver || msr_hv =3D=3D 0) && hvice) { + if ((async_deliver || !(env->msr & M_MSR_HV)) && hvice) { powerpc_excp(cpu, POWERPC_EXCP_HVIRT); return; } @@ -1738,8 +1738,9 @@ static void ppc_hw_interrupt(CPUPPCState *env) bool lpes0 =3D !!(env->spr[SPR_LPCR] & LPCR_LPES0); bool heic =3D !!(env->spr[SPR_LPCR] & LPCR_HEIC); /* HEIC blocks delivery to the hypervisor */ - if ((async_deliver && !(heic && msr_hv && !(env->msr & M_MSR_PR)))= || - (env->has_hv_mode && msr_hv =3D=3D 0 && !lpes0)) { + if ((async_deliver && !(heic && (env->msr & M_MSR_HV) && + !(env->msr & M_MSR_PR))) || + (env->has_hv_mode && !(env->msr & M_MSR_HV) && !lpes0)) { if (books_vhyp_promotes_external_to_hvirt(cpu)) { powerpc_excp(cpu, POWERPC_EXCP_HVIRT); } else { diff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c index 8ff99a6568..d3964a7eb0 100644 --- a/target/ppc/mem_helper.c +++ b/target/ppc/mem_helper.c @@ -612,11 +612,12 @@ void helper_tbegin(CPUPPCState *env) env->spr[SPR_TEXASR] =3D (1ULL << TEXASR_FAILURE_PERSISTENT) | (1ULL << TEXASR_NESTING_OVERFLOW) | - (msr_hv << TEXASR_PRIVILEGE_HV) | + (!!(env->msr & M_MSR_HV) << TEXASR_PRIVILEGE_HV) | (!!(env->msr & M_MSR_PR) << TEXASR_PRIVILEGE_PR) | (1ULL << TEXASR_FAILURE_SUMMARY) | (1ULL << TEXASR_TFIAR_EXACT); - env->spr[SPR_TFIAR] =3D env->nip | (msr_hv << 1) | !!(env->msr & M_MSR= _PR); + env->spr[SPR_TFIAR] =3D env->nip | (!!(env->msr & M_MSR_HV) << 1) | + !!(env->msr & M_MSR_PR); env->spr[SPR_TFHAR] =3D env->nip + 4; env->crf[0] =3D 0xB; /* 0b1010 =3D transaction failure */ } diff --git a/target/ppc/misc_helper.c b/target/ppc/misc_helper.c index 06aa716cab..90b97abb07 100644 --- a/target/ppc/misc_helper.c +++ b/target/ppc/misc_helper.c @@ -73,7 +73,7 @@ void helper_hfscr_facility_check(CPUPPCState *env, uint32= _t bit, const char *caller, uint32_t cause) { #ifdef TARGET_PPC64 - if ((env->msr_mask & MSR_HVB) && !msr_hv && + if ((env->msr_mask & MSR_HVB) && !(env->msr & M_MSR_HV) && !(env->spr[SPR_HFSCR] & (1UL << bit))= ) { raise_hv_fu_exception(env, bit, caller, cause, GETPC()); } diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c index d7b8b97ee7..09b202071d 100644 --- a/target/ppc/mmu-radix64.c +++ b/target/ppc/mmu-radix64.c @@ -37,7 +37,7 @@ static bool ppc_radix64_get_fully_qualified_addr(const CP= UPPCState *env, return false; } =20 - if (msr_hv) { /* MSR[HV] -> Hypervisor/bare metal */ + if (env->msr & M_MSR_HV) { /* MSR[HV] -> Hypervisor/bare metal */ switch (eaddr & R_EADDR_QUADRANT) { case R_EADDR_QUADRANT0: *lpid =3D 0; @@ -305,7 +305,7 @@ static bool validate_pate(PowerPCCPU *cpu, uint64_t lpi= d, ppc_v3_pate_t *pate) if (!(pate->dw0 & PATE0_HR)) { return false; } - if (lpid =3D=3D 0 && !msr_hv) { + if (lpid =3D=3D 0 && !(env->msr & M_MSR_HV)) { return false; } if ((pate->dw0 & PATE1_R_PRTS) < 5) { @@ -430,7 +430,7 @@ static int ppc_radix64_process_scoped_xlate(PowerPCCPU = *cpu, *g_page_size =3D PRTBE_R_GET_RTS(prtbe0); base_addr =3D prtbe0 & PRTBE_R_RPDB; nls =3D prtbe0 & PRTBE_R_RPDS; - if (msr_hv || vhyp_flat_addressing(cpu)) { + if ((env->msr & M_MSR_HV) || vhyp_flat_addressing(cpu)) { /* * Can treat process table addresses as real addresses */ --=20 2.25.1 From nobody Mon May 6 16:25:59 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1650655572263644.3722087098972; Fri, 22 Apr 2022 12:26:12 -0700 (PDT) Received: from localhost ([::1]:37914 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhyuw-0002jL-Nd for importer2@patchew.org; Fri, 22 Apr 2022 15:26:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45400) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhyTm-0008P5-6X; Fri, 22 Apr 2022 14:58:06 -0400 Received: from [187.72.171.209] (port=45652 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhyTk-0000lo-Oo; Fri, 22 Apr 2022 14:58:05 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Fri, 22 Apr 2022 15:54:56 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id C73EB80031F; Fri, 22 Apr 2022 15:54:55 -0300 (-03) From: =?UTF-8?q?V=C3=ADctor=20Colombo?= To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 20/20] target/ppc: Add unused M_MSR_* macros Date: Fri, 22 Apr 2022 15:54:50 -0300 Message-Id: <20220422185450.107256-21-victor.colombo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220422185450.107256-1-victor.colombo@eldorado.org.br> References: <20220422185450.107256-1-victor.colombo@eldorado.org.br> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-OriginalArrivalTime: 22 Apr 2022 18:54:56.0077 (UTC) FILETIME=[75433FD0:01D8567A] X-Host-Lookup-Failed: Reverse DNS lookup failed for 187.72.171.209 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=187.72.171.209; envelope-from=victor.colombo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, richard.henderson@linaro.org, groug@kaod.org, victor.colombo@eldorado.org.br, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1650655574302100001 Add M_MSR_* macros for msr bits that had an unused msr_* before. Signed-off-by: V=C3=ADctor Colombo --- target/ppc/cpu.h | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 3cbecc96d8..dda289a121 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -353,6 +353,9 @@ typedef enum { #define MSR_RI 1 /* Recoverable interrupt 1 = */ #define MSR_LE 0 /* Little-endian mode 1 hfla= gs */ =20 +#define M_MSR_SF (1ull << MSR_SF) +#define M_MSR_TAG (1ull << MSR_TAG) +#define M_MSR_ISF (1ull << MSR_ISF) #if defined(TARGET_PPC64) #define M_MSR_HV (1ull << MSR_HV) #else @@ -360,10 +363,20 @@ typedef enum { #endif #define M_MSR_TS0 (1ull << MSR_TS0) #define M_MSR_TS1 (1ull << MSR_TS1) +#define M_MSR_TM (1ull << MSR_TM) #define M_MSR_TS (M_MSR_TS0 | M_MSR_TS1) #define M_MSR_CM (1ull << MSR_CM) +#define M_MSR_ICM (1ull << MSR_ICM) #define M_MSR_GS (1ull << MSR_GS) +#define M_MSR_UCLE (1ull << MSR_UCLE) +#define M_MSR_VR (1ull << MSR_VR) +#define M_MSR_SPE (1ull << MSR_SPE) +#define M_MSR_VSX (1ull << MSR_VSX) +#define M_MSR_S (1ull << MSR_S) +#define M_MSR_KEY (1ull << MSR_KEY) #define M_MSR_POW (1ull << MSR_POW) +#define M_MSR_WE (1ull << MSR_WE) +#define M_MSR_TGPR (1ull << MSR_TGPR) #define M_MSR_CE (1ull << MSR_CE) #define M_MSR_ILE (1ull << MSR_ILE) #define M_MSR_EE (1ull << MSR_EE) @@ -373,10 +386,21 @@ typedef enum { #define M_MSR_FE0 (1ull << MSR_FE0) #define M_MSR_FE1 (1ull << MSR_FE1) #define M_MSR_FE (M_MSR_FE0 | M_MSR_FE1) +#define M_MSR_SE (1ull << MSR_SE) +#define M_MSR_DWE (1ull << MSR_DWE) +#define M_MSR_UBLE (1ull << MSR_UBLE) +#define M_MSR_BE (1ull << MSR_BE) +#define M_MSR_DE (1ull << MSR_DE) +#define M_MSR_AL (1ull << MSR_AL) #define M_MSR_EP (1ull << MSR_EP) #define M_MSR_IR (1ull << MSR_IR) #define M_MSR_DR (1ull << MSR_DR) +#define M_MSR_IS (1ull << MSR_IS) #define M_MSR_DS (1ull << MSR_DS) +#define M_MSR_PE (1ull << MSR_PE) +#define M_MSR_PX (1ull << MSR_PX) +#define M_MSR_PMM (1ull << MSR_PMM) +#define M_MSR_RI (1ull << MSR_RI) #define M_MSR_LE (1ull << MSR_LE) =20 /* PMU bits */ --=20 2.25.1