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Tsirkin" , Marcel Apfelbaum , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , =?UTF-8?q?Herv=C3=A9=20Poussineau?= Subject: [PATCH 4/6] hw/isa/piix{3, 4}: Factor out ISABus retrieval from create() functions Date: Fri, 13 May 2022 19:54:43 +0200 Message-Id: <20220513175445.89616-5-shentey@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220513175445.89616-1-shentey@gmail.com> References: <20220513175445.89616-1-shentey@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::62c; envelope-from=shentey@gmail.com; helo=mail-ej1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1652464948630100001 Content-Type: text/plain; charset="utf-8" Modernizes the code and even saves a few lines. Signed-off-by: Bernhard Beschow Reviewed-by: Mark Cave-Ayland --- hw/i386/pc_piix.c | 3 ++- hw/isa/piix3.c | 3 +-- hw/isa/piix4.c | 6 +----- hw/mips/malta.c | 3 ++- include/hw/southbridge/piix.h | 4 ++-- 5 files changed, 8 insertions(+), 11 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index f843dd906f..47932448fd 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -206,9 +206,10 @@ static void pc_init1(MachineState *machine, pci_memory, ram_memory); pcms->bus =3D pci_bus; =20 - piix3 =3D piix3_create(pci_bus, &isa_bus); + piix3 =3D piix3_create(pci_bus); piix3->pic =3D x86ms->gsi; piix3_devfn =3D piix3->dev.devfn; + isa_bus =3D ISA_BUS(qdev_get_child_bus(DEVICE(piix3), "isa.0")); } else { pci_bus =3D NULL; i440fx_state =3D NULL; diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index d15117a7c7..6eacb22dd0 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -403,7 +403,7 @@ static void piix3_register_types(void) =20 type_init(piix3_register_types) =20 -PIIX3State *piix3_create(PCIBus *pci_bus, ISABus **isa_bus) +PIIX3State *piix3_create(PCIBus *pci_bus) { PIIX3State *piix3; PCIDevice *pci_dev; @@ -412,7 +412,6 @@ PIIX3State *piix3_create(PCIBus *pci_bus, ISABus **isa_= bus) =20 pci_dev =3D pci_create_simple_multifunction(pci_bus, -1, true, type); piix3 =3D PIIX3_PCI_DEVICE(pci_dev); - *isa_bus =3D ISA_BUS(qdev_get_child_bus(DEVICE(piix3), "isa.0")); =20 return piix3; } diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 134d23aea7..4968c69da9 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -301,7 +301,7 @@ static void piix4_register_types(void) =20 type_init(piix4_register_types) =20 -DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbu= s) +DeviceState *piix4_create(PCIBus *pci_bus, I2CBus **smbus) { PCIDevice *pci; DeviceState *dev; @@ -311,10 +311,6 @@ DeviceState *piix4_create(PCIBus *pci_bus, ISABus **is= a_bus, I2CBus **smbus) TYPE_PIIX4_PCI_DEVICE); dev =3D DEVICE(pci); =20 - if (isa_bus) { - *isa_bus =3D ISA_BUS(qdev_get_child_bus(dev, "isa.0")); - } - if (smbus) { *smbus =3D piix4_pm_init(pci_bus, devfn + 3, 0x1100, qdev_get_gpio_in_named(dev, "isa", 9), diff --git a/hw/mips/malta.c b/hw/mips/malta.c index 9ffdc5b8f1..e446b25ad0 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -1399,7 +1399,8 @@ void mips_malta_init(MachineState *machine) empty_slot_init("GT64120", 0, 0x20000000); =20 /* Southbridge */ - dev =3D piix4_create(pci_bus, &isa_bus, &smbus); + dev =3D piix4_create(pci_bus, &smbus); + isa_bus =3D ISA_BUS(qdev_get_child_bus(dev, "isa.0")); =20 /* Interrupt controller */ qdev_connect_gpio_out_named(dev, "intr", 0, i8259_irq); diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index a304fc6041..b768109f30 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -72,8 +72,8 @@ DECLARE_INSTANCE_CHECKER(PIIX3State, PIIX3_PCI_DEVICE, =20 #define TYPE_PIIX4_PCI_DEVICE "piix4-isa" =20 -PIIX3State *piix3_create(PCIBus *pci_bus, ISABus **isa_bus); +PIIX3State *piix3_create(PCIBus *pci_bus); =20 -DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbu= s); +DeviceState *piix4_create(PCIBus *pci_bus, I2CBus **smbus); =20 #endif --=20 2.36.1