From nobody Sat Apr 27 12:55:50 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1652649141272850.5503219167081; Sun, 15 May 2022 14:12:21 -0700 (PDT) Received: from localhost ([::1]:35372 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nqLXI-0001mV-3Z for importer2@patchew.org; Sun, 15 May 2022 17:12:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38160) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nqLW2-00009y-J3; Sun, 15 May 2022 17:11:02 -0400 Received: from mail.ozlabs.org ([2404:9400:2221:ea00::3]:44871 helo=gandalf.ozlabs.org) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nqLW0-0006s7-Av; Sun, 15 May 2022 17:11:02 -0400 Received: from gandalf.ozlabs.org (gandalf.ozlabs.org [150.107.74.76]) by gandalf.ozlabs.org (Postfix) with ESMTP id 4L1ZmT0ZY6z4xXG; Mon, 16 May 2022 07:10:49 +1000 (AEST) Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 4L1ZmP6D4gz4xVP; Mon, 16 May 2022 07:10:45 +1000 (AEST) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Peter Maydell , Andrew Jeffery , Joel Stanley , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Jamin Lin , Peter Delevoryas Subject: [PATCH] aspeed: Introduce a get_irq AspeedSoCClass method Date: Sun, 15 May 2022 23:10:42 +0200 Message-Id: <20220515211042.2332192-1-clg@kaod.org> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2404:9400:2221:ea00::3; envelope-from=SRS0=B2sr=VX=kaod.org=clg@ozlabs.org; helo=gandalf.ozlabs.org X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1652649144708100001 and make routine aspeed_soc_get_irq() common to all SoCs. This will be useful to share code. Cc: Jamin Lin Cc: Peter Delevoryas Signed-off-by: C=C3=A9dric Le Goater --- include/hw/arm/aspeed_soc.h | 3 +++ hw/arm/aspeed_ast10x0.c | 3 ++- hw/arm/aspeed_ast2600.c | 3 ++- hw/arm/aspeed_soc.c | 11 +++++++++-- 4 files changed, 16 insertions(+), 4 deletions(-) diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index e13af374b923..3789f38603e5 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -94,6 +94,7 @@ struct AspeedSoCClass { const int *irqmap; const hwaddr *memmap; uint32_t num_cpus; + qemu_irq (*get_irq)(AspeedSoCState *s, int dev); }; =20 =20 @@ -153,4 +154,6 @@ enum { ASPEED_DEV_I3C, }; =20 +qemu_irq aspeed_soc_get_irq(AspeedSoCState *s, int dev); + #endif /* ASPEED_SOC_H */ diff --git a/hw/arm/aspeed_ast10x0.c b/hw/arm/aspeed_ast10x0.c index 427154928254..ddec5706f3c1 100644 --- a/hw/arm/aspeed_ast10x0.c +++ b/hw/arm/aspeed_ast10x0.c @@ -61,7 +61,7 @@ static const int aspeed_soc_ast1030_irqmap[] =3D { [ASPEED_DEV_KCS] =3D 138, /* 138 -> 142 */ }; =20 -static qemu_irq aspeed_soc_get_irq(AspeedSoCState *s, int ctrl) +static qemu_irq aspeed_soc_ast1030_get_irq(AspeedSoCState *s, int dev) { AspeedSoCClass *sc =3D ASPEED_SOC_GET_CLASS(s); =20 @@ -280,6 +280,7 @@ static void aspeed_soc_ast1030_class_init(ObjectClass *= klass, void *data) sc->irqmap =3D aspeed_soc_ast1030_irqmap; sc->memmap =3D aspeed_soc_ast1030_memmap; sc->num_cpus =3D 1; + sc->get_irq =3D aspeed_soc_ast1030_get_irq; } =20 static const TypeInfo aspeed_soc_ast1030_type_info =3D { diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index eedda7badc37..255dbc6b95ab 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -114,7 +114,7 @@ static const int aspeed_soc_ast2600_irqmap[] =3D { [ASPEED_DEV_I3C] =3D 102, /* 102 -> 107 */ }; =20 -static qemu_irq aspeed_soc_get_irq(AspeedSoCState *s, int ctrl) +static qemu_irq aspeed_soc_ast2600_get_irq(AspeedSoCState *s, int dev) { AspeedSoCClass *sc =3D ASPEED_SOC_GET_CLASS(s); =20 @@ -572,6 +572,7 @@ static void aspeed_soc_ast2600_class_init(ObjectClass *= oc, void *data) sc->irqmap =3D aspeed_soc_ast2600_irqmap; sc->memmap =3D aspeed_soc_ast2600_memmap; sc->num_cpus =3D 2; + sc->get_irq =3D aspeed_soc_ast2600_get_irq; } =20 static const TypeInfo aspeed_soc_ast2600_type_info =3D { diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index 58714cb2a01d..15b641da9a36 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -121,7 +121,7 @@ static const int aspeed_soc_ast2400_irqmap[] =3D { =20 #define aspeed_soc_ast2500_irqmap aspeed_soc_ast2400_irqmap =20 -static qemu_irq aspeed_soc_get_irq(AspeedSoCState *s, int ctrl) +static qemu_irq aspeed_soc_ast2400_get_irq(AspeedSoCState *s, int dev) { AspeedSoCClass *sc =3D ASPEED_SOC_GET_CLASS(s); =20 @@ -487,6 +487,7 @@ static void aspeed_soc_ast2400_class_init(ObjectClass *= oc, void *data) sc->irqmap =3D aspeed_soc_ast2400_irqmap; sc->memmap =3D aspeed_soc_ast2400_memmap; sc->num_cpus =3D 1; + sc->get_irq =3D aspeed_soc_ast2400_get_irq; } =20 static const TypeInfo aspeed_soc_ast2400_type_info =3D { @@ -512,6 +513,7 @@ static void aspeed_soc_ast2500_class_init(ObjectClass *= oc, void *data) sc->irqmap =3D aspeed_soc_ast2500_irqmap; sc->memmap =3D aspeed_soc_ast2500_memmap; sc->num_cpus =3D 1; + sc->get_irq =3D aspeed_soc_ast2400_get_irq; } =20 static const TypeInfo aspeed_soc_ast2500_type_info =3D { @@ -528,4 +530,9 @@ static void aspeed_soc_register_types(void) type_register_static(&aspeed_soc_ast2500_type_info); }; =20 -type_init(aspeed_soc_register_types) +type_init(aspeed_soc_register_types); + +qemu_irq aspeed_soc_get_irq(AspeedSoCState *s, int dev) +{ + return ASPEED_SOC_GET_CLASS(s)->get_irq(s, ctrl); +} --=20 2.35.1