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[78.54.75.232]) by smtp.gmail.com with ESMTPSA id w4-20020a170907270400b006f3ef214e22sm5418768ejk.136.2022.05.22.14.24.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 22 May 2022 14:24:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ySy5Qh2/rqashHeRzCYokfJk5ESmG04Yqr6Wb5D5T6o=; b=cfRODoXcIlJCFvIx0iMeIzEh48ff7fNjDZ4xMPtBrpUc2fC6J/bRxjLW1OYe1LwVYR 9RlncBU6YHG6nSqyhl3CSVT4ZQ/XBy4c2LkTmelF3YDrzQyYBWD5KP5H25gLUHQphBiu GlQcubc2KksuGgy8lHWzC1OqcN5ERCNMPu/gSqSHAXVzGEs96n3pfoWzUlGW7j88XXxB sOA3mdLMBwWrk1OPiGORQAP8YBA/Ykb5eZIjUO6lOvEChhg7EY2f79kG4DVx0Q2oWGf0 Natz7b18z8rDoArdy1NIo9wx2wwK7yuKaS9Y8UgKyWeeRizp0JvqoqaQRRsjayV5zNFH 1wcw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ySy5Qh2/rqashHeRzCYokfJk5ESmG04Yqr6Wb5D5T6o=; b=5ysnV3/+srhUFkt1NcSbGwEgj//SLRDFym3UdJVAHyn6GbkulHrCkevY8La+rCvHA0 wy34Vb0Lu1WcKgoDW7GbwXoD6VPAwpCPjj71jg26QhjKaExQHxPXNBU0Kk2Ebw/nC0RG h/NKNH4Mt2TkyF53yh+BAzI4eFYYKv9Fll3MdgJlgQXAztOItXFyQYLKqHrLZPAkyI8f yu5EkblI5LMI2c+bxb27Sij4QPvv4uXDIxWMo3jI4XB9P8kbpJBRwzObv+GtvuPHvfNr G3/uNMcG2fIcIXvY942ytVSftg7DAnNUdATQfLrn2YEFLboWK7vA6j5+qfJKLvUfGbyS WYZQ== X-Gm-Message-State: AOAM532L13E+Hjvxv6qqeYhqORDrZPvENFmPryZf3AH6L1Cl0VkUmihi dl+ptHyyLzNjKhPE1nG05Y/DMMKa4Io= X-Google-Smtp-Source: ABdhPJwBccSjUCiu/CJktam61QhuWe9hLftYUXK/D7h33Hg+AS2c4KnMJBp3q2HIVu10l4VicWYCVA== X-Received: by 2002:a05:6402:2996:b0:42b:49a:6d24 with SMTP id eq22-20020a056402299600b0042b049a6d24mr18239671edb.145.1653254699759; Sun, 22 May 2022 14:24:59 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: qemu-trivial@nongnu.org, Bernhard Beschow , Mark Cave-Ayland , "Michael S. Tsirkin" , Marcel Apfelbaum , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno Subject: [PATCH v2 1/6] include/hw/southbridge/piix: Aggregate all PIIX soughbridge type names Date: Sun, 22 May 2022 23:24:26 +0200 Message-Id: <20220522212431.14598-2-shentey@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220522212431.14598-1-shentey@gmail.com> References: <20220522212431.14598-1-shentey@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::536; envelope-from=shentey@gmail.com; helo=mail-ed1-x536.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1653254970728100003 Content-Type: text/plain; charset="utf-8" TYPE_PIIX3_PCI_DEVICE resides there as already, so add the remaining ones, too. Signed-off-by: Bernhard Beschow Reviewed-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/isa/piix3.c | 3 --- include/hw/isa/isa.h | 2 -- include/hw/southbridge/piix.h | 4 ++++ 3 files changed, 4 insertions(+), 5 deletions(-) diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index dab901c9ad..d96ce2b788 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -35,9 +35,6 @@ =20 #define XEN_PIIX_NUM_PIRQS 128ULL =20 -#define TYPE_PIIX3_DEVICE "PIIX3" -#define TYPE_PIIX3_XEN_DEVICE "PIIX3-xen" - static void piix3_set_irq_pic(PIIX3State *piix3, int pic_irq) { qemu_set_irq(piix3->pic[pic_irq], diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h index 034d706ba1..e9fa2f5cea 100644 --- a/include/hw/isa/isa.h +++ b/include/hw/isa/isa.h @@ -144,6 +144,4 @@ static inline ISABus *isa_bus_from_device(ISADevice *d) return ISA_BUS(qdev_get_parent_bus(DEVICE(d))); } =20 -#define TYPE_PIIX4_PCI_DEVICE "piix4-isa" - #endif diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index f63f83e5c6..4d17400dfd 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -70,6 +70,10 @@ typedef struct PIIXState PIIX3State; DECLARE_INSTANCE_CHECKER(PIIX3State, PIIX3_PCI_DEVICE, TYPE_PIIX3_PCI_DEVICE) =20 +#define TYPE_PIIX3_DEVICE "PIIX3" +#define TYPE_PIIX3_XEN_DEVICE "PIIX3-xen" +#define TYPE_PIIX4_PCI_DEVICE "piix4-isa" + PIIX3State *piix3_create(PCIBus *pci_bus, ISABus **isa_bus); =20 DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbu= s); --=20 2.36.1 From nobody Fri Apr 26 18:05:05 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1653254972604983.056121902534; Sun, 22 May 2022 14:29:32 -0700 (PDT) Received: from localhost ([::1]:39090 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nst8l-00079A-KE for importer2@patchew.org; Sun, 22 May 2022 17:29:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:42434) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nst4S-0002u0-A9; Sun, 22 May 2022 17:25:04 -0400 Received: from mail-ed1-x533.google.com ([2a00:1450:4864:20::533]:46930) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nst4Q-0005Rp-LP; Sun, 22 May 2022 17:25:04 -0400 Received: by mail-ed1-x533.google.com with SMTP id j28so16824269eda.13; Sun, 22 May 2022 14:25:01 -0700 (PDT) Received: from localhost.localdomain (dynamic-078-054-075-232.78.54.pool.telefonica.de. [78.54.75.232]) by smtp.gmail.com with ESMTPSA id w4-20020a170907270400b006f3ef214e22sm5418768ejk.136.2022.05.22.14.25.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 22 May 2022 14:25:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=W3cFt3WUVMFye0KlqibqKVNwjrCZEijZ5s2jCoU+df0=; b=Ec04YkNAayxxb76oeSPAUOfWxeS5TOwCyqn/kKwNOx1wkeXRFY04BUUv4J+07WxUnV lA0JGOrj/KKzSZD8by1Hr7lwUHx+PKJ75rzkKpvfOELIUIp2YabfO80JfT9figgJVHrD SOjyWKQx5xVnk68GBCwnIr2oE9rlMYY++ddNoQjzN6zoWe2T8siARSu8IqX/IRISB1ln d6mDw2XwkElWkkyhE7MSMlmb/Epl0j6w+8EMKX2DHafTZa2cOWB3a928dd+WRTmNzhpK xJ/LWJ06aQkv26eZz+moPzaV6bO1wkgCRUsqdFFWxzkvMj/rWbDQN9xmPFbXWKhGhPIe M/sw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=W3cFt3WUVMFye0KlqibqKVNwjrCZEijZ5s2jCoU+df0=; b=h0b7/REgX9q/6s+t6LSI5zHW2E2MGlP3K5uQdylPHiKVKxwU9jrCsmoeFoc9I6fCVF JhNRvAY3nXB1ESEGSyAEj71+am/pUQ0E/NYLMq+9UXL3uhZN6V68K5Y6X9Tq1Mq+mQ/r M7tlpzCcT+Gw9x/GjQujBp9Ee88xYyHzHl6hnjoXd7PwascB3j7DTt/r9CKM0OLy1JQf BKH/eRYfkduS31/H1ShUdWjUU4Ov6kvrct6+UxKcARgrfqqkpS6Xe9ZCzxDKd74NlYo0 H8ZicWnOsjof17sw5haTzjinMG3aiPMwD6uPtWKhaxVVhXfmsk6VKd/QKia1Mf3GPSmA bEiA== X-Gm-Message-State: AOAM530BXskfkA9XQfQdy9grqaOw+sqLgFGIwcs5HeeGX4BN+8w3r5Ce K5xWOTg11cq1opjgb2OOvafCPgVSAQM= X-Google-Smtp-Source: ABdhPJw/QPZ7Z9czTMlZorSEP7EvLU7Q3egmRAHbnF4bMJRN2ruXDeIcd11i27EvNI4bXafn9H115g== X-Received: by 2002:a05:6402:2713:b0:42b:7127:8614 with SMTP id y19-20020a056402271300b0042b71278614mr721373edd.317.1653254700767; Sun, 22 May 2022 14:25:00 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: qemu-trivial@nongnu.org, Bernhard Beschow , Mark Cave-Ayland , "Michael S. Tsirkin" , Marcel Apfelbaum , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , =?UTF-8?q?Herv=C3=A9=20Poussineau?= Subject: [PATCH v2 2/6] hw/isa/piix{3, 4}: Move pci_map_irq_fn's near pci_set_irq_fn's Date: Sun, 22 May 2022 23:24:27 +0200 Message-Id: <20220522212431.14598-3-shentey@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220522212431.14598-1-shentey@gmail.com> References: <20220522212431.14598-1-shentey@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::533; envelope-from=shentey@gmail.com; helo=mail-ed1-x533.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1653254974306100001 Content-Type: text/plain; charset="utf-8" The pci_map_irq_fn's were implemented below type_init() which made them inaccessible to QOM functions. So move them up. Signed-off-by: Bernhard Beschow Reviewed-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/isa/piix3.c | 22 +++++++++++----------- hw/isa/piix4.c | 50 +++++++++++++++++++++++++------------------------- 2 files changed, 36 insertions(+), 36 deletions(-) diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index d96ce2b788..c7a9014c3f 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -78,6 +78,17 @@ static void piix3_set_irq(void *opaque, int pirq, int le= vel) piix3_set_irq_level(piix3, pirq, level); } =20 +/* + * Return the global irq number corresponding to a given device irq + * pin. We could also use the bus number to have a more precise mapping. + */ +static int pci_slot_get_pirq(PCIDevice *pci_dev, int pci_intx) +{ + int slot_addend; + slot_addend =3D PCI_SLOT(pci_dev->devfn) - 1; + return (pci_intx + slot_addend) & 3; +} + static PCIINTxRoute piix3_route_intx_pin_to_irq(void *opaque, int pin) { PIIX3State *piix3 =3D opaque; @@ -350,17 +361,6 @@ static void piix3_register_types(void) =20 type_init(piix3_register_types) =20 -/* - * Return the global irq number corresponding to a given device irq - * pin. We could also use the bus number to have a more precise mapping. - */ -static int pci_slot_get_pirq(PCIDevice *pci_dev, int pci_intx) -{ - int slot_addend; - slot_addend =3D PCI_SLOT(pci_dev->devfn) - 1; - return (pci_intx + slot_addend) & 3; -} - PIIX3State *piix3_create(PCIBus *pci_bus, ISABus **isa_bus) { PIIX3State *piix3; diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 8607e0ac36..a223b69e24 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -73,6 +73,31 @@ static void piix4_set_irq(void *opaque, int irq_num, int= level) } } =20 +static int pci_slot_get_pirq(PCIDevice *pci_dev, int irq_num) +{ + int slot; + + slot =3D PCI_SLOT(pci_dev->devfn); + + switch (slot) { + /* PIIX4 USB */ + case 10: + return 3; + /* AMD 79C973 Ethernet */ + case 11: + return 1; + /* Crystal 4281 Sound */ + case 12: + return 2; + /* PCI slot 1 to 4 */ + case 18 ... 21: + return ((slot - 18) + irq_num) & 0x03; + /* Unknown device, don't do any translation */ + default: + return irq_num; + } +} + static void piix4_isa_reset(DeviceState *dev) { PIIX4State *d =3D PIIX4_PCI_DEVICE(dev); @@ -265,31 +290,6 @@ static void piix4_register_types(void) =20 type_init(piix4_register_types) =20 -static int pci_slot_get_pirq(PCIDevice *pci_dev, int irq_num) -{ - int slot; - - slot =3D PCI_SLOT(pci_dev->devfn); - - switch (slot) { - /* PIIX4 USB */ - case 10: - return 3; - /* AMD 79C973 Ethernet */ - case 11: - return 1; - /* Crystal 4281 Sound */ - case 12: - return 2; - /* PCI slot 1 to 4 */ - case 18 ... 21: - return ((slot - 18) + irq_num) & 0x03; - /* Unknown device, don't do any translation */ - default: - return irq_num; - } -} - DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbu= s) { PIIX4State *s; --=20 2.36.1 From nobody Fri Apr 26 18:05:05 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 165325517178973.4707832668829; Sun, 22 May 2022 14:32:51 -0700 (PDT) Received: from localhost ([::1]:46914 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nstBy-00046r-Cf for importer2@patchew.org; Sun, 22 May 2022 17:32:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:42454) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nst4T-0002xx-Ll; Sun, 22 May 2022 17:25:05 -0400 Received: from mail-ej1-x62d.google.com ([2a00:1450:4864:20::62d]:42532) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nst4R-0005SP-QB; Sun, 22 May 2022 17:25:05 -0400 Received: by mail-ej1-x62d.google.com with SMTP id i27so25016414ejd.9; Sun, 22 May 2022 14:25:03 -0700 (PDT) Received: from localhost.localdomain (dynamic-078-054-075-232.78.54.pool.telefonica.de. [78.54.75.232]) by smtp.gmail.com with ESMTPSA id w4-20020a170907270400b006f3ef214e22sm5418768ejk.136.2022.05.22.14.25.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 22 May 2022 14:25:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=U+UD5jMouYtP7bslZ2bQ9vwheRStZc9WMtVYW+dp4Pc=; b=Sh1bmCjwJG8fdznxKbZepARRbCVlWbPYbPjYBg0lGlD/uXJSWHg4UtYVHlj5WtWw2D YUwON2WpYk134Bu9n6aganRB/SgM4rzyzc+NlITS2Gg86gRE0uVS2OmU2IdQG9t30LUt ZLCXdA7tXThyP2edAU7vAccQb5ut4+6il4B/h0u80Ubg3EOkJAVL4gYWwzzkbW3jKbHA Rw//DIDqk5R0ZwuZetzEMENO8LkhNNd8sT7oLJvr0uKNFwWl/x8zMV4lomoydC1Ih6Oj xyscF+daAY00Ucfxf8aMFvRjQgRWP80x4jz6eJP5KOJyLXD+QXGDsOzVO0kDvJpRU6kB V4Rg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=U+UD5jMouYtP7bslZ2bQ9vwheRStZc9WMtVYW+dp4Pc=; b=niqxoxCOspdilVsFSGslATr9dMvVTVTrw1JOTixUZmpt3Hf7IDOU5JkZ5xTGUXz0Qt sAlLYxc7d/EbGVxe9kFjHNQeu2hlxkEP7VSnZ9yKB3YIiFkxfCZWaAfmi7W31AY/qzke Wjo+eGkDnepb47FQue9hsgTOPSwUj4J5mZ+f/Q3KyYAyxuS02YIqaZQkKUZEiksDgmZa QXdSlP4sDQzd9frWVfzjU6XWGwU/I+nNZeaNfw4RD+TNIEmh166heJzrsfubItwJr2Pi KO5GQWIoxaxV6GlbSWJKNZ7NYBES3r5+5fAmzBiKYsihv9udRl6PrbQgh6tXnI9MpWQv Bacw== X-Gm-Message-State: AOAM532Fho5tawTVBHaDxJnTUYuNUXZASqqSSDK7DOwoIFW4cAj3Pv/m 7R9ht8donTj/cXlArafVMsVuvMLB4rM= X-Google-Smtp-Source: ABdhPJynUPXZNHsCeu10/Dnjjl7JR/XDyod5VLrBMb3xaIeLuOfZ6ogZ9ZqrPEw2ejjCzZfrrDlP5A== X-Received: by 2002:a17:907:2d29:b0:6fe:c413:d9a4 with SMTP id gs41-20020a1709072d2900b006fec413d9a4mr5400778ejc.694.1653254701890; Sun, 22 May 2022 14:25:01 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: qemu-trivial@nongnu.org, Bernhard Beschow , Mark Cave-Ayland , "Michael S. Tsirkin" , Marcel Apfelbaum , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno Subject: [PATCH v2 3/6] hw/isa/piix{3, 4}: QOM'ify PCI device creation and wiring Date: Sun, 22 May 2022 23:24:28 +0200 Message-Id: <20220522212431.14598-4-shentey@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220522212431.14598-1-shentey@gmail.com> References: <20220522212431.14598-1-shentey@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::62d; envelope-from=shentey@gmail.com; helo=mail-ej1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1653255173095100001 Content-Type: text/plain; charset="utf-8" PCI interrupt wiring and device creation (piix4 only) were performed in create() functions which are obsolete. Move these tasks into QOM functions to modernize the code. In order to avoid duplicate checking for xen_enabled() the piix3 realize methods are now split. Signed-off-by: Bernhard Beschow Reviewed-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/isa/piix3.c | 67 +++++++++++++++++++++++++++++++++----------------- hw/isa/piix4.c | 20 +++++++++------ 2 files changed, 57 insertions(+), 30 deletions(-) diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index c7a9014c3f..de532cc692 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -24,6 +24,7 @@ =20 #include "qemu/osdep.h" #include "qemu/range.h" +#include "qapi/error.h" #include "hw/southbridge/piix.h" #include "hw/irq.h" #include "hw/isa/isa.h" @@ -277,7 +278,7 @@ static const MemoryRegionOps rcr_ops =3D { .endianness =3D DEVICE_LITTLE_ENDIAN }; =20 -static void piix3_realize(PCIDevice *dev, Error **errp) +static void pci_piix3_realize(PCIDevice *dev, Error **errp) { PIIX3State *d =3D PIIX3_PCI_DEVICE(dev); =20 @@ -302,7 +303,6 @@ static void pci_piix3_class_init(ObjectClass *klass, vo= id *data) dc->desc =3D "ISA bridge"; dc->vmsd =3D &vmstate_piix3; dc->hotpluggable =3D false; - k->realize =3D piix3_realize; k->vendor_id =3D PCI_VENDOR_ID_INTEL; /* 82371SB PIIX3 PCI-to-ISA bridge (Step A1) */ k->device_id =3D PCI_DEVICE_ID_INTEL_82371SB_0; @@ -326,11 +326,28 @@ static const TypeInfo piix3_pci_type_info =3D { }, }; =20 +static void piix3_realize(PCIDevice *dev, Error **errp) +{ + ERRP_GUARD(); + PIIX3State *piix3 =3D PIIX3_PCI_DEVICE(dev); + PCIBus *pci_bus =3D pci_get_bus(dev); + + pci_piix3_realize(dev, errp); + if (*errp) { + return; + } + + pci_bus_irqs(pci_bus, piix3_set_irq, pci_slot_get_pirq, + piix3, PIIX_NUM_PIRQS); + pci_bus_set_route_irq_fn(pci_bus, piix3_route_intx_pin_to_irq); +}; + static void piix3_class_init(ObjectClass *klass, void *data) { PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); =20 k->config_write =3D piix3_write_config; + k->realize =3D piix3_realize; } =20 static const TypeInfo piix3_info =3D { @@ -339,11 +356,33 @@ static const TypeInfo piix3_info =3D { .class_init =3D piix3_class_init, }; =20 +static void piix3_xen_realize(PCIDevice *dev, Error **errp) +{ + ERRP_GUARD(); + PIIX3State *piix3 =3D PIIX3_PCI_DEVICE(dev); + PCIBus *pci_bus =3D pci_get_bus(dev); + + pci_piix3_realize(dev, errp); + if (*errp) { + return; + } + + /* + * Xen supports additional interrupt routes from the PCI devices to + * the IOAPIC: the four pins of each PCI device on the bus are also + * connected to the IOAPIC directly. + * These additional routes can be discovered through ACPI. + */ + pci_bus_irqs(pci_bus, xen_piix3_set_irq, xen_pci_slot_get_pirq, + piix3, XEN_PIIX_NUM_PIRQS); +}; + static void piix3_xen_class_init(ObjectClass *klass, void *data) { PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); =20 k->config_write =3D piix3_write_config_xen; + k->realize =3D piix3_xen_realize; }; =20 static const TypeInfo piix3_xen_info =3D { @@ -365,27 +404,11 @@ PIIX3State *piix3_create(PCIBus *pci_bus, ISABus **is= a_bus) { PIIX3State *piix3; PCIDevice *pci_dev; + const char *type =3D xen_enabled() ? TYPE_PIIX3_XEN_DEVICE + : TYPE_PIIX3_DEVICE; =20 - /* - * Xen supports additional interrupt routes from the PCI devices to - * the IOAPIC: the four pins of each PCI device on the bus are also - * connected to the IOAPIC directly. - * These additional routes can be discovered through ACPI. - */ - if (xen_enabled()) { - pci_dev =3D pci_create_simple_multifunction(pci_bus, -1, true, - TYPE_PIIX3_XEN_DEVICE); - piix3 =3D PIIX3_PCI_DEVICE(pci_dev); - pci_bus_irqs(pci_bus, xen_piix3_set_irq, xen_pci_slot_get_pirq, - piix3, XEN_PIIX_NUM_PIRQS); - } else { - pci_dev =3D pci_create_simple_multifunction(pci_bus, -1, true, - TYPE_PIIX3_DEVICE); - piix3 =3D PIIX3_PCI_DEVICE(pci_dev); - pci_bus_irqs(pci_bus, piix3_set_irq, pci_slot_get_pirq, - piix3, PIIX_NUM_PIRQS); - pci_bus_set_route_irq_fn(pci_bus, piix3_route_intx_pin_to_irq); - } + pci_dev =3D pci_create_simple_multifunction(pci_bus, -1, true, type); + piix3 =3D PIIX3_PCI_DEVICE(pci_dev); *isa_bus =3D ISA_BUS(qdev_get_child_bus(DEVICE(piix3), "isa.0")); =20 return piix3; diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index a223b69e24..134d23aea7 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -204,6 +204,8 @@ static const MemoryRegionOps piix4_rcr_ops =3D { static void piix4_realize(PCIDevice *dev, Error **errp) { PIIX4State *s =3D PIIX4_PCI_DEVICE(dev); + PCIDevice *pci; + PCIBus *pci_bus =3D pci_get_bus(dev); ISABus *isa_bus; qemu_irq *i8259_out_irq; =20 @@ -242,6 +244,15 @@ static void piix4_realize(PCIDevice *dev, Error **errp) return; } s->rtc.irq =3D isa_get_irq(ISA_DEVICE(&s->rtc), s->rtc.isairq); + + /* IDE */ + pci =3D pci_create_simple(pci_bus, dev->devfn + 1, "piix4-ide"); + pci_ide_create_devs(pci); + + /* USB */ + pci_create_simple(pci_bus, dev->devfn + 2, "piix4-usb-uhci"); + + pci_bus_irqs(pci_bus, piix4_set_irq, pci_slot_get_pirq, s, PIIX_NUM_PI= RQS); } =20 static void piix4_init(Object *obj) @@ -292,7 +303,6 @@ type_init(piix4_register_types) =20 DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbu= s) { - PIIX4State *s; PCIDevice *pci; DeviceState *dev; int devfn =3D PCI_DEVFN(10, 0); @@ -300,22 +310,16 @@ DeviceState *piix4_create(PCIBus *pci_bus, ISABus **i= sa_bus, I2CBus **smbus) pci =3D pci_create_simple_multifunction(pci_bus, devfn, true, TYPE_PIIX4_PCI_DEVICE); dev =3D DEVICE(pci); - s =3D PIIX4_PCI_DEVICE(pci); + if (isa_bus) { *isa_bus =3D ISA_BUS(qdev_get_child_bus(dev, "isa.0")); } =20 - pci =3D pci_create_simple(pci_bus, devfn + 1, "piix4-ide"); - pci_ide_create_devs(pci); - - pci_create_simple(pci_bus, devfn + 2, "piix4-usb-uhci"); if (smbus) { *smbus =3D piix4_pm_init(pci_bus, devfn + 3, 0x1100, qdev_get_gpio_in_named(dev, "isa", 9), NULL, 0, NULL); } =20 - pci_bus_irqs(pci_bus, piix4_set_irq, pci_slot_get_pirq, s, PIIX_NUM_PI= RQS); - return dev; } --=20 2.36.1 From nobody Fri Apr 26 18:05:05 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1653255287312281.79866228974925; Sun, 22 May 2022 14:34:47 -0700 (PDT) Received: from localhost ([::1]:51232 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nstDp-00073Y-MO for importer2@patchew.org; Sun, 22 May 2022 17:34:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:42490) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nst4U-0002zf-Up; Sun, 22 May 2022 17:25:07 -0400 Received: from mail-ed1-x52b.google.com ([2a00:1450:4864:20::52b]:36447) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nst4T-0005bD-31; Sun, 22 May 2022 17:25:06 -0400 Received: by mail-ed1-x52b.google.com with SMTP id fd25so16888746edb.3; Sun, 22 May 2022 14:25:04 -0700 (PDT) Received: from localhost.localdomain (dynamic-078-054-075-232.78.54.pool.telefonica.de. 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Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , Richard Henderson , Eduardo Habkost , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , =?UTF-8?q?Herv=C3=A9=20Poussineau?= Subject: [PATCH v2 4/6] hw/isa/piix{3, 4}: Factor out ISABus retrieval from create() functions Date: Sun, 22 May 2022 23:24:29 +0200 Message-Id: <20220522212431.14598-5-shentey@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220522212431.14598-1-shentey@gmail.com> References: <20220522212431.14598-1-shentey@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::52b; envelope-from=shentey@gmail.com; helo=mail-ed1-x52b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1653255287719100001 Content-Type: text/plain; charset="utf-8" Modernizes the code and even saves a few lines. Signed-off-by: Bernhard Beschow Reviewed-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/i386/pc_piix.c | 3 ++- hw/isa/piix3.c | 3 +-- hw/isa/piix4.c | 6 +----- hw/mips/malta.c | 3 ++- include/hw/southbridge/piix.h | 4 ++-- 5 files changed, 8 insertions(+), 11 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 578e537b35..4d4b83a27d 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -206,9 +206,10 @@ static void pc_init1(MachineState *machine, pci_memory, ram_memory); pcms->bus =3D pci_bus; =20 - piix3 =3D piix3_create(pci_bus, &isa_bus); + piix3 =3D piix3_create(pci_bus); piix3->pic =3D x86ms->gsi; piix3_devfn =3D piix3->dev.devfn; + isa_bus =3D ISA_BUS(qdev_get_child_bus(DEVICE(piix3), "isa.0")); } else { pci_bus =3D NULL; i440fx_state =3D NULL; diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index de532cc692..c6ff7795f4 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -400,7 +400,7 @@ static void piix3_register_types(void) =20 type_init(piix3_register_types) =20 -PIIX3State *piix3_create(PCIBus *pci_bus, ISABus **isa_bus) +PIIX3State *piix3_create(PCIBus *pci_bus) { PIIX3State *piix3; PCIDevice *pci_dev; @@ -409,7 +409,6 @@ PIIX3State *piix3_create(PCIBus *pci_bus, ISABus **isa_= bus) =20 pci_dev =3D pci_create_simple_multifunction(pci_bus, -1, true, type); piix3 =3D PIIX3_PCI_DEVICE(pci_dev); - *isa_bus =3D ISA_BUS(qdev_get_child_bus(DEVICE(piix3), "isa.0")); =20 return piix3; } diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 134d23aea7..4968c69da9 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -301,7 +301,7 @@ static void piix4_register_types(void) =20 type_init(piix4_register_types) =20 -DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbu= s) +DeviceState *piix4_create(PCIBus *pci_bus, I2CBus **smbus) { PCIDevice *pci; DeviceState *dev; @@ -311,10 +311,6 @@ DeviceState *piix4_create(PCIBus *pci_bus, ISABus **is= a_bus, I2CBus **smbus) TYPE_PIIX4_PCI_DEVICE); dev =3D DEVICE(pci); =20 - if (isa_bus) { - *isa_bus =3D ISA_BUS(qdev_get_child_bus(dev, "isa.0")); - } - if (smbus) { *smbus =3D piix4_pm_init(pci_bus, devfn + 3, 0x1100, qdev_get_gpio_in_named(dev, "isa", 9), diff --git a/hw/mips/malta.c b/hw/mips/malta.c index 9ffdc5b8f1..e446b25ad0 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -1399,7 +1399,8 @@ void mips_malta_init(MachineState *machine) empty_slot_init("GT64120", 0, 0x20000000); =20 /* Southbridge */ - dev =3D piix4_create(pci_bus, &isa_bus, &smbus); + dev =3D piix4_create(pci_bus, &smbus); + isa_bus =3D ISA_BUS(qdev_get_child_bus(dev, "isa.0")); =20 /* Interrupt controller */ qdev_connect_gpio_out_named(dev, "intr", 0, i8259_irq); diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index 4d17400dfd..0bec7f8ca3 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -74,8 +74,8 @@ DECLARE_INSTANCE_CHECKER(PIIX3State, PIIX3_PCI_DEVICE, #define TYPE_PIIX3_XEN_DEVICE "PIIX3-xen" #define TYPE_PIIX4_PCI_DEVICE "piix4-isa" =20 -PIIX3State *piix3_create(PCIBus *pci_bus, ISABus **isa_bus); +PIIX3State *piix3_create(PCIBus *pci_bus); =20 -DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbu= s); +DeviceState *piix4_create(PCIBus *pci_bus, I2CBus **smbus); =20 #endif --=20 2.36.1 From nobody Fri Apr 26 18:05:05 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; 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Tsirkin" , Marcel Apfelbaum Subject: [PATCH v2 5/6] hw/isa/piix4: QOM'ify PIIX4 PM creation Date: Sun, 22 May 2022 23:24:30 +0200 Message-Id: <20220522212431.14598-6-shentey@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220522212431.14598-1-shentey@gmail.com> References: <20220522212431.14598-1-shentey@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::52a; envelope-from=shentey@gmail.com; helo=mail-ed1-x52a.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1653255177120100001 Content-Type: text/plain; charset="utf-8" Just like the real hardware, create the PIIX4 ACPI controller as part of the PIIX4 southbridge. This also mirrors how the IDE and USB functions are already created. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/isa/piix4.c | 14 +++++++------- hw/mips/malta.c | 3 ++- include/hw/southbridge/piix.h | 2 +- 3 files changed, 10 insertions(+), 9 deletions(-) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 4968c69da9..1645f63450 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -206,6 +206,7 @@ static void piix4_realize(PCIDevice *dev, Error **errp) PIIX4State *s =3D PIIX4_PCI_DEVICE(dev); PCIDevice *pci; PCIBus *pci_bus =3D pci_get_bus(dev); + I2CBus *smbus; ISABus *isa_bus; qemu_irq *i8259_out_irq; =20 @@ -252,6 +253,11 @@ static void piix4_realize(PCIDevice *dev, Error **errp) /* USB */ pci_create_simple(pci_bus, dev->devfn + 2, "piix4-usb-uhci"); =20 + /* ACPI controller */ + smbus =3D piix4_pm_init(pci_bus, pci->devfn + 3, 0x1100, s->isa[9], + NULL, 0, NULL); + object_property_add_const_link(OBJECT(s), "smbus", OBJECT(smbus)); + pci_bus_irqs(pci_bus, piix4_set_irq, pci_slot_get_pirq, s, PIIX_NUM_PI= RQS); } =20 @@ -301,7 +307,7 @@ static void piix4_register_types(void) =20 type_init(piix4_register_types) =20 -DeviceState *piix4_create(PCIBus *pci_bus, I2CBus **smbus) +DeviceState *piix4_create(PCIBus *pci_bus) { PCIDevice *pci; DeviceState *dev; @@ -311,11 +317,5 @@ DeviceState *piix4_create(PCIBus *pci_bus, I2CBus **sm= bus) TYPE_PIIX4_PCI_DEVICE); dev =3D DEVICE(pci); =20 - if (smbus) { - *smbus =3D piix4_pm_init(pci_bus, devfn + 3, 0x1100, - qdev_get_gpio_in_named(dev, "isa", 9), - NULL, 0, NULL); - } - return dev; } diff --git a/hw/mips/malta.c b/hw/mips/malta.c index e446b25ad0..b0fc84ccbb 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -1399,8 +1399,9 @@ void mips_malta_init(MachineState *machine) empty_slot_init("GT64120", 0, 0x20000000); =20 /* Southbridge */ - dev =3D piix4_create(pci_bus, &smbus); + dev =3D piix4_create(pci_bus); isa_bus =3D ISA_BUS(qdev_get_child_bus(dev, "isa.0")); + smbus =3D I2C_BUS(qdev_get_child_bus(dev, "smbus")); =20 /* Interrupt controller */ qdev_connect_gpio_out_named(dev, "intr", 0, i8259_irq); diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index 0bec7f8ca3..2c21359efa 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -76,6 +76,6 @@ DECLARE_INSTANCE_CHECKER(PIIX3State, PIIX3_PCI_DEVICE, =20 PIIX3State *piix3_create(PCIBus *pci_bus); =20 -DeviceState *piix4_create(PCIBus *pci_bus, I2CBus **smbus); +DeviceState *piix4_create(PCIBus *pci_bus); =20 #endif --=20 2.36.1 From nobody Fri Apr 26 18:05:05 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1653255146657511.33871572630824; Sun, 22 May 2022 14:32:26 -0700 (PDT) Received: from localhost ([::1]:45390 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nstBZ-00033X-M9 for importer2@patchew.org; Sun, 22 May 2022 17:32:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:42558) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nst4k-00032p-KL; Sun, 22 May 2022 17:25:23 -0400 Received: from mail-ed1-x536.google.com ([2a00:1450:4864:20::536]:37771) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nst4U-0005Ra-LX; Sun, 22 May 2022 17:25:21 -0400 Received: by mail-ed1-x536.google.com with SMTP id g12so16889770edq.4; Sun, 22 May 2022 14:25:05 -0700 (PDT) Received: from localhost.localdomain (dynamic-078-054-075-232.78.54.pool.telefonica.de. [78.54.75.232]) by smtp.gmail.com with ESMTPSA id w4-20020a170907270400b006f3ef214e22sm5418768ejk.136.2022.05.22.14.25.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 22 May 2022 14:25:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ms/fgc7qSf1SFBWjA0tWYJPoXLw6U95ylXqfipQmeY4=; b=T4znpBRKiDnUq8FR0LzlZ16kpKNZSm9c++IzHjt3McyDLFrvn2553oo+5VL3qCp0lg 0+Sxjrxr+iois76tEUa7cdzJWN+mKFL2KjmtmBhwXZXcpubvgE+gojD5kFMgfZpy0Ldh c0YHvuWFbGNVnmwGCi98KekqwQbv9yYOLqONpUHX8Elurrr5CMyiV3qArEOnln+hZHL1 a234Gef++ZV4EiDI0Jxhasqznv2X41WCCb7fFTsyW+axT64a181VAL855L4VT41XjWGs 1NEa3LK5k0TfzDJ+tt5w+JUliPfdNRsFTqtXTUBL7kJVBVDRQ+CSTYUWApZF3DvuLkLJ 7//g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ms/fgc7qSf1SFBWjA0tWYJPoXLw6U95ylXqfipQmeY4=; b=NR3nYtupeg3iiaFR9sGuiUjwvVLHmLJaKkqoEZ6GPHd6/Bk/zIgx4Jt9YQPN4fCq4v bBX6WBP2Z5VITZHB721FPpb3Od2vmkYHp8/NVXQORpW5FXfDzFcN+oXKuajKCBJpcFrN 844ikM8MmU4kFMr0QCwfSPKN9NtTgiMrWufHnVSlHjNHsYg6KIcFgFriNssqXkPOOQeC 4dh3SASrJAcwrHIT0vG/gajj51yRKWSWdBcvjKH81RIQzJSWernnJS8aqkE1QjDKAexH DxaUQK6g3lNalA1h0L3H6G/WCjANMoWGfSLUqZs78wsysAiJIL1tWB4GNRHRP5idqbX4 gLRw== X-Gm-Message-State: AOAM533mvRzGrhSRASTWxC36aj8s14A01kbh4dn+NU9sxqf13Pkc2uig krLL0FVhzvFkWUX38162VYoth10aYGY= X-Google-Smtp-Source: ABdhPJx6hdf47umXt/Yh2IP5FJ/rH5QjJ3czJ0/+S1htx4Dl8xzFnBCtr9b4xNoYjTEDSZJdySzIzg== X-Received: by 2002:a05:6402:2949:b0:425:a52a:28c5 with SMTP id ed9-20020a056402294900b00425a52a28c5mr20543569edb.389.1653254705423; Sun, 22 May 2022 14:25:05 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: qemu-trivial@nongnu.org, Bernhard Beschow , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , Richard Henderson , Eduardo Habkost , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno Subject: [PATCH v2 6/6] hw/isa/piix{3, 4}: Inline and remove create() functions Date: Sun, 22 May 2022 23:24:31 +0200 Message-Id: <20220522212431.14598-7-shentey@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220522212431.14598-1-shentey@gmail.com> References: <20220522212431.14598-1-shentey@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::536; envelope-from=shentey@gmail.com; helo=mail-ed1-x536.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1653255147092100001 Content-Type: text/plain; charset="utf-8" During the previous changesets the create() functions became trivial wrappers around more generic functions. Modernize the code. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/i386/pc_piix.c | 6 +++++- hw/isa/piix3.c | 13 ------------- hw/isa/piix4.c | 13 ------------- hw/mips/malta.c | 5 ++++- include/hw/southbridge/piix.h | 4 ---- 5 files changed, 9 insertions(+), 32 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 4d4b83a27d..989e101ed6 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -196,6 +196,9 @@ static void pc_init1(MachineState *machine, =20 if (pcmc->pci_enabled) { PIIX3State *piix3; + PCIDevice *pci_dev; + const char *type =3D xen_enabled() ? TYPE_PIIX3_XEN_DEVICE + : TYPE_PIIX3_DEVICE; =20 pci_bus =3D i440fx_init(host_type, pci_type, @@ -206,7 +209,8 @@ static void pc_init1(MachineState *machine, pci_memory, ram_memory); pcms->bus =3D pci_bus; =20 - piix3 =3D piix3_create(pci_bus); + pci_dev =3D pci_create_simple_multifunction(pci_bus, -1, true, typ= e); + piix3 =3D PIIX3_PCI_DEVICE(pci_dev); piix3->pic =3D x86ms->gsi; piix3_devfn =3D piix3->dev.devfn; isa_bus =3D ISA_BUS(qdev_get_child_bus(DEVICE(piix3), "isa.0")); diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index c6ff7795f4..01c376b39a 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -399,16 +399,3 @@ static void piix3_register_types(void) } =20 type_init(piix3_register_types) - -PIIX3State *piix3_create(PCIBus *pci_bus) -{ - PIIX3State *piix3; - PCIDevice *pci_dev; - const char *type =3D xen_enabled() ? TYPE_PIIX3_XEN_DEVICE - : TYPE_PIIX3_DEVICE; - - pci_dev =3D pci_create_simple_multifunction(pci_bus, -1, true, type); - piix3 =3D PIIX3_PCI_DEVICE(pci_dev); - - return piix3; -} diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 1645f63450..aabbda3e91 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -306,16 +306,3 @@ static void piix4_register_types(void) } =20 type_init(piix4_register_types) - -DeviceState *piix4_create(PCIBus *pci_bus) -{ - PCIDevice *pci; - DeviceState *dev; - int devfn =3D PCI_DEVFN(10, 0); - - pci =3D pci_create_simple_multifunction(pci_bus, devfn, true, - TYPE_PIIX4_PCI_DEVICE); - dev =3D DEVICE(pci); - - return dev; -} diff --git a/hw/mips/malta.c b/hw/mips/malta.c index b0fc84ccbb..7afc4bac9a 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -1238,6 +1238,7 @@ void mips_malta_init(MachineState *machine) int be; MaltaState *s; DeviceState *dev; + PCIDevice *piix4; =20 s =3D MIPS_MALTA(qdev_new(TYPE_MIPS_MALTA)); sysbus_realize_and_unref(SYS_BUS_DEVICE(s), &error_fatal); @@ -1399,7 +1400,9 @@ void mips_malta_init(MachineState *machine) empty_slot_init("GT64120", 0, 0x20000000); =20 /* Southbridge */ - dev =3D piix4_create(pci_bus); + piix4 =3D pci_create_simple_multifunction(pci_bus, PCI_DEVFN(10, 0), t= rue, + TYPE_PIIX4_PCI_DEVICE); + dev =3D DEVICE(piix4); isa_bus =3D ISA_BUS(qdev_get_child_bus(dev, "isa.0")); smbus =3D I2C_BUS(qdev_get_child_bus(dev, "smbus")); =20 diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index 2c21359efa..2d55dbdef7 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -74,8 +74,4 @@ DECLARE_INSTANCE_CHECKER(PIIX3State, PIIX3_PCI_DEVICE, #define TYPE_PIIX3_XEN_DEVICE "PIIX3-xen" #define TYPE_PIIX4_PCI_DEVICE "piix4-isa" =20 -PIIX3State *piix3_create(PCIBus *pci_bus); - -DeviceState *piix4_create(PCIBus *pci_bus); - #endif --=20 2.36.1