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([2605:ef80:80f6:61fa:9bc2:5095:d612:5e22]) by smtp.gmail.com with ESMTPSA id y23-20020a056870b01700b0010ef8ccde67sm2285220oae.13.2022.08.16.13.35.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Aug 2022 13:35:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=RKoJ35vLYvCsMuP+JFswrPYXmhyjLc71nVTkFzG8E7k=; b=AsluQiStnRkJ9ZaIy06VakISyMKR5BOUXAO5Xqc8K9AksyMOFQGZgBWvu4nLZD0JV1 8U7v+uW9Nyc5aq9BsgB5dVMw5VG0HJ9SCHo5A6INEaZ7r4XTNE/MLX+aTzdlSFYtydMj M2VqrfWS8cilzwtl0lugDXQWxazN0woSIaoZsNvLvOIQSEpKxhpa+VYr9JVU7QydtlIb 7XTbbNOeBIT5ryaf4Yvj2jAQf32Y5b20GcYsEi000dqZuFNBmrIFn3JFxl0lsX9f3T3z oewh4/1aid3AEt+3DajeAoRROSt/hXcqL+22ddp1iEHClzkifu17RhcLdfDr9ROnVt1p yRUQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=RKoJ35vLYvCsMuP+JFswrPYXmhyjLc71nVTkFzG8E7k=; b=itINSe/aJFHP5eL5iv8q3BC68Q/fWnRrHlhNvV6v4ddU7ImAwtyz0zWMO7p252FJTh E3rzS3LYsZlz85nuswWtm1KfInnwtCrTt3/RiiHyCq1hbg8KAgpT3rnEPokxKf2n9ZZQ tbZBVkN+DNNk4rdq21w1aGigUr+GjNkUxI6fS7hFlSK1TZmtYi2PZt7a/AO1MXYVXF4R uzLuMes2V+MYkgnBrvpShTJRvIeeqwppR7ycsJGT3z+O7R3wYjOJ7RbE5tz5c3sTnoZj c7Tv/sKDv551m5nGBMGb+mKre4ESVBtXWmbmuNCluW20nqS1VMQrYZI0/tYSHYtYb9pP qx/Q== X-Gm-Message-State: ACgBeo3vlpPhZJeNRUJr//MsYWG4+YkTqfFTZFSOMaMh1hKuABGQVyAI VzDo1mQTWo9D+WgZxVvvaxVrfwgYIQueOA== X-Google-Smtp-Source: AA6agR7SIDrWaQqZyR0NcGxcxy3SayxeSHaF0Zs3jxzOP23dVgfRHaM8P26FdVtnPAaWS80FNMnwWA== X-Received: by 2002:a05:6870:b52c:b0:10e:e9e2:81b2 with SMTP id v44-20020a056870b52c00b0010ee9e281b2mr143761oap.75.1660682105910; Tue, 16 Aug 2022 13:35:05 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, alex.bennee@linaro.org, iii@linux.ibm.com Subject: [PATCH v2 30/33] target/arm: Change gen_jmp* to work on displacements Date: Tue, 16 Aug 2022 15:33:57 -0500 Message-Id: <20220816203400.161187-31-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220816203400.161187-1-richard.henderson@linaro.org> References: <20220816203400.161187-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:4860:4864:20::35; envelope-from=richard.henderson@linaro.org; helo=mail-oa1-x35.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1660684611618100001 Content-Type: text/plain; charset="utf-8" In preparation for TARGET_TB_PCREL, reduce reliance on absolute values. Signed-off-by: Richard Henderson --- target/arm/translate.c | 35 ++++++++++++++++++++--------------- 1 file changed, 20 insertions(+), 15 deletions(-) diff --git a/target/arm/translate.c b/target/arm/translate.c index 63a41ed438..4d13e365e2 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -270,6 +270,12 @@ static uint32_t read_pc(DisasContext *s) return s->pc_curr + (s->thumb ? 4 : 8); } =20 +/* The pc_curr difference for an architectural jump. */ +static int jmp_diff(DisasContext *s, int diff) +{ + return diff + (s->thumb ? 4 : 8); +} + /* Set a variable to the value of a CPU register. */ void load_reg_var(DisasContext *s, TCGv_i32 var, int reg) { @@ -2614,10 +2620,8 @@ static void gen_goto_tb(DisasContext *s, int n, int = diff) } =20 /* Jump, specifying which TB number to use if we gen_goto_tb() */ -static inline void gen_jmp_tb(DisasContext *s, uint32_t dest, int tbno) +static void gen_jmp_tb(DisasContext *s, int diff, int tbno) { - int diff =3D dest - s->pc_curr; - if (unlikely(s->ss_active)) { /* An indirect jump so that we still trigger the debug exception. = */ gen_update_pc(s, diff); @@ -2659,9 +2663,9 @@ static inline void gen_jmp_tb(DisasContext *s, uint32= _t dest, int tbno) } } =20 -static inline void gen_jmp(DisasContext *s, uint32_t dest) +static inline void gen_jmp(DisasContext *s, int diff) { - gen_jmp_tb(s, dest, 0); + gen_jmp_tb(s, diff, 0); } =20 static inline void gen_mulxy(TCGv_i32 t0, TCGv_i32 t1, int x, int y) @@ -8331,7 +8335,7 @@ static bool trans_CLRM(DisasContext *s, arg_CLRM *a) =20 static bool trans_B(DisasContext *s, arg_i *a) { - gen_jmp(s, read_pc(s) + a->imm); + gen_jmp(s, jmp_diff(s, a->imm)); return true; } =20 @@ -8346,14 +8350,14 @@ static bool trans_B_cond_thumb(DisasContext *s, arg= _ci *a) return true; } arm_skip_unless(s, a->cond); - gen_jmp(s, read_pc(s) + a->imm); + gen_jmp(s, jmp_diff(s, a->imm)); return true; } =20 static bool trans_BL(DisasContext *s, arg_i *a) { tcg_gen_movi_i32(cpu_R[14], s->base.pc_next | s->thumb); - gen_jmp(s, read_pc(s) + a->imm); + gen_jmp(s, jmp_diff(s, a->imm)); return true; } =20 @@ -8373,7 +8377,8 @@ static bool trans_BLX_i(DisasContext *s, arg_BLX_i *a) } tcg_gen_movi_i32(cpu_R[14], s->base.pc_next | s->thumb); store_cpu_field_constant(!s->thumb, thumb); - gen_jmp(s, (read_pc(s) & ~3) + a->imm); + /* This difference computes a page offset so ok for TARGET_TB_PCREL. */ + gen_jmp(s, (read_pc(s) & ~3) - s->pc_curr + a->imm); return true; } =20 @@ -8534,10 +8539,10 @@ static bool trans_WLS(DisasContext *s, arg_WLS *a) * when we take this upcoming exit from this TB, so gen_jmp_tb() i= s OK. */ } - gen_jmp_tb(s, s->base.pc_next, 1); + gen_jmp_tb(s, curr_insn_len(s), 1); =20 gen_set_label(nextlabel); - gen_jmp(s, read_pc(s) + a->imm); + gen_jmp(s, jmp_diff(s, a->imm)); return true; } =20 @@ -8617,7 +8622,7 @@ static bool trans_LE(DisasContext *s, arg_LE *a) =20 if (a->f) { /* Loop-forever: just jump back to the loop start */ - gen_jmp(s, read_pc(s) - a->imm); + gen_jmp(s, jmp_diff(s, -a->imm)); return true; } =20 @@ -8648,7 +8653,7 @@ static bool trans_LE(DisasContext *s, arg_LE *a) tcg_temp_free_i32(decr); } /* Jump back to the loop start */ - gen_jmp(s, read_pc(s) - a->imm); + gen_jmp(s, jmp_diff(s, -a->imm)); =20 gen_set_label(loopend); if (a->tp) { @@ -8656,7 +8661,7 @@ static bool trans_LE(DisasContext *s, arg_LE *a) store_cpu_field(tcg_constant_i32(4), v7m.ltpsize); } /* End TB, continuing to following insn */ - gen_jmp_tb(s, s->base.pc_next, 1); + gen_jmp_tb(s, curr_insn_len(s), 1); return true; } =20 @@ -8755,7 +8760,7 @@ static bool trans_CBZ(DisasContext *s, arg_CBZ *a) tcg_gen_brcondi_i32(a->nz ? TCG_COND_EQ : TCG_COND_NE, tmp, 0, s->condlabel); tcg_temp_free_i32(tmp); - gen_jmp(s, read_pc(s) + a->imm); + gen_jmp(s, jmp_diff(s, a->imm)); return true; } =20 --=20 2.34.1