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[PATCH] target/tricore: Fix OPC1_16_SRO_LD_H translation

Anton Kochkov posted 1 patch 2 months, 2 weeks ago 
target/tricore/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
[PATCH] target/tricore: Fix OPC1_16_SRO_LD_H translation
Posted by Anton Kochkov 2 months, 2 weeks ago 
Signed-off-by: Eitan Eliahu <eitan_eliahu@hotmail.com>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/652
---
 target/tricore/translate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/tricore/translate.c b/target/tricore/translate.c
index df9e46c649..b2a5e11778 100644
--- a/target/tricore/translate.c
+++ b/target/tricore/translate.c
@@ -3878,7 +3878,7 @@ static void decode_sro_opc(DisasContext *ctx, int op1)
         gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address, MO_UB);
         break;
     case OPC1_16_SRO_LD_H:
-        gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address, MO_LESW);
+        gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address * 2, MO_LESW);
         break;
     case OPC1_16_SRO_LD_W:
         gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address * 4, MO_LESL);
--
2.39.0
Re: [PATCH] target/tricore: Fix OPC1_16_SRO_LD_H translation
Posted by Bastian Koppelmann 2 months, 2 weeks ago 
On Thu, Jan 12, 2023 at 02:24:02PM +0000, Anton Kochkov wrote:
> Signed-off-by: Eitan Eliahu <eitan_eliahu@hotmail.com>
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/652
> ---
>  target/tricore/translate.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/target/tricore/translate.c b/target/tricore/translate.c
> index df9e46c649..b2a5e11778 100644
> --- a/target/tricore/translate.c
> +++ b/target/tricore/translate.c
> @@ -3878,7 +3878,7 @@ static void decode_sro_opc(DisasContext *ctx, int op1)
>          gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address, MO_UB);
>          break;
>      case OPC1_16_SRO_LD_H:
> -        gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address, MO_LESW);
> +        gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address * 2, MO_LESW);
>          break;
>      case OPC1_16_SRO_LD_W:
>          gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address * 4, MO_LESL);
> --
> 2.39.0

Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>

As Phil said, good catch. I added it to my TriCore queue. 

I saw on the bugtracker that you have testcase. Are you interested in adding it to
tests/tcg/tricore?

Cheers,
Bastian
Re: [PATCH] target/tricore: Fix OPC1_16_SRO_LD_H translation
Posted by Anton Kochkov 1 month, 3 weeks ago 
------- Original Message -------
On Friday, January 13th, 2023 at 5:03 AM, Bastian Koppelmann <kbastian@mail.uni-paderborn.de> wrote:


> 
> 
> On Thu, Jan 12, 2023 at 02:24:02PM +0000, Anton Kochkov wrote:
> 
> > Signed-off-by: Eitan Eliahu eitan_eliahu@hotmail.com
> > Resolves: https://gitlab.com/qemu-project/qemu/-/issues/652
> > ---
> > target/tricore/translate.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/target/tricore/translate.c b/target/tricore/translate.c
> > index df9e46c649..b2a5e11778 100644
> > --- a/target/tricore/translate.c
> > +++ b/target/tricore/translate.c
> > @@ -3878,7 +3878,7 @@ static void decode_sro_opc(DisasContext *ctx, int op1)
> > gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address, MO_UB);
> > break;
> > case OPC1_16_SRO_LD_H:
> > - gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address, MO_LESW);
> > + gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address * 2, MO_LESW);
> > break;
> > case OPC1_16_SRO_LD_W:
> > gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address * 4, MO_LESL);
> > --
> > 2.39.0
> 
> 
> Reviewed-by: Bastian Koppelmann kbastian@mail.uni-paderborn.de
> 
> 
> As Phil said, good catch. I added it to my TriCore queue.
> 
> I saw on the bugtracker that you have testcase. Are you interested in adding it to
> tests/tcg/tricore?

Sorry for the late answer - it's not me who initially opened the original issue thus I don't have a test case.
Re: [PATCH] target/tricore: Fix OPC1_16_SRO_LD_H translation
Posted by Bastian Koppelmann 1 month, 2 weeks ago 
On Thu, Feb 02, 2023 at 03:55:53PM +0000, Anton Kochkov wrote:
> ------- Original Message -------
> On Friday, January 13th, 2023 at 5:03 AM, Bastian Koppelmann <kbastian@mail.uni-paderborn.de> wrote:
> 
> 
> > 
> > 
> > On Thu, Jan 12, 2023 at 02:24:02PM +0000, Anton Kochkov wrote:
> > 
> > > Signed-off-by: Eitan Eliahu eitan_eliahu@hotmail.com
> > > Resolves: https://gitlab.com/qemu-project/qemu/-/issues/652
> > > ---
> > > target/tricore/translate.c | 2 +-
> > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > > 
> > > diff --git a/target/tricore/translate.c b/target/tricore/translate.c
> > > index df9e46c649..b2a5e11778 100644
> > > --- a/target/tricore/translate.c
> > > +++ b/target/tricore/translate.c
> > > @@ -3878,7 +3878,7 @@ static void decode_sro_opc(DisasContext *ctx, int op1)
> > > gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address, MO_UB);
> > > break;
> > > case OPC1_16_SRO_LD_H:
> > > - gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address, MO_LESW);
> > > + gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address * 2, MO_LESW);
> > > break;
> > > case OPC1_16_SRO_LD_W:
> > > gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address * 4, MO_LESL);
> > > --
> > > 2.39.0
> > 
> > 
> > Reviewed-by: Bastian Koppelmann kbastian@mail.uni-paderborn.de
> > 
> > 
> > As Phil said, good catch. I added it to my TriCore queue.
> > 
> > I saw on the bugtracker that you have testcase. Are you interested in adding it to
> > tests/tcg/tricore?
> 
> Sorry for the late answer - it's not me who initially opened the original issue thus I don't have a test case.

No worries. I created a test myself (see
https://lore.kernel.org/qemu-devel/20230203132132.511254-1-kbastian@mail.uni-paderborn.de/)

Cheers,
Bastian


>
Re: [PATCH] target/tricore: Fix OPC1_16_SRO_LD_H translation
Posted by Philippe Mathieu-Daudé 2 months, 2 weeks ago 
On 12/1/23 15:24, Anton Kochkov wrote:

Fixes: 5a7634a28c ("target-tricore: Add instructions of SLR, SSRO and 
SRO opcode format")

> Signed-off-by: Eitan Eliahu <eitan_eliahu@hotmail.com>
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/652
> ---
>   target/tricore/translate.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/target/tricore/translate.c b/target/tricore/translate.c
> index df9e46c649..b2a5e11778 100644
> --- a/target/tricore/translate.c
> +++ b/target/tricore/translate.c
> @@ -3878,7 +3878,7 @@ static void decode_sro_opc(DisasContext *ctx, int op1)
>           gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address, MO_UB);
>           break;
>       case OPC1_16_SRO_LD_H:
> -        gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address, MO_LESW);
> +        gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address * 2, MO_LESW);

Good catch!

>           break;
>       case OPC1_16_SRO_LD_W:
>           gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address * 4, MO_LESL);
> --
> 2.39.0

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>

Patchew 2.1-devel-8c64711

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