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Tsirkin" , Marcel Apfelbaum , Marcel Apfelbaum , Andrew Jones , Laszlo Ersek , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= Subject: [PATCH] docs/pcie.txt: Replace ioh3420 with pcie-root-port Date: Mon, 23 Jan 2023 17:42:05 +0000 Message-Id: <20230123174205.683979-1-berrange@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.1 on 10.11.54.9 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=berrange@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer2=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1674495780894100003 From: Marcel Apfelbaum Do not mention ioh3420 in the "how to" doc. The device still works and can be used by already existing setups, but no need to be mentioned. Suggested-by: Andrew Jones Reviewed-by: Laszlo Ersek Signed-off-by: Marcel Apfelbaum Signed-off-by: Daniel P. Berrang=C3=A9 --- This patch was posted 5 years ago: https://lore.kernel.org/all/20170802155113.62471-1-marcel@redhat.com/ but seems to have fallen through the cracks and did not get merged. This just had the obvious/trivial conflict resolution done, along with trimming hugely excessive whitespace before the '\' line continuation. docs/pcie.txt | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/docs/pcie.txt b/docs/pcie.txt index 89e3502075..df49178311 100644 --- a/docs/pcie.txt +++ b/docs/pcie.txt @@ -48,8 +48,8 @@ Place only the following kinds of devices directly on the= Root Complex: strangely when PCI Express devices are integrated with the Root Complex. =20 - (2) PCI Express Root Ports (ioh3420), for starting exclusively PCI Exp= ress - hierarchies. + (2) PCI Express Root Ports (pcie-root-port), for starting exclusively + PCI Express hierarchies. =20 (3) PCI Express to PCI Bridge (pcie-pci-bridge), for starting legacy P= CI hierarchies. @@ -70,7 +70,7 @@ Place only the following kinds of devices directly on the= Root Complex: -device pxb-pcie,id=3Dpcie.1,bus_nr=3Dx[,numa_node=3Dy][,addr=3D= z] PCI Express Root Ports and PCI Express to PCI bridges can be connected to the pcie.1 bus: - -device ioh3420,id=3Droot_port1[,bus=3Dpcie.1][,chassis=3Dx][,sl= ot=3Dy][,addr=3Dz] \ + -device pcie-root-port,id=3Droot_port1[,bus=3Dpcie.1][,chassis= =3Dx][,slot=3Dy][,addr=3Dz] \ -device pcie-pci-bridge,id=3Dpcie_pci_bridge1,bus=3Dpcie.1 =20 =20 @@ -112,14 +112,14 @@ Plug only PCI Express devices into PCI Express Ports. ------------ =20 2.2.1 Plugging a PCI Express device into a PCI Express Root Port: - -device ioh3420,id=3Droot_port1,chassis=3Dx,slot=3Dy[,bus=3Dpcie= .0][,addr=3Dz] \ + -device pcie-root-port,id=3Droot_port1,chassis=3Dx,slot=3Dy[,bus= =3Dpcie.0][,addr=3Dz] \ -device ,bus=3Droot_port1 2.2.2 Using multi-function PCI Express Root Ports: - -device ioh3420,id=3Droot_port1,multifunction=3Don,chassis=3Dx,addr= =3Dz.0[,slot=3Dy][,bus=3Dpcie.0] \ - -device ioh3420,id=3Droot_port2,chassis=3Dx1,addr=3Dz.1[,slot=3Dy1][= ,bus=3Dpcie.0] \ - -device ioh3420,id=3Droot_port3,chassis=3Dx2,addr=3Dz.2[,slot=3Dy2][= ,bus=3Dpcie.0] \ + -device pcie-root-port,id=3Droot_port1,multifunction=3Don,chassis=3D= x,addr=3Dz.0[,slot=3Dy][,bus=3Dpcie.0] \ + -device pcie-root-port,id=3Droot_port2,chassis=3Dx1,addr=3Dz.1[,slot= =3Dy1][,bus=3Dpcie.0] \ + -device pcie-root-port,id=3Droot_port3,chassis=3Dx2,addr=3Dz.2[,slot= =3Dy2][,bus=3Dpcie.0] \ 2.2.3 Plugging a PCI Express device into a Switch: - -device ioh3420,id=3Droot_port1,chassis=3Dx,slot=3Dy[,bus=3Dpcie.0][= ,addr=3Dz] \ + -device pcie-root-port,id=3Droot_port1,chassis=3Dx,slot=3Dy[,bus=3Dp= cie.0][,addr=3Dz] \ -device x3130-upstream,id=3Dupstream_port1,bus=3Droot_port1[,addr=3D= x] \ -device xio3130-downstream,id=3Ddownstream_port1,bus=3Dupstream_port= 1,chassis=3Dx1,slot=3Dy1[,addr=3Dz1]] \ -device ,bus=3Ddownstream_port1 --=20 2.39.0