Since tcg_temp_new is now identical, use that.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/mips/tcg/translate.c | 57 ++++++------------------
target/mips/tcg/nanomips_translate.c.inc | 4 +-
2 files changed, 16 insertions(+), 45 deletions(-)
diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index 6dbd262ebc..d01a337541 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -2401,7 +2401,7 @@ static void gen_arith_imm(DisasContext *ctx, uint32_t opc,
switch (opc) {
case OPC_ADDI:
{
- TCGv t0 = tcg_temp_local_new();
+ TCGv t0 = tcg_temp_new();
TCGv t1 = tcg_temp_new();
TCGv t2 = tcg_temp_new();
TCGLabel *l1 = gen_new_label();
@@ -2435,7 +2435,7 @@ static void gen_arith_imm(DisasContext *ctx, uint32_t opc,
#if defined(TARGET_MIPS64)
case OPC_DADDI:
{
- TCGv t0 = tcg_temp_local_new();
+ TCGv t0 = tcg_temp_new();
TCGv t1 = tcg_temp_new();
TCGv t2 = tcg_temp_new();
TCGLabel *l1 = gen_new_label();
@@ -2631,7 +2631,7 @@ static void gen_arith(DisasContext *ctx, uint32_t opc,
switch (opc) {
case OPC_ADD:
{
- TCGv t0 = tcg_temp_local_new();
+ TCGv t0 = tcg_temp_new();
TCGv t1 = tcg_temp_new();
TCGv t2 = tcg_temp_new();
TCGLabel *l1 = gen_new_label();
@@ -2667,7 +2667,7 @@ static void gen_arith(DisasContext *ctx, uint32_t opc,
break;
case OPC_SUB:
{
- TCGv t0 = tcg_temp_local_new();
+ TCGv t0 = tcg_temp_new();
TCGv t1 = tcg_temp_new();
TCGv t2 = tcg_temp_new();
TCGLabel *l1 = gen_new_label();
@@ -2708,7 +2708,7 @@ static void gen_arith(DisasContext *ctx, uint32_t opc,
#if defined(TARGET_MIPS64)
case OPC_DADD:
{
- TCGv t0 = tcg_temp_local_new();
+ TCGv t0 = tcg_temp_new();
TCGv t1 = tcg_temp_new();
TCGv t2 = tcg_temp_new();
TCGLabel *l1 = gen_new_label();
@@ -2742,7 +2742,7 @@ static void gen_arith(DisasContext *ctx, uint32_t opc,
break;
case OPC_DSUB:
{
- TCGv t0 = tcg_temp_local_new();
+ TCGv t0 = tcg_temp_new();
TCGv t1 = tcg_temp_new();
TCGv t2 = tcg_temp_new();
TCGLabel *l1 = gen_new_label();
@@ -3760,26 +3760,8 @@ static void gen_loongson_integer(DisasContext *ctx, uint32_t opc,
return;
}
- switch (opc) {
- case OPC_MULT_G_2E:
- case OPC_MULT_G_2F:
- case OPC_MULTU_G_2E:
- case OPC_MULTU_G_2F:
-#if defined(TARGET_MIPS64)
- case OPC_DMULT_G_2E:
- case OPC_DMULT_G_2F:
- case OPC_DMULTU_G_2E:
- case OPC_DMULTU_G_2F:
-#endif
- t0 = tcg_temp_new();
- t1 = tcg_temp_new();
- break;
- default:
- t0 = tcg_temp_local_new();
- t1 = tcg_temp_local_new();
- break;
- }
-
+ t0 = tcg_temp_new();
+ t1 = tcg_temp_new();
gen_load_gpr(t0, rs);
gen_load_gpr(t1, rt);
@@ -3956,21 +3938,10 @@ static void gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt)
TCGCond cond;
opc = MASK_LMMI(ctx->opcode);
- switch (opc) {
- case OPC_ADD_CP2:
- case OPC_SUB_CP2:
- case OPC_DADD_CP2:
- case OPC_DSUB_CP2:
- t0 = tcg_temp_local_new_i64();
- t1 = tcg_temp_local_new_i64();
- break;
- default:
- t0 = tcg_temp_new_i64();
- t1 = tcg_temp_new_i64();
- break;
- }
-
check_cp1_enabled(ctx);
+
+ t0 = tcg_temp_new_i64();
+ t1 = tcg_temp_new_i64();
gen_load_fpr64(ctx, t0, rs);
gen_load_fpr64(ctx, t1, rt);
@@ -8651,7 +8622,7 @@ static void gen_mftr(CPUMIPSState *env, DisasContext *ctx, int rt, int rd,
int u, int sel, int h)
{
int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
- TCGv t0 = tcg_temp_local_new();
+ TCGv t0 = tcg_temp_new();
if ((env->CP0_VPEConf0 & (1 << CP0VPEC0_MVP)) == 0 &&
((env->tcs[other_tc].CP0_TCBind & (0xf << CP0TCBd_CurVPE)) !=
@@ -8879,7 +8850,7 @@ static void gen_mttr(CPUMIPSState *env, DisasContext *ctx, int rd, int rt,
int u, int sel, int h)
{
int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
- TCGv t0 = tcg_temp_local_new();
+ TCGv t0 = tcg_temp_new();
gen_load_gpr(t0, rt);
if ((env->CP0_VPEConf0 & (1 << CP0VPEC0_MVP)) == 0 &&
@@ -11410,7 +11381,7 @@ static void gen_flt3_arith(DisasContext *ctx, uint32_t opc,
case OPC_ALNV_PS:
check_ps(ctx);
{
- TCGv t0 = tcg_temp_local_new();
+ TCGv t0 = tcg_temp_new();
TCGv_i32 fp = tcg_temp_new_i32();
TCGv_i32 fph = tcg_temp_new_i32();
TCGLabel *l1 = gen_new_label();
diff --git a/target/mips/tcg/nanomips_translate.c.inc b/target/mips/tcg/nanomips_translate.c.inc
index 812c111e3c..faf6d679bd 100644
--- a/target/mips/tcg/nanomips_translate.c.inc
+++ b/target/mips/tcg/nanomips_translate.c.inc
@@ -1017,8 +1017,8 @@ static void gen_llwp(DisasContext *ctx, uint32_t base, int16_t offset,
static void gen_scwp(DisasContext *ctx, uint32_t base, int16_t offset,
uint32_t reg1, uint32_t reg2, bool eva)
{
- TCGv taddr = tcg_temp_local_new();
- TCGv lladdr = tcg_temp_local_new();
+ TCGv taddr = tcg_temp_new();
+ TCGv lladdr = tcg_temp_new();
TCGv_i64 tval = tcg_temp_new_i64();
TCGv_i64 llval = tcg_temp_new_i64();
TCGv_i64 val = tcg_temp_new_i64();
--
2.34.1