Now we have some kernel code to test this against (and it looks good)
I'd like to propose this series for upstream following 3 other series
already proposed for inclusion:
[PATCH v3 00/10] hw/cxl: CXL emulation cleanups and minor fixes for upstream
[PATCH v3 0/8] hw/cxl: RAS error emulation and injection
[PATCH 0/2] hw/cxl: Passthrough HDM decoder emulation
Changes since RFC V4 called out in individual patches.
- Some minor fixes.
- Refactors to simplify patch / resulting code as relevant.
- Update the bios-tables-test for CXL to use non deprecated interfaces.
Whilst the more significant changes have been discussed on list
Gregory, please take a look at these and check your are happy with
Kernel support used to test this:
Previous cover letter updated to reflect pulling one patch out
as a precursor cleanup in set (a) above.
This patches provides 2 features to the CXL Type-3 Device:
1) Volatile Memory Region Support
2) Multi-Region support (1 Volatile, 1 Persistent)
Summary of Changes per-commit:
1) Whitespace updates to docs and tests
2) Refactor CDAT DSMAS Initialization for multi-region initialization
Multi-Region and Volatile Memory support for CXL Type-3 Devices
Test and Documentation updates
The final patch in this series makes 6 major changes to the type-3
device in order to implement multi-region and volatile region support
1) The HostMemoryBackend [hostmem] has been replaced by two
[hostvmem] and [hostpmem] to store volatile and persistent memory
2) The single AddressSpace has been replaced by two AddressSpaces
[hostvmem_as] and [hostpmem_as] to map respective memdevs.
3) Each memory region size and total region are stored separately
4) The CDAT and DVSEC memory map entries have been updated:
a) if vmem is present, vmem is mapped at DPA(0)
b) if pmem is present
i) and vmem is present, pmem is mapped at DPA(vmem->size)
ii) else, pmem is mapped at DPA(0)
c) partitioning of pmem is not supported in this patch set but
has been discussed and this design should suffice.
5) Read/Write functions have been updated to access AddressSpaces
according to the mapping described in #4. Access to the
persistent address space is calculated by (dpa-vmem_len)
6) cxl-mailbox has been updated to report the respective size of
volatile and persistent memory regions
Gregory Price (2):
tests/qtest/cxl-test: whitespace, line ending cleanup
hw/cxl: Multi-Region CXL Type-3 Devices (Volatile and Persistent)
docs/system/devices/cxl.rst | 49 ++++--
hw/cxl/cxl-mailbox-utils.c | 26 +--
hw/mem/cxl_type3.c | 300 +++++++++++++++++++++++++--------
include/hw/cxl/cxl_device.h | 11 +-
tests/qtest/bios-tables-test.c | 8 +-
tests/qtest/cxl-test.c | 146 +++++++++++-----
6 files changed, 398 insertions(+), 142 deletions(-)