From nobody Tue May 13 16:46:40 2025 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1675183209; cv=none; d=zohomail.com; s=zohoarc; b=F1CLBdyCMeybu903Z8zwgNJnjCoJR/YdEubnoAfk1SuowXPhRSdgGWNLOVulbSolicSCpBDwtNnWPEmQt1v7C8h//XuterTEG+Cip2YL8rHezYhSR5U0HONNscWJEaDt0YKuIIqxFnhN9YKoXU48mV1YAYljkDpE8vw4DXt0PJg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1675183209; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=FpnPiAjcVyNCayyQ3AMYzsn2ZUroWq2rXaRruFdwEcY=; b=G6Y2bMjUapjObk6PMCbdLgRxj2SO9LrJtQMhgSGip8iVVL0sqNXOohPaMQOMT1ErP7rrvmR+QivftqflYpFuPTC4x4tm14oJipfv6JA5g1WEXDP4n7rSamJtRNJvRpkPaRLX6sqTLFD22TFeZwTrU0jVp171zSoFcTnv12JByKA= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1675183209545486.93607126605195; Tue, 31 Jan 2023 08:40:09 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pMtfJ-00055w-Ob; Tue, 31 Jan 2023 11:39:25 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pMtfH-00055N-HB for qemu-devel@nongnu.org; Tue, 31 Jan 2023 11:39:23 -0500 Received: from frasgout.his.huawei.com ([185.176.79.56]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pMtfF-0007za-DK for qemu-devel@nongnu.org; Tue, 31 Jan 2023 11:39:23 -0500 Received: from lhrpeml500005.china.huawei.com (unknown [172.18.147.201]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4P5rJX2NfQz6J65D; Wed, 1 Feb 2023 00:35:40 +0800 (CST) Received: from SecurePC-101-06.china.huawei.com (10.122.247.231) by lhrpeml500005.china.huawei.com (7.191.163.240) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Tue, 31 Jan 2023 16:39:15 +0000 To: , Michael Tsirkin CC: Ben Widawsky , , , Ira Weiny , Gregory Price , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Mike Maslenkin Subject: [PATCH 1/2] tests/qtest/cxl-test: whitespace, line ending cleanup Date: Tue, 31 Jan 2023 16:38:46 +0000 Message-ID: <20230131163847.23025-2-Jonathan.Cameron@huawei.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230131163847.23025-1-Jonathan.Cameron@huawei.com> References: <20230131163847.23025-1-Jonathan.Cameron@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.122.247.231] X-ClientProxiedBy: lhrpeml100006.china.huawei.com (7.191.160.224) To lhrpeml500005.china.huawei.com (7.191.163.240) X-CFilter-Loop: Reflected Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=185.176.79.56; envelope-from=jonathan.cameron@huawei.com; helo=frasgout.his.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jonathan Cameron From: Jonathan Cameron via Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer2=patchew.org@nongnu.org X-ZM-MESSAGEID: 1675183210231100004 Content-Type: text/plain; charset="utf-8" From: Gregory Price Defines are starting to exceed line length limits, align them for cleanliness before making modifications. Signed-off-by: Gregory Price Signed-off-by: Jonathan Cameron --- Changes since RFC v4: Naming consistency improvements. =20 tests/qtest/cxl-test.c | 84 +++++++++++++++++++++++------------------- 1 file changed, 46 insertions(+), 38 deletions(-) diff --git a/tests/qtest/cxl-test.c b/tests/qtest/cxl-test.c index 61f25a72b6..eda2bbbbe6 100644 --- a/tests/qtest/cxl-test.c +++ b/tests/qtest/cxl-test.c @@ -8,50 +8,58 @@ #include "qemu/osdep.h" #include "libqtest-single.h" =20 -#define QEMU_PXB_CMD "-machine q35,cxl=3Don " \ - "-device pxb-cxl,id=3Dcxl.0,bus=3Dpcie.0,bus_nr=3D52 = " \ - "-M cxl-fmw.0.targets.0=3Dcxl.0,cxl-fmw.0.size=3D4G " +#define QEMU_PXB_CMD \ + "-machine q35,cxl=3Don " \ + "-device pxb-cxl,id=3Dcxl.0,bus=3Dpcie.0,bus_nr=3D52 " \ + "-M cxl-fmw.0.targets.0=3Dcxl.0,cxl-fmw.0.size=3D4G " =20 -#define QEMU_2PXB_CMD "-machine q35,cxl=3Don " \ - "-device pxb-cxl,id=3Dcxl.0,bus=3Dpcie.0,bus_nr=3D52= " \ - "-device pxb-cxl,id=3Dcxl.1,bus=3Dpcie.0,bus_nr=3D53= " \ - "-M cxl-fmw.0.targets.0=3Dcxl.0,cxl-fmw.0.targets.1= =3Dcxl.1,cxl-fmw.0.size=3D4G " +#define QEMU_2PXB_CMD \ + "-machine q35,cxl=3Don " \ + "-device pxb-cxl,id=3Dcxl.0,bus=3Dpcie.0,bus_nr=3D52 " \ + "-device pxb-cxl,id=3Dcxl.1,bus=3Dpcie.0,bus_nr=3D53 " \ + "-M cxl-fmw.0.targets.0=3Dcxl.0,cxl-fmw.0.targets.1=3Dcxl.1,cxl-fmw.0.= size=3D4G " =20 -#define QEMU_RP "-device cxl-rp,id=3Drp0,bus=3Dcxl.0,chassis=3D0,slot=3D0 " +#define QEMU_RP \ + "-device cxl-rp,id=3Drp0,bus=3Dcxl.0,chassis=3D0,slot=3D0 " =20 /* Dual ports on first pxb */ -#define QEMU_2RP "-device cxl-rp,id=3Drp0,bus=3Dcxl.0,chassis=3D0,slot=3D0= " \ - "-device cxl-rp,id=3Drp1,bus=3Dcxl.0,chassis=3D0,slot=3D1= " +#define QEMU_2RP \ + "-device cxl-rp,id=3Drp0,bus=3Dcxl.0,chassis=3D0,slot=3D0 " \ + "-device cxl-rp,id=3Drp1,bus=3Dcxl.0,chassis=3D0,slot=3D1 " =20 /* Dual ports on each of the pxb instances */ -#define QEMU_4RP "-device cxl-rp,id=3Drp0,bus=3Dcxl.0,chassis=3D0,slot=3D0= " \ - "-device cxl-rp,id=3Drp1,bus=3Dcxl.0,chassis=3D0,slot=3D1= " \ - "-device cxl-rp,id=3Drp2,bus=3Dcxl.1,chassis=3D0,slot=3D2= " \ - "-device cxl-rp,id=3Drp3,bus=3Dcxl.1,chassis=3D0,slot=3D3= " - -#define QEMU_T3D "-object memory-backend-file,id=3Dcxl-mem0,mem-path=3D%s,= size=3D256M " \ - "-object memory-backend-file,id=3Dlsa0,mem-path=3D%s,size= =3D256M " \ - "-device cxl-type3,bus=3Drp0,memdev=3Dcxl-mem0,lsa=3Dlsa0= ,id=3Dcxl-pmem0 " - -#define QEMU_2T3D "-object memory-backend-file,id=3Dcxl-mem0,mem-path=3D%s= ,size=3D256M " \ - "-object memory-backend-file,id=3Dlsa0,mem-path=3D%s,siz= e=3D256M " \ - "-device cxl-type3,bus=3Drp0,memdev=3Dcxl-mem0,lsa=3Dlsa= 0,id=3Dcxl-pmem0 " \ - "-object memory-backend-file,id=3Dcxl-mem1,mem-path=3D%s= ,size=3D256M " \ - "-object memory-backend-file,id=3Dlsa1,mem-path=3D%s,siz= e=3D256M " \ - "-device cxl-type3,bus=3Drp1,memdev=3Dcxl-mem1,lsa=3Dlsa= 1,id=3Dcxl-pmem1 " - -#define QEMU_4T3D "-object memory-backend-file,id=3Dcxl-mem0,mem-path=3D%s= ,size=3D256M " \ - "-object memory-backend-file,id=3Dlsa0,mem-path=3D%s,siz= e=3D256M " \ - "-device cxl-type3,bus=3Drp0,memdev=3Dcxl-mem0,lsa=3Dlsa= 0,id=3Dcxl-pmem0 " \ - "-object memory-backend-file,id=3Dcxl-mem1,mem-path=3D%s= ,size=3D256M " \ - "-object memory-backend-file,id=3Dlsa1,mem-path=3D%s,siz= e=3D256M " \ - "-device cxl-type3,bus=3Drp1,memdev=3Dcxl-mem1,lsa=3Dlsa= 1,id=3Dcxl-pmem1 " \ - "-object memory-backend-file,id=3Dcxl-mem2,mem-path=3D%s= ,size=3D256M " \ - "-object memory-backend-file,id=3Dlsa2,mem-path=3D%s,siz= e=3D256M " \ - "-device cxl-type3,bus=3Drp2,memdev=3Dcxl-mem2,lsa=3Dlsa= 2,id=3Dcxl-pmem2 " \ - "-object memory-backend-file,id=3Dcxl-mem3,mem-path=3D%s= ,size=3D256M " \ - "-object memory-backend-file,id=3Dlsa3,mem-path=3D%s,siz= e=3D256M " \ - "-device cxl-type3,bus=3Drp3,memdev=3Dcxl-mem3,lsa=3Dlsa= 3,id=3Dcxl-pmem3 " +#define QEMU_4RP \ + "-device cxl-rp,id=3Drp0,bus=3Dcxl.0,chassis=3D0,slot=3D0 " \ + "-device cxl-rp,id=3Drp1,bus=3Dcxl.0,chassis=3D0,slot=3D1 " \ + "-device cxl-rp,id=3Drp2,bus=3Dcxl.1,chassis=3D0,slot=3D2 " \ + "-device cxl-rp,id=3Drp3,bus=3Dcxl.1,chassis=3D0,slot=3D3 " + +#define QEMU_T3D \ + "-object memory-backend-file,id=3Dcxl-mem0,mem-path=3D%s,size=3D256M "= \ + "-object memory-backend-file,id=3Dlsa0,mem-path=3D%s,size=3D256M " \ + "-device cxl-type3,bus=3Drp0,memdev=3Dcxl-mem0,lsa=3Dlsa0,id=3Dcxl-pme= m0 " + +#define QEMU_2T3D \ + "-object memory-backend-file,id=3Dcxl-mem0,mem-path=3D%s,size=3D256M "= \ + "-object memory-backend-file,id=3Dlsa0,mem-path=3D%s,size=3D256M " \ + "-device cxl-type3,bus=3Drp0,memdev=3Dcxl-mem0,lsa=3Dlsa0,id=3Dcxl-pme= m0 " \ + "-object memory-backend-file,id=3Dcxl-mem1,mem-path=3D%s,size=3D256M "= \ + "-object memory-backend-file,id=3Dlsa1,mem-path=3D%s,size=3D256M " \ + "-device cxl-type3,bus=3Drp1,memdev=3Dcxl-mem1,lsa=3Dlsa1,id=3Dcxl-pme= m1 " + +#define QEMU_4T3D \ + "-object memory-backend-file,id=3Dcxl-mem0,mem-path=3D%s,size=3D256M "= \ + "-object memory-backend-file,id=3Dlsa0,mem-path=3D%s,size=3D256M " \ + "-device cxl-type3,bus=3Drp0,memdev=3Dcxl-mem0,lsa=3Dlsa0,id=3Dcxl-pme= m0 " \ + "-object memory-backend-file,id=3Dcxl-mem1,mem-path=3D%s,size=3D256M "= \ + "-object memory-backend-file,id=3Dlsa1,mem-path=3D%s,size=3D256M " \ + "-device cxl-type3,bus=3Drp1,memdev=3Dcxl-mem1,lsa=3Dlsa1,id=3Dcxl-pme= m1 " \ + "-object memory-backend-file,id=3Dcxl-mem2,mem-path=3D%s,size=3D256M "= \ + "-object memory-backend-file,id=3Dlsa2,mem-path=3D%s,size=3D256M " \ + "-device cxl-type3,bus=3Drp2,memdev=3Dcxl-mem2,lsa=3Dlsa2,id=3Dcxl-pme= m2 " \ + "-object memory-backend-file,id=3Dcxl-mem3,mem-path=3D%s,size=3D256M "= \ + "-object memory-backend-file,id=3Dlsa3,mem-path=3D%s,size=3D256M " \ + "-device cxl-type3,bus=3Drp3,memdev=3Dcxl-mem3,lsa=3Dlsa3,id=3Dcxl-pme= m3 " =20 static void cxl_basic_hb(void) { --=20 2.37.2