this exercises the error reported in
https://gitlab.com/qemu-project/qemu/-/issues/652.
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
---
tests/tcg/tricore/Makefile.softmmu-target | 1 +
tests/tcg/tricore/macros.h | 13 +++++++++++++
tests/tcg/tricore/test_ld_h.S | 15 +++++++++++++++
3 files changed, 29 insertions(+)
create mode 100644 tests/tcg/tricore/test_ld_h.S
diff --git a/tests/tcg/tricore/Makefile.softmmu-target b/tests/tcg/tricore/Makefile.softmmu-target
index b6c19dbecd..d2446af8b4 100644
--- a/tests/tcg/tricore/Makefile.softmmu-target
+++ b/tests/tcg/tricore/Makefile.softmmu-target
@@ -14,6 +14,7 @@ TESTS += test_ftoi.tst
TESTS += test_imask.tst
TESTS += test_insert.tst
TESTS += test_ld_bu.tst
+TESTS += test_ld_h.tst
TESTS += test_madd.tst
TESTS += test_msub.tst
TESTS += test_muls.tst
diff --git a/tests/tcg/tricore/macros.h b/tests/tcg/tricore/macros.h
index 109ef62a4d..ec4f5bff52 100644
--- a/tests/tcg/tricore/macros.h
+++ b/tests/tcg/tricore/macros.h
@@ -21,6 +21,7 @@
#define DREG_TEMP %d11
#define DREG_TEST_NUM %d14
#define DREG_CORRECT_RESULT %d15
+#define DREG_CORRECT_RESULT_2 %d13
#define AREG_ADDR %a0
#define AREG_CORRECT_RESULT %a3
@@ -79,6 +80,18 @@ test_ ## num: \
LI(DREG_CORRECT_RESULT, addr_result) \
jne DREG_CALC_RESULT, DREG_CORRECT_RESULT, fail;
+#define TEST_LD_SRO(insn, num, result, addr_result, ld_pattern) \
+test_ ## num: \
+ LIA(AREG_ADDR, test_data) \
+ insn %d15, ld_pattern; \
+ LI(DREG_CORRECT_RESULT_2, result) \
+ mov DREG_TEST_NUM, num; \
+ jne %d15, DREG_CORRECT_RESULT_2, fail; \
+ mov.d DREG_CALC_RESULT, AREG_ADDR; \
+ LI(DREG_CORRECT_RESULT, addr_result) \
+ jne DREG_CALC_RESULT, DREG_CORRECT_RESULT, fail;
+
+
/* Actual test case type
* e.g inst %dX, %dY -> TEST_D_D
* inst %dX, %dY, %dZ -> TEST_D_DD
diff --git a/tests/tcg/tricore/test_ld_h.S b/tests/tcg/tricore/test_ld_h.S
new file mode 100644
index 0000000000..d3c157a046
--- /dev/null
+++ b/tests/tcg/tricore/test_ld_h.S
@@ -0,0 +1,15 @@
+#include "macros.h"
+.data
+test_data:
+ .word 0xaffedead
+ .word 0x001122ff
+.text
+.global _start
+_start:
+# expect. addr reg val after load
+# insn num expect. load value | pattern for loading
+# | | | | |
+ TEST_LD (ld.h, 1, 0xffffaffe, MEM_BASE_ADDR, [AREG_ADDR]2)
+ TEST_LD_SRO(ld.h, 2, 0x000022ff, MEM_BASE_ADDR, [AREG_ADDR]4)
+
+ TEST_PASSFAIL
--
2.39.1