From nobody Thu Mar 28 08:25:02 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1675509977004698.3807443800238; Sat, 4 Feb 2023 03:26:17 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pOGfw-0000JE-Du; Sat, 04 Feb 2023 06:25:44 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pOGfZ-0000GA-Vu; Sat, 04 Feb 2023 06:25:22 -0500 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pOGfX-0002cz-80; Sat, 04 Feb 2023 06:25:21 -0500 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id 0C0584001D; Sat, 4 Feb 2023 14:25:05 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id 457349A; Sat, 4 Feb 2023 14:25:04 +0300 (MSK) Received: (nullmailer pid 2558790 invoked by uid 1000); Sat, 04 Feb 2023 11:25:03 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: qemu-trivial@nongnu.org, Michael Tokarev Subject: [PATCH] configure: normalize riscv* cpu types too Date: Sat, 4 Feb 2023 14:25:02 +0300 Message-Id: <20230204112502.2558739-1-mjt@msgid.tls.msk.ru> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer2=patchew.org@nongnu.org X-ZM-MESSAGEID: 1675509980239100001 Content-Type: text/plain; charset="utf-8" For most CPU types out there, ./configure normalizes all variations into base form plus, optionally, variations, to find the proper arch-specific code. In particular, it's possible to use ./configure --cpu=3D$(uname -m) and it will figure out the right base cpu family out of that. But this does not work for riscv64 for example, since there's no similar normalisation for that one. For now, as far as I can see, there'no support for other riscv "sizes" (like riscv32 which actually esists as hardware). So for the time being, just normalize the cpu name to be "riscv" for all riscv* variants, just like it is done for arm and mips. If/when support for other riscv variants will be added, this might be extended to distinguish them based on __LP64__ define or __riscv_xlen=3D=3D32/64/128. Signed-off-by: Michael Tokarev --- configure | 3 +++ 1 file changed, 3 insertions(+) diff --git a/configure b/configure index 9e407ce2e3..1deb65c95f 100755 --- a/configure +++ b/configure @@ -578,6 +578,9 @@ case "$cpu" in cpu=3D"ppc64" CPU_CFLAGS=3D"-m64 -mlittle-endian" ;; =20 + riscv*) + cpu=3D"riscv" ;; + s390) CPU_CFLAGS=3D"-m31" ;; s390x) --=20 2.30.2