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[173.198.77.218]) by smtp.gmail.com with ESMTPSA id 26-20020aa7921a000000b00592417157f2sm843114pfo.148.2023.02.25.01.19.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 25 Feb 2023 01:19:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=RUHY2yKH2nPTR6QE7c2gu4MGXp/9B0MeleLyAh2d26U=; b=BGabFMm2CVQ3HIsRf1Y4bJmKh1C5VO0rFM9RRNcNn+xeR2GTMMzoVjaPJb6djCmwqV DgHeUVe4ebHp7goPA2+yV1BB52LlDxYgvNk5rbyKArRrOuZEuw6buZ3GR1NAZMEXE5PC 8Y4cB3lpufqOA+gQ/pXvG5r8ix/w15VMPjyjxErD2VDumlj89BRP6F/978d4CHEawOZ/ Eos6yTYknsXGdp5AFS4OFBQ2AEOA8IL+mTHVGdYx9nYGn2DQU62V/11xH/Hp9Cuz9RKS DC5ENLusQgpbBa6sED0B+4v3lA3EZFAa2jB1Od762qgdeD9y06wSJMkBphDEyKgDO4ET di7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=RUHY2yKH2nPTR6QE7c2gu4MGXp/9B0MeleLyAh2d26U=; b=ZU4PxTISpwjbxyKLkKMcysCx8VEW5aXimPDsLRKD3pLJ9f8QHcRf9nlW/IcycY5LZ8 12RNzB/HEcZJfNenv4UdfsCVN/nV5iRK8DvX0vvavyVURUkBpl+rkBalyHPynVFPz5E0 yexnof7twW5EYSKjbK5IysU9ZPUdQPkBvqenjf2RAY7qWSd/5HjzN3Mm0AQnUZgtHqWa EIgZdhQQqvRks9zLg8s5Ou6PyFU/oYhw98jcHIUXyR8JncpUY/f8GrVRCim5emvZ8R/j zEgZrUuzN80usHLb2bKfgF2ztioBRSvLRQLljNFjeKpzNIpnaDy2GhOO2eN6u5FF1D2I frJA== X-Gm-Message-State: AO0yUKUKMYRvBtVP/Fx2nvJk2UZFF5wAfbW9+G15FxNu+3WjrAp42MKC /UwWNkPxRfyqvsnoHMxYQGAyWDL/klzPJ8518DA= X-Google-Smtp-Source: AK7set809GQmVVO58e266/rAFK1dJeHZRbt9n00gjibAcLLecjYpkW7dAYO6QNM7ZEZlR5O2J+AFBg== X-Received: by 2002:a05:6a20:431b:b0:cc:9f59:4562 with SMTP id h27-20020a056a20431b00b000cc9f594562mr3948772pzk.53.1677316767069; Sat, 25 Feb 2023 01:19:27 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-ppc@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, jcmvbkbc@gmail.com, kbastian@mail.uni-paderborn.de, ysato@users.sourceforge.jp, gaosong@loongson.cn, jiaxun.yang@flygoat.com, tsimpson@quicinc.com, ale@rev.ng, mrolnik@gmail.com, edgar.iglesias@gmail.com Subject: [PATCH 44/76] target/mips: Drop tcg_temp_free from tx79_translate.c Date: Fri, 24 Feb 2023 23:13:55 -1000 Message-Id: <20230225091427.1817156-45-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230225091427.1817156-1-richard.henderson@linaro.org> References: <20230225091427.1817156-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer2=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1677317525379100009 Content-Type: text/plain; charset="utf-8" Translators are no longer required to free tcg temporaries. Signed-off-by: Richard Henderson --- target/mips/tcg/tx79_translate.c | 41 -------------------------------- 1 file changed, 41 deletions(-) diff --git a/target/mips/tcg/tx79_translate.c b/target/mips/tcg/tx79_transl= ate.c index 4e479c2d10..d46bc73972 100644 --- a/target/mips/tcg/tx79_translate.c +++ b/target/mips/tcg/tx79_translate.c @@ -138,10 +138,6 @@ static bool trans_parallel_arith(DisasContext *ctx, ar= g_r *a, gen_load_gpr_hi(ax, a->rs); gen_load_gpr_hi(bx, a->rt); gen_logic_i64(cpu_gpr_hi[a->rd], ax, bx); - - tcg_temp_free(bx); - tcg_temp_free(ax); - return true; } =20 @@ -273,15 +269,6 @@ static bool trans_parallel_compare(DisasContext *ctx, = arg_r *a, tcg_gen_movcond_i64(cond, t2, t1, t0, c1, c0); tcg_gen_deposit_i64(cpu_gpr_hi[a->rd], cpu_gpr_hi[a->rd], t2, wlen= * i, wlen); } - - tcg_temp_free(t2); - tcg_temp_free(t1); - tcg_temp_free(t0); - tcg_temp_free(bx); - tcg_temp_free(ax); - tcg_temp_free(c1); - tcg_temp_free(c0); - return true; } =20 @@ -362,10 +349,6 @@ static bool trans_LQ(DisasContext *ctx, arg_i *a) tcg_gen_addi_i64(addr, addr, 8); tcg_gen_qemu_ld_i64(t0, addr, ctx->mem_idx, MO_TEUQ); gen_store_gpr_hi(t0, a->rt); - - tcg_temp_free(t0); - tcg_temp_free(addr); - return true; } =20 @@ -389,10 +372,6 @@ static bool trans_SQ(DisasContext *ctx, arg_i *a) tcg_gen_addi_i64(addr, addr, 8); gen_load_gpr_hi(t0, a->rt); tcg_gen_qemu_st_i64(t0, addr, ctx->mem_idx, MO_TEUQ); - - tcg_temp_free(addr); - tcg_temp_free(t0); - return true; } =20 @@ -458,11 +437,6 @@ static bool trans_PPACW(DisasContext *ctx, arg_r *a) =20 gen_load_gpr_hi(t0, a->rs); /* a1 */ tcg_gen_deposit_i64(cpu_gpr_hi[a->rd], a0, t0, 32, 32); - - tcg_temp_free(t0); - tcg_temp_free(b0); - tcg_temp_free(a0); - return true; } =20 @@ -506,10 +480,6 @@ static bool trans_PEXTLx(DisasContext *ctx, arg_r *a, = unsigned wlen) tcg_gen_shri_i64(bx, bx, wlen); tcg_gen_shri_i64(ax, ax, wlen); } - - tcg_temp_free(bx); - tcg_temp_free(ax); - return true; } =20 @@ -541,10 +511,6 @@ static bool trans_PEXTLW(DisasContext *ctx, arg_r *a) gen_load_gpr(ax, a->rs); gen_load_gpr(bx, a->rt); gen_pextw(cpu_gpr[a->rd], cpu_gpr_hi[a->rd], ax, bx); - - tcg_temp_free(bx); - tcg_temp_free(ax); - return true; } =20 @@ -564,10 +530,6 @@ static bool trans_PEXTUW(DisasContext *ctx, arg_r *a) gen_load_gpr_hi(ax, a->rs); gen_load_gpr_hi(bx, a->rt); gen_pextw(cpu_gpr[a->rd], cpu_gpr_hi[a->rd], ax, bx); - - tcg_temp_free(bx); - tcg_temp_free(ax); - return true; } =20 @@ -678,8 +640,5 @@ static bool trans_PROT3W(DisasContext *ctx, arg_r *a) =20 tcg_gen_deposit_i64(cpu_gpr[a->rd], cpu_gpr[a->rt], ax, 0, 32); tcg_gen_rotri_i64(cpu_gpr[a->rd], cpu_gpr[a->rd], 32); - - tcg_temp_free(ax); - return true; } --=20 2.34.1