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[173.198.77.218]) by smtp.gmail.com with ESMTPSA id a14-20020a170902ecce00b0019a837be977sm3513341plh.271.2023.02.26.21.25.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 26 Feb 2023 21:25:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=1VaFmmXL1EVKNQ+ZqOqeimp8aObM/yTnVcjTeVASrNc=; b=blhxItn+e4d0L1sgDWHLlaL1/CFBOZ2hyoopvIoz912HhHGJ3ExhH3GP66E3MgEzBH BIXSSJj97eB6ib78ED7mXECzLEfVPte/TAoZb4mmX41nZRK9L1y3nW7WBH21gFtrQKDm FqEmvlIjPrBRm63s51k3u5VFmch2Atgupdp2KK23j1Mt5+atz/oKdi0P4bzpaYCj/KZY 6KV3sMGuz16CbTUo2eJJLtKS/FTZGdNt6rq4aMx413JMnyZmBN/XRvUSNBEMefGfA5ge RKBwXFzRZl+MBHu5bIqtINJEQZYCEt2Z1ntMqxjI/nbqMEKVGP2ab0lor3owfHnAeTDh 93gA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=1VaFmmXL1EVKNQ+ZqOqeimp8aObM/yTnVcjTeVASrNc=; b=h8R9AhrbwRORp2DZ655AZIW3gwZiYYFsqmIkJpmja4cJA3rB+l5Ujzyf9/prp19G1U GhMyxGObZU4BVX88wwA+VrQnJSqfIaaAMBfkZt6lH1MOfsmKQ9aAhGlfrDI1kzQZ9na+ mqP3j2l27ZpkQhzG26ZI/0SW7kFyP53gZUrX0KVivLiOAGG2qPrSmNBZjuBCTRp7BNft p1RKpxZnKDoZOnkNqxOj9AOtEzi105bR88ASLFrrc4Oi5F9AKHtikNMwvo3S/gToXPDS lCQ+TfQSaEJPDVbrG9BQ1lm9Mu4ocQ4+L2Zt+OjIL0+K8bgELxp48H/px8KY99oG3cWA 8F4w== X-Gm-Message-State: AO0yUKW8HJXE0Xh2cE6eEXG4jgwEC7nmJCvVF9V5xmcugkBOf3mPZHS9 J1ocSdqP4j5tmy5qt4AKJxWCUsPOfONdEw8D5IA= X-Google-Smtp-Source: AK7set+gPNLIZbkWk0lb9ap7DcAp28h8i6WoWhABzkl5SiUPP4W22l0siBovgnWBcndGtUtqA0jLBQ== X-Received: by 2002:a17:902:e547:b0:19a:7a02:7954 with SMTP id n7-20020a170902e54700b0019a7a027954mr29986916plf.24.1677475521037; Sun, 26 Feb 2023 21:25:21 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-ppc@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, jcmvbkbc@gmail.com, kbastian@mail.uni-paderborn.de, ysato@users.sourceforge.jp, gaosong@loongson.cn, jiaxun.yang@flygoat.com, tsimpson@quicinc.com, ale@rev.ng, mrolnik@gmail.com, edgar.iglesias@gmail.com Subject: [PATCH v2 04/76] target/arm: Remove arm_free_cc, a64_free_cc Date: Sun, 26 Feb 2023 19:23:53 -1000 Message-Id: <20230227052505.352889-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230227052505.352889-1-richard.henderson@linaro.org> References: <20230227052505.352889-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102a; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer2=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1677475774889100003 Content-Type: text/plain; charset="utf-8" Translators are no longer required to free tcg temporaries. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/translate.h | 1 - target/arm/translate-a64.c | 17 ++++------------- target/arm/translate.c | 9 --------- 3 files changed, 4 insertions(+), 23 deletions(-) diff --git a/target/arm/translate.h b/target/arm/translate.h index 3717824b75..7f52f08c5e 100644 --- a/target/arm/translate.h +++ b/target/arm/translate.h @@ -304,7 +304,6 @@ static inline void gen_a64_update_pc(DisasContext *s, t= arget_long diff) #endif =20 void arm_test_cc(DisasCompare *cmp, int cc); -void arm_free_cc(DisasCompare *cmp); void arm_jump_cc(DisasCompare *cmp, TCGLabel *label); void arm_gen_test_cc(int cc, TCGLabel *label); MemOp pow2_align(unsigned i); diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 98537bc2ef..2a0bba3815 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -319,18 +319,13 @@ static void a64_test_cc(DisasCompare64 *c64, int cc) =20 arm_test_cc(&c32, cc); =20 - /* Sign-extend the 32-bit value so that the GE/LT comparisons work - * properly. The NE/EQ comparisons are also fine with this choice. = */ + /* + * Sign-extend the 32-bit value so that the GE/LT comparisons work + * properly. The NE/EQ comparisons are also fine with this choice. + */ c64->cond =3D c32.cond; c64->value =3D tcg_temp_new_i64(); tcg_gen_ext_i32_i64(c64->value, c32.value); - - arm_free_cc(&c32); -} - -static void a64_free_cc(DisasCompare64 *c64) -{ - tcg_temp_free_i64(c64->value); } =20 static void gen_rebuild_hflags(DisasContext *s) @@ -5315,7 +5310,6 @@ static void disas_cc(DisasContext *s, uint32_t insn) tcg_t0 =3D tcg_temp_new_i32(); arm_test_cc(&c, cond); tcg_gen_setcondi_i32(tcg_invert_cond(c.cond), tcg_t0, c.value, 0); - arm_free_cc(&c); =20 /* Load the arguments for the new comparison. */ if (is_imm) { @@ -5435,8 +5429,6 @@ static void disas_cond_select(DisasContext *s, uint32= _t insn) tcg_gen_movcond_i64(c.cond, tcg_rd, c.value, zero, t_true, t_false= ); } =20 - a64_free_cc(&c); - if (!sf) { tcg_gen_ext32u_i64(tcg_rd, tcg_rd); } @@ -6256,7 +6248,6 @@ static void disas_fp_csel(DisasContext *s, uint32_t i= nsn) tcg_gen_movcond_i64(c.cond, t_true, c.value, tcg_constant_i64(0), t_true, t_false); tcg_temp_free_i64(t_false); - a64_free_cc(&c); =20 /* Note that sregs & hregs write back zeros to the high bits, and we've already done the zero-extension. */ diff --git a/target/arm/translate.c b/target/arm/translate.c index 614c438786..a0a298f8f7 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -754,13 +754,6 @@ void arm_test_cc(DisasCompare *cmp, int cc) cmp->value_global =3D global; } =20 -void arm_free_cc(DisasCompare *cmp) -{ - if (!cmp->value_global) { - tcg_temp_free_i32(cmp->value); - } -} - void arm_jump_cc(DisasCompare *cmp, TCGLabel *label) { tcg_gen_brcondi_i32(cmp->cond, cmp->value, 0, label); @@ -771,7 +764,6 @@ void arm_gen_test_cc(int cc, TCGLabel *label) DisasCompare cmp; arm_test_cc(&cmp, cc); arm_jump_cc(&cmp, label); - arm_free_cc(&cmp); } =20 void gen_set_condexec(DisasContext *s) @@ -9125,7 +9117,6 @@ static bool trans_CSEL(DisasContext *s, arg_CSEL *a) =20 arm_test_cc(&c, a->fcond); tcg_gen_movcond_i32(c.cond, rn, c.value, zero, rn, rm); - arm_free_cc(&c); =20 store_reg(s, a->rd, rn); tcg_temp_free_i32(rm); --=20 2.34.1