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[173.198.77.218]) by smtp.gmail.com with ESMTPSA id v4-20020a17090a520400b002369e16b276sm5172926pjh.32.2023.02.26.21.31.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 26 Feb 2023 21:31:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wYL+y8pL8fUeyYxKPpZSV5KcdIFrgA/ShmRzCV44YVg=; b=gY/f9RH0zoGxslOmVnxn5fElATJ1Mu5GqwOu9nQFTT1Z/tQV4RtpXM978qtozChTh7 cAYZ1jFOU0fNvmOOo43Yew+qHc7SIhH2pOFil4tYrfZIl5F1aZmbS3+6ZCNEDu0kWwvo QOrt6S/KElakDkVWfUiMst2RnH8jeWpAOLPCg2Lz4Ikv2CUHAxespFrEkwr53mGEMZx/ tDe+vev1GkaeSrsfCT9cF0sTib4k27/qh1B04GUiuUyLzOOeUs+GZkIXdD4RZvj1A/14 dMmerC41rhPfz+bAB7CHGhbzGs6NpXYcEpEUpxymqXBu0Z6IOasvURdhnUCadSY9x5Hi htKw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wYL+y8pL8fUeyYxKPpZSV5KcdIFrgA/ShmRzCV44YVg=; b=yIy4RGR8q0X7c5wRS4NHsCeUpQmMVvqLie0H5K7yZ/+72xtRvKPkgOUpJQwbEkzfgh qkEBocAy8i4yCVsPe264ECgzEc7afT5tx2CFKKI4WKpYWnemhfC6lHi905WJ0S5EI4L+ NbZ5ZQA+T/+RK4YyGXudDplNiqir25MuqdHjAZm3j/8ZOR9KmdvuQVSyPJwUabyNsedu IGg85XaUlE3d7IvoXt3p+Ci93Yy53SEnh7YJRv8gKQQF/dj86H6F3df7kMz27jBhZWtF YPA0rert+AiiRNUgPnXcq2bKcsqiwZcdmFLV56FxPhaEDK8HcG6eKqy4Cn3LSG0e4m+b tZMQ== X-Gm-Message-State: AO0yUKWRXmFRjzmyKyDmAGtXhZdsyn3PcfE1m+DPxm6QLlOBw/EHiYpJ k2igPYllkgQoIy+O53TiQ/b30fkQWB+UvDaJpEQ= X-Google-Smtp-Source: AK7set+MiPgvM3bLJo7lTQ1TaVXF2EZoKpC4bq5hn94QDr18RNOkcUvfKFcxbCSrZ/G3YmhveLml2A== X-Received: by 2002:a17:90b:4a43:b0:233:f365:1d0b with SMTP id lb3-20020a17090b4a4300b00233f3651d0bmr24346398pjb.5.1677475864543; Sun, 26 Feb 2023 21:31:04 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-ppc@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, jcmvbkbc@gmail.com, kbastian@mail.uni-paderborn.de, ysato@users.sourceforge.jp, gaosong@loongson.cn, jiaxun.yang@flygoat.com, tsimpson@quicinc.com, ale@rev.ng, mrolnik@gmail.com, edgar.iglesias@gmail.com Subject: [PATCH v2 62/76] target/s390x: Remove assert vs g_in2 Date: Sun, 26 Feb 2023 19:24:51 -1000 Message-Id: <20230227052505.352889-63-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230227052505.352889-1-richard.henderson@linaro.org> References: <20230227052505.352889-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1034; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1034.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer2=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1677476474317100003 Content-Type: text/plain; charset="utf-8" These were trying to determine if o->in2 was available for use as a temporary. It's better to just allocate a new one. Signed-off-by: Richard Henderson --- target/s390x/tcg/translate.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index beccd3429e..c431903c67 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -1428,11 +1428,11 @@ static DisasJumpType op_andi(DisasContext *s, Disas= Ops *o) int shift =3D s->insn->data & 0xff; int size =3D s->insn->data >> 8; uint64_t mask =3D ((1ull << size) - 1) << shift; + TCGv_i64 t =3D tcg_temp_new_i64(); =20 - assert(!o->g_in2); - tcg_gen_shli_i64(o->in2, o->in2, shift); - tcg_gen_ori_i64(o->in2, o->in2, ~mask); - tcg_gen_and_i64(o->out, o->in1, o->in2); + tcg_gen_shli_i64(t, o->in2, shift); + tcg_gen_ori_i64(t, t, ~mask); + tcg_gen_and_i64(o->out, o->in1, t); =20 /* Produce the CC from only the bits manipulated. */ tcg_gen_andi_i64(cc_dst, o->out, mask); @@ -3520,10 +3520,10 @@ static DisasJumpType op_ori(DisasContext *s, DisasO= ps *o) int shift =3D s->insn->data & 0xff; int size =3D s->insn->data >> 8; uint64_t mask =3D ((1ull << size) - 1) << shift; + TCGv_i64 t =3D tcg_temp_new_i64(); =20 - assert(!o->g_in2); - tcg_gen_shli_i64(o->in2, o->in2, shift); - tcg_gen_or_i64(o->out, o->in1, o->in2); + tcg_gen_shli_i64(t, o->in2, shift); + tcg_gen_or_i64(o->out, o->in1, t); =20 /* Produce the CC from only the bits manipulated. */ tcg_gen_andi_i64(cc_dst, o->out, mask); @@ -4832,10 +4832,10 @@ static DisasJumpType op_xori(DisasContext *s, Disas= Ops *o) int shift =3D s->insn->data & 0xff; int size =3D s->insn->data >> 8; uint64_t mask =3D ((1ull << size) - 1) << shift; + TCGv_i64 t =3D tcg_temp_new_i64(); =20 - assert(!o->g_in2); - tcg_gen_shli_i64(o->in2, o->in2, shift); - tcg_gen_xor_i64(o->out, o->in1, o->in2); + tcg_gen_shli_i64(t, o->in2, shift); + tcg_gen_xor_i64(o->out, o->in1, t); =20 /* Produce the CC from only the bits manipulated. */ tcg_gen_andi_i64(cc_dst, o->out, mask); --=20 2.34.1