From nobody Sat Jul 5 01:23:22 2025 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1678295168927849.8029051159294; Wed, 8 Mar 2023 09:06:08 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pZx84-0004IT-5b; Wed, 08 Mar 2023 11:59:04 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pZx82-0004Fr-82; Wed, 08 Mar 2023 11:59:02 -0500 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pZx80-00041r-6l; Wed, 08 Mar 2023 11:59:02 -0500 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id B814A400F2; Wed, 8 Mar 2023 19:58:21 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id 71ACC1FE; Wed, 8 Mar 2023 19:58:20 +0300 (MSK) Received: (nullmailer pid 2098292 invoked by uid 1000); Wed, 08 Mar 2023 16:58:15 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: qemu-stable@nongnu.org, Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Paolo Bonzini , Michael Tokarev Subject: [PATCH 20/47] tests/tcg/i386: Introduce and use reg_t consistently Date: Wed, 8 Mar 2023 19:57:23 +0300 Message-Id: <20230308165815.2098148-20-mjt@msgid.tls.msk.ru> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230308165035.2097594-1-mjt@msgid.tls.msk.ru> References: <20230308165035.2097594-1-mjt@msgid.tls.msk.ru> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer2=patchew.org@nongnu.org X-ZM-MESSAGEID: 1678295171033100007 From: Richard Henderson Define reg_t based on the actual register width. Define the inlines using that type. This will allow input registers to 32-bit insns to be set to 64-bit values on x86-64, which allows testing various edge cases. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20230114230542.3116013-2-richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini (cherry picked from commit 5d62d6649cd367b5b4a3676e7514d2f9ca86cb03) Signed-off-by: Michael Tokarev --- tests/tcg/i386/test-i386-bmi2.c | 182 ++++++++++++++++---------------- 1 file changed, 93 insertions(+), 89 deletions(-) diff --git a/tests/tcg/i386/test-i386-bmi2.c b/tests/tcg/i386/test-i386-bmi= 2.c index 5fadf47510..3c3ef85513 100644 --- a/tests/tcg/i386/test-i386-bmi2.c +++ b/tests/tcg/i386/test-i386-bmi2.c @@ -3,34 +3,40 @@ #include #include =20 +#ifdef __x86_64 +typedef uint64_t reg_t; +#else +typedef uint32_t reg_t; +#endif + #define insn1q(name, arg0) = \ -static inline uint64_t name##q(uint64_t arg0) = \ +static inline reg_t name##q(reg_t arg0) = \ { = \ - uint64_t result64; = \ + reg_t result64; = \ asm volatile (#name "q %1, %0" : "=3Dr"(result64) : "rm"(arg0)); = \ return result64; = \ } =20 #define insn1l(name, arg0) = \ -static inline uint32_t name##l(uint32_t arg0) = \ +static inline reg_t name##l(reg_t arg0) = \ { = \ - uint32_t result32; = \ + reg_t result32; = \ asm volatile (#name "l %k1, %k0" : "=3Dr"(result32) : "rm"(arg0)); = \ return result32; = \ } =20 #define insn2q(name, arg0, c0, arg1, c1) = \ -static inline uint64_t name##q(uint64_t arg0, uint64_t arg1) = \ +static inline reg_t name##q(reg_t arg0, reg_t arg1) = \ { = \ - uint64_t result64; = \ + reg_t result64; = \ asm volatile (#name "q %2, %1, %0" : "=3Dr"(result64) : c0(arg0), c1= (arg1)); \ return result64; = \ } =20 #define insn2l(name, arg0, c0, arg1, c1) = \ -static inline uint32_t name##l(uint32_t arg0, uint32_t arg1) = \ +static inline reg_t name##l(reg_t arg0, reg_t arg1) = \ { = \ - uint32_t result32; = \ + reg_t result32; = \ asm volatile (#name "l %k2, %k1, %k0" : "=3Dr"(result32) : c0(arg0),= c1(arg1)); \ return result32; = \ } @@ -65,130 +71,128 @@ insn1l(blsr, src) int main(int argc, char *argv[]) { uint64_t ehlo =3D 0x202020204f4c4845ull; uint64_t mask =3D 0xa080800302020001ull; - uint32_t result32; + reg_t result; =20 #ifdef __x86_64 - uint64_t result64; - /* 64 bits */ - result64 =3D andnq(mask, ehlo); - assert(result64 =3D=3D 0x002020204d4c4844); + result =3D andnq(mask, ehlo); + assert(result =3D=3D 0x002020204d4c4844); =20 - result64 =3D pextq(ehlo, mask); - assert(result64 =3D=3D 133); + result =3D pextq(ehlo, mask); + assert(result =3D=3D 133); =20 - result64 =3D pdepq(result64, mask); - assert(result64 =3D=3D (ehlo & mask)); + result =3D pdepq(result, mask); + assert(result =3D=3D (ehlo & mask)); =20 - result64 =3D pextq(-1ull, mask); - assert(result64 =3D=3D 511); /* mask has 9 bits set */ + result =3D pextq(-1ull, mask); + assert(result =3D=3D 511); /* mask has 9 bits set */ =20 - result64 =3D pdepq(-1ull, mask); - assert(result64 =3D=3D mask); + result =3D pdepq(-1ull, mask); + assert(result =3D=3D mask); =20 - result64 =3D bextrq(mask, 0x3f00); - assert(result64 =3D=3D (mask & ~INT64_MIN)); + result =3D bextrq(mask, 0x3f00); + assert(result =3D=3D (mask & ~INT64_MIN)); =20 - result64 =3D bextrq(mask, 0x1038); - assert(result64 =3D=3D 0xa0); + result =3D bextrq(mask, 0x1038); + assert(result =3D=3D 0xa0); =20 - result64 =3D bextrq(mask, 0x10f8); - assert(result64 =3D=3D 0); + result =3D bextrq(mask, 0x10f8); + assert(result =3D=3D 0); =20 - result64 =3D blsiq(0x30); - assert(result64 =3D=3D 0x10); + result =3D blsiq(0x30); + assert(result =3D=3D 0x10); =20 - result64 =3D blsiq(0x30ull << 32); - assert(result64 =3D=3D 0x10ull << 32); + result =3D blsiq(0x30ull << 32); + assert(result =3D=3D 0x10ull << 32); =20 - result64 =3D blsmskq(0x30); - assert(result64 =3D=3D 0x1f); + result =3D blsmskq(0x30); + assert(result =3D=3D 0x1f); =20 - result64 =3D blsrq(0x30); - assert(result64 =3D=3D 0x20); + result =3D blsrq(0x30); + assert(result =3D=3D 0x20); =20 - result64 =3D blsrq(0x30ull << 32); - assert(result64 =3D=3D 0x20ull << 32); + result =3D blsrq(0x30ull << 32); + assert(result =3D=3D 0x20ull << 32); =20 - result64 =3D bzhiq(mask, 0x3f); - assert(result64 =3D=3D (mask & ~INT64_MIN)); + result =3D bzhiq(mask, 0x3f); + assert(result =3D=3D (mask & ~INT64_MIN)); =20 - result64 =3D bzhiq(mask, 0x1f); - assert(result64 =3D=3D (mask & ~(-1 << 30))); + result =3D bzhiq(mask, 0x1f); + assert(result =3D=3D (mask & ~(-1 << 30))); =20 - result64 =3D rorxq(0x2132435465768798, 8); - assert(result64 =3D=3D 0x9821324354657687); + result =3D rorxq(0x2132435465768798, 8); + assert(result =3D=3D 0x9821324354657687); =20 - result64 =3D sarxq(0xffeeddccbbaa9988, 8); - assert(result64 =3D=3D 0xffffeeddccbbaa99); + result =3D sarxq(0xffeeddccbbaa9988, 8); + assert(result =3D=3D 0xffffeeddccbbaa99); =20 - result64 =3D sarxq(0x77eeddccbbaa9988, 8 | 64); - assert(result64 =3D=3D 0x0077eeddccbbaa99); + result =3D sarxq(0x77eeddccbbaa9988, 8 | 64); + assert(result =3D=3D 0x0077eeddccbbaa99); =20 - result64 =3D shrxq(0xffeeddccbbaa9988, 8); - assert(result64 =3D=3D 0x00ffeeddccbbaa99); + result =3D shrxq(0xffeeddccbbaa9988, 8); + assert(result =3D=3D 0x00ffeeddccbbaa99); =20 - result64 =3D shrxq(0x77eeddccbbaa9988, 8 | 192); - assert(result64 =3D=3D 0x0077eeddccbbaa99); + result =3D shrxq(0x77eeddccbbaa9988, 8 | 192); + assert(result =3D=3D 0x0077eeddccbbaa99); =20 - result64 =3D shlxq(0xffeeddccbbaa9988, 8); - assert(result64 =3D=3D 0xeeddccbbaa998800); + result =3D shlxq(0xffeeddccbbaa9988, 8); + assert(result =3D=3D 0xeeddccbbaa998800); #endif =20 /* 32 bits */ - result32 =3D andnl(mask, ehlo); - assert(result32 =3D=3D 0x04d4c4844); + result =3D andnl(mask, ehlo); + assert(result =3D=3D 0x04d4c4844); =20 - result32 =3D pextl((uint32_t) ehlo, mask); - assert(result32 =3D=3D 5); + result =3D pextl((uint32_t) ehlo, mask); + assert(result =3D=3D 5); =20 - result32 =3D pdepl(result32, mask); - assert(result32 =3D=3D (uint32_t)(ehlo & mask)); + result =3D pdepl(result, mask); + assert(result =3D=3D (uint32_t)(ehlo & mask)); =20 - result32 =3D pextl(-1u, mask); - assert(result32 =3D=3D 7); /* mask has 3 bits set */ + result =3D pextl(-1u, mask); + assert(result =3D=3D 7); /* mask has 3 bits set */ =20 - result32 =3D pdepl(-1u, mask); - assert(result32 =3D=3D (uint32_t)mask); + result =3D pdepl(-1u, mask); + assert(result =3D=3D (uint32_t)mask); =20 - result32 =3D bextrl(mask, 0x1f00); - assert(result32 =3D=3D (mask & ~INT32_MIN)); + result =3D bextrl(mask, 0x1f00); + assert(result =3D=3D (mask & ~INT32_MIN)); =20 - result32 =3D bextrl(ehlo, 0x1018); - assert(result32 =3D=3D 0x4f); + result =3D bextrl(ehlo, 0x1018); + assert(result =3D=3D 0x4f); =20 - result32 =3D bextrl(mask, 0x1038); - assert(result32 =3D=3D 0); + result =3D bextrl(mask, 0x1038); + assert(result =3D=3D 0); =20 - result32 =3D blsil(0xffff); - assert(result32 =3D=3D 1); + result =3D blsil(0xffff); + assert(result =3D=3D 1); =20 - result32 =3D blsmskl(0x300); - assert(result32 =3D=3D 0x1ff); + result =3D blsmskl(0x300); + assert(result =3D=3D 0x1ff); =20 - result32 =3D blsrl(0xffc); - assert(result32 =3D=3D 0xff8); + result =3D blsrl(0xffc); + assert(result =3D=3D 0xff8); =20 - result32 =3D bzhil(mask, 0xf); - assert(result32 =3D=3D 1); + result =3D bzhil(mask, 0xf); + assert(result =3D=3D 1); =20 - result32 =3D rorxl(0x65768798, 8); - assert(result32 =3D=3D 0x98657687); + result =3D rorxl(0x65768798, 8); + assert(result =3D=3D 0x98657687); =20 - result32 =3D sarxl(0xffeeddcc, 8); - assert(result32 =3D=3D 0xffffeedd); + result =3D sarxl(0xffeeddcc, 8); + assert(result =3D=3D 0xffffeedd); =20 - result32 =3D sarxl(0x77eeddcc, 8 | 32); - assert(result32 =3D=3D 0x0077eedd); + result =3D sarxl(0x77eeddcc, 8 | 32); + assert(result =3D=3D 0x0077eedd); =20 - result32 =3D shrxl(0xffeeddcc, 8); - assert(result32 =3D=3D 0x00ffeedd); + result =3D shrxl(0xffeeddcc, 8); + assert(result =3D=3D 0x00ffeedd); =20 - result32 =3D shrxl(0x77eeddcc, 8 | 128); - assert(result32 =3D=3D 0x0077eedd); + result =3D shrxl(0x77eeddcc, 8 | 128); + assert(result =3D=3D 0x0077eedd); =20 - result32 =3D shlxl(0xffeeddcc, 8); - assert(result32 =3D=3D 0xeeddcc00); + result =3D shlxl(0xffeeddcc, 8); + assert(result =3D=3D 0xeeddcc00); =20 return 0; } --=20 2.30.2