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[85.226.240.245]) by smtp.gmail.com with ESMTPSA id h22-20020a197016000000b004f517c21ef4sm561125lfc.44.2023.06.09.07.09.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Jun 2023 07:09:25 -0700 (PDT) Received: by flawful.org (Postfix, from userid 112) id 5A82B193F; Fri, 9 Jun 2023 16:09:24 +0200 (CEST) Received: from x1-carbon.lan (unknown [129.253.182.58]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by flawful.org (Postfix) with ESMTPSA id D6D721754; Fri, 9 Jun 2023 16:09:01 +0200 (CEST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686319765; x=1688911765; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature:dkim-signature :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=laqE+jDbGMxNloibp38IdoI5cMDWlF6ShBRxAGY56M8=; b=PDHt+3rUkGeNDyfvPAtJSp680aFIJZnkyzv5nDsn4Wg9wOsEV+QggsnmcuKSkv8r37 UnsuCnXh64Nw8ITFk+UIUvafBw+7zUvJ8MuODYm3hDpkCJvvjJR9eO0SBb/wTvdRbrwO vvLH1WnRyF7N77nVXaa4KkZJZasVTJFA+kZzOdatbkG0snBHwSGdrKhQwBQCOI6qImXH +83XTAd1CtvepqAD5Ej5vM+eDkoFK+YPaA8+A9NjWrQY26Z9I7utXNezFxaVkzOMDclc aKwUS9A/TIBmWlHivZdx5MMrK/rAfk5PDmJGGrn1dNFA2ZA2yAVJxwjGTm2y02tTo2RL be6Q== X-Gm-Message-State: AC+VfDyxTbsaIJ4UOXyWYKioo2qDM9HNzVcFV9w51pvwPCfg9F9GOXB5 nE1/rooxLvO7eTGJHUax2veIurvWrrhoVSVf X-Google-Smtp-Source: ACHHUZ4h6PTV7PBCFO81O+6f1+pXOPjNSte8Laet4eMCVu9KK6b90tL/YRMoqM5WlntKXC9MhetCeg== X-Received: by 2002:a19:9119:0:b0:4f3:a3e0:850e with SMTP id t25-20020a199119000000b004f3a3e0850emr951440lfd.35.1686319765610; Fri, 09 Jun 2023 07:09:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=flawful.org; s=mail; t=1686319764; bh=+7Lfn6Z7q7WKc/uSkZhwLaBrCOUaYvjqYUoBgBJpe9g=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JlHgjcl/uI1mE3C3WPULgN8f04liEmFLXQPfutUwHddygbYqOvHv6RDx/XIYwJS1i YSIo7/McR9i1YIBWnKVbyNdx9n4s/LWUjAYNPqEt8DgypQLgfGtqKexVCsXsPGq8Pk t9vBDWguk7wY7gaqvor3m7EDQNYEM9G19Bq3AcVY= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=flawful.org; s=mail; t=1686319746; bh=+7Lfn6Z7q7WKc/uSkZhwLaBrCOUaYvjqYUoBgBJpe9g=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=umSl+GVfY4oxHV5BJaFFrQdH4stW27YoKJc9PbPV2YJjeFwImmMMUS9UHN18TlmwU i8NpaPaNve+HEh6Ul4awFhvF7ienJKlWlafa5V5ZEQeOrAi9OTxDgUriiO7iFSnw4O bI92igZOAlgiqeEj8r31iei1YUpbKFSGHUu+Zz90= From: Niklas Cassel To: John Snow Cc: qemu-block@nongnu.org, qemu-devel@nongnu.org, Damien Le Moal , Niklas Cassel , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v3 1/8] hw/ide/ahci: remove stray backslash Date: Fri, 9 Jun 2023 16:08:37 +0200 Message-Id: <20230609140844.202795-2-nks@flawful.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230609140844.202795-1-nks@flawful.org> References: <20230609140844.202795-1-nks@flawful.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::12b; envelope-from=nks.gnu@gmail.com; helo=mail-lf1-x12b.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer2=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @flawful.org) (identity @flawful.org) X-ZM-MESSAGEID: 1686321486256100059 From: Niklas Cassel This backslash obviously does not belong here, so remove it. Signed-off-by: Niklas Cassel Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: John Snow --- hw/ide/ahci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c index 4e76d6b191..48d550f633 100644 --- a/hw/ide/ahci.c +++ b/hw/ide/ahci.c @@ -690,7 +690,7 @@ static void ahci_reset_port(AHCIState *s, int port) =20 s->dev[port].port_state =3D STATE_RUN; if (ide_state->drive_kind =3D=3D IDE_CD) { - ahci_set_signature(d, SATA_SIGNATURE_CDROM);\ + ahci_set_signature(d, SATA_SIGNATURE_CDROM); ide_state->status =3D SEEK_STAT | WRERR_STAT | READY_STAT; } else { ahci_set_signature(d, SATA_SIGNATURE_DISK); --=20 2.40.1 From nobody Tue May 7 02:56:55 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=flawful.org ARC-Seal: i=1; a=rsa-sha256; t=1686321484; cv=none; d=zohomail.com; s=zohoarc; b=iz9pqHYKgte2UYOZXCmBDc1cLGywrX5a4+Sk7h7+52cLxl+2LU7lvPnpO+S+gnqJQ7n25M4qjOkEDZXpKni76EB3hPhh1d98feCWKoFnxO5FL0e4HXQl9GS2G0CO+crKYqp7DVsAaRfsWPRZ/vel1dUcFADZnCfYbAooLa+zCVY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1686321484; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=cy91cBRqAqiwy9cOS34w2pZldiLcmYPrCZe3pVyd0X4=; b=SHqRkRVk5+s+71emydISps7WQMFwGk22HYYqWSWFYvBslyvAVsmn/ljV8iD8hNlMCSqDgrqkMzJHAxAOoYrYmRQbJWQ/XsyuxXS4mMY3pei49e5tQ37tdAqaByuue6Cnhbr29Obiu7xAAG23Mm/DrS3PrToNzRI2jjIh37fnlIc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 168632148484010.022901729951741; Fri, 9 Jun 2023 07:38:04 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1q7coU-0002gV-0j; Fri, 09 Jun 2023 10:10:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1q7coS-0002b4-D3; Fri, 09 Jun 2023 10:10:00 -0400 Received: from mail-lf1-x133.google.com ([2a00:1450:4864:20::133]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1q7coQ-0000JM-Og; Fri, 09 Jun 2023 10:10:00 -0400 Received: by mail-lf1-x133.google.com with SMTP id 2adb3069b0e04-4f640e48bc3so2260929e87.2; Fri, 09 Jun 2023 07:09:48 -0700 (PDT) Received: from flawful.org (c-f5f0e255.011-101-6d6c6d3.bbcust.telenor.se. [85.226.240.245]) by smtp.gmail.com with ESMTPSA id y22-20020ac255b6000000b004f1406b059asm552996lfg.219.2023.06.09.07.09.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Jun 2023 07:09:46 -0700 (PDT) Received: by flawful.org (Postfix, from userid 112) id 2B60019C2; Fri, 9 Jun 2023 16:09:45 +0200 (CEST) Received: from x1-carbon.lan (unknown [129.253.182.58]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by flawful.org (Postfix) with ESMTPSA id 051C41763; Fri, 9 Jun 2023 16:09:08 +0200 (CEST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686319787; x=1688911787; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature:dkim-signature :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=cy91cBRqAqiwy9cOS34w2pZldiLcmYPrCZe3pVyd0X4=; b=YGE28Gx9zoJeQJbCbJ76ETmliBa961tRsu5jtPlMH1J/2MeCmHOatnreYwkSkSpjF1 bEV4Kd5BG28S4nuryPZZZH3Vw5ZUU/l2F0ENH8GFRAiCgEbRnVtzBK+4cAvZ58yTVVsm 5PBPrHKQ4btewSAndVIs056tyQePZ6kXCaxq5cWxD3IRj+TSOBBphSjE69iShRL9u9ga fXDaDTErvfBU+n87yoiakcuWxHPTxgVnNESxXv5MBTdMUi+Uus57Nq4fSkC2RYPXY+By 14a8OGp+AGwBVVPQSTDu2iDJT4r8A+tVcFkpIRP9Dr28p1QdathGO/jkm/VuZVCirTU0 ROlw== X-Gm-Message-State: AC+VfDyHgmzA6Dqkyg35qWyl33Lp35I2NiejqFfTgL48cXvgdCIwXyc3 RyNeydnnZKtwn5qQlplVQtUfnBjXgI+jHIMX X-Google-Smtp-Source: ACHHUZ7lXc4/8vJ7V723jHNjEFo00sD34psLVyqNRdq34CLlnTJxkn0K3F1E/+vWh5YNR7xMFUb7cQ== X-Received: by 2002:ac2:520e:0:b0:4f5:fbf6:7de with SMTP id a14-20020ac2520e000000b004f5fbf607demr943735lfl.6.1686319787128; Fri, 09 Jun 2023 07:09:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=flawful.org; s=mail; t=1686319785; bh=DZ5fMdq9LwskNjWpW+fDBE+ZAvAUizJvqdAFmYrDvXM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ajuqm82uw73JaKXakTxxsdONmJAJBKJoNYqLVlPFfMcYfImd26sDjL/WSmXdemGLd pt8wDvHAOHjB1Myf2lUtTNQKgmM90rH7CdbPzdswAxrOwlS9l1YdAEd3LTFUpIGj7t B2FQx7fP64e0rrWo0OGssWhY7F51ID7Ioq5qo0Y4= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=flawful.org; s=mail; t=1686319752; bh=DZ5fMdq9LwskNjWpW+fDBE+ZAvAUizJvqdAFmYrDvXM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=L2UhMoRdTAmrdVe5oc8Bmh56QWN1ff9ovw5DwtbJO5chRA4V74GLNz7v57mu+8IG/ fLKHvqDyimHTcAVmTMrak8KCpMIin5lyuemBOcuVQ/WhrrE4AG+MFO3viYVBQsng63 3UUhUrnuH1kpO2PG8UuUAH7BCVh6lXN8ShWFG8VA= From: Niklas Cassel To: John Snow Cc: qemu-block@nongnu.org, qemu-devel@nongnu.org, Damien Le Moal , Niklas Cassel Subject: [PATCH v3 2/8] hw/ide/core: set ERR_STAT in unsupported command completion Date: Fri, 9 Jun 2023 16:08:38 +0200 Message-Id: <20230609140844.202795-3-nks@flawful.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230609140844.202795-1-nks@flawful.org> References: <20230609140844.202795-1-nks@flawful.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::133; envelope-from=nks.gnu@gmail.com; helo=mail-lf1-x133.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer2=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @flawful.org) (identity @flawful.org) X-ZM-MESSAGEID: 1686321486779100061 Content-Type: text/plain; charset="utf-8" From: Niklas Cassel Currently, the first time sending an unsupported command (e.g. READ LOG DMA EXT) will not have ERR_STAT set in the completion. Sending the unsupported command again, will correctly have ERR_STAT set. When ide_cmd_permitted() returns false, it calls ide_abort_command(). ide_abort_command() first calls ide_transfer_stop(), which will call ide_transfer_halt() and ide_cmd_done(), after that ide_abort_command() sets ERR_STAT in status. ide_cmd_done() for AHCI will call ahci_write_fis_d2h() which writes the current status in the FIS, and raises an IRQ. (The status here will not have ERR_STAT set!). Thus, we cannot call ide_transfer_stop() before setting ERR_STAT, as ide_transfer_stop() will result in the FIS being written and an IRQ being raised. The reason why it works the second time, is that ERR_STAT will still be set from the previous command, so when writing the FIS, the completion will correctly have ERR_STAT set. Set ERR_STAT before writing the FIS (calling cmd_done), so that we will raise an error IRQ correctly when receiving an unsupported command. Signed-off-by: Niklas Cassel Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/ide/core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/ide/core.c b/hw/ide/core.c index de48ff9f86..07971c0218 100644 --- a/hw/ide/core.c +++ b/hw/ide/core.c @@ -533,9 +533,9 @@ BlockAIOCB *ide_issue_trim( =20 void ide_abort_command(IDEState *s) { - ide_transfer_stop(s); s->status =3D READY_STAT | ERR_STAT; s->error =3D ABRT_ERR; + ide_transfer_stop(s); } =20 static void ide_set_retry(IDEState *s) --=20 2.40.1 From nobody Tue May 7 02:56:55 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=flawful.org ARC-Seal: i=1; a=rsa-sha256; t=1686321574; cv=none; d=zohomail.com; s=zohoarc; b=i8fjjCJ7MX+G0k7Mwg3yOtOWlWrWbPR80CHNIU3MzPnpEP6dlGfiqSktSECzD2QQRhRK8iQ/6rNe0R0SVaw+7TnY4JZCmYu1VLltPXpos1ituxBqrTpYEgmeNr+wy11JXjtJLQOMfTHt6sl8jUEo+i/TdEMllFgHfjWpMyeEMl8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1686321574; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=stzNPKEEsb93NVPera4GoUbdc/j/tKWSRzl0WF+RC+A=; b=bhdR3iBAjxNiMx4x9FPv+jpDtxP/7U84u8h+CXP/GOEwTwMnTOo74Bn5xBbkme+B2rIR8efMUFZ0T1nt6PT8DOWaAzWHx4R0iXCKXPg7nMeZGDhFtrqnPtaeRX0uRzxL4lsqYmMeGGsz0f/Ubdug5CnKrsMu3fFpCEB8yRHCr6E= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1686321574318234.2584692886844; Fri, 9 Jun 2023 07:39:34 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1q7cpE-0003K2-A0; Fri, 09 Jun 2023 10:10:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1q7coo-00038q-2s; Fri, 09 Jun 2023 10:10:22 -0400 Received: from mail-lj1-x231.google.com ([2a00:1450:4864:20::231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1q7col-0000aL-Ev; Fri, 09 Jun 2023 10:10:21 -0400 Received: by mail-lj1-x231.google.com with SMTP id 38308e7fff4ca-2b1ba50e50bso19854951fa.1; Fri, 09 Jun 2023 07:10:14 -0700 (PDT) Received: from flawful.org (c-f5f0e255.011-101-6d6c6d3.bbcust.telenor.se. [85.226.240.245]) by smtp.gmail.com with ESMTPSA id m23-20020a2e97d7000000b002ac7b0fc473sm407006ljj.38.2023.06.09.07.10.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Jun 2023 07:10:13 -0700 (PDT) Received: by flawful.org (Postfix, from userid 112) id 9581C1763; Fri, 9 Jun 2023 16:10:10 +0200 (CEST) Received: from x1-carbon.lan (unknown [129.253.182.58]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by flawful.org (Postfix) with ESMTPSA id E334517AD; Fri, 9 Jun 2023 16:09:15 +0200 (CEST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686319813; x=1688911813; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature:dkim-signature :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=stzNPKEEsb93NVPera4GoUbdc/j/tKWSRzl0WF+RC+A=; b=bx8cRmlv4HXlRN+DmvN8vZrQbA5gSQDVwhIcffcMgdjYA9LpNRsjKO/TlmGEEJi4o9 QsilLDKD0YtU8p/XHIVK5reiiPG8nbrd0kyDMzzLRXhdMVz++4scrnHSAUJaLMYuc+pb aU74RR/bAJPeFGi4HElQ0rGqAKiCgv+CFgm1PFO5IddL6GYvMCTXWFZqYYbvmxjjAyCe NZDyymJkF/NyYz/6YoknvxgO1lU6/QczgMLzl+L0tOoX/CXBgmHRFtLu10d9hwasIDOM xseQ6AwhhWzZxav1kJhJYWGzF8/PQe5BviI9prWnXFWlMWtlxQAaEmkn9pLfSr2gtP4K ToKw== X-Gm-Message-State: AC+VfDxE+H2lNgV6JGzwGfX2Fjpfck1kwPXUgqH/BbpB9EH4lMaVuC5o Ksx6+9SrKsd3ugtsa/qlLVGJAk2rSJ46zXRU X-Google-Smtp-Source: ACHHUZ7I6+Zf0eUm0HognUYaLA5agLVQbxST4vcdZZ68xl/3djLVsGVizE2VpapVmPZA2Mu/P86YKg== X-Received: by 2002:a2e:87d6:0:b0:2b1:b4e9:4c3 with SMTP id v22-20020a2e87d6000000b002b1b4e904c3mr1322862ljj.2.1686319813495; Fri, 09 Jun 2023 07:10:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=flawful.org; s=mail; t=1686319811; bh=Q3Hm6FMI2aGPQjjUBTN4kaiW9jrcrf+oWe6LEXPzIxY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iPFhBknqtd+FJwpeyCY9noCxUnXohTgv0H3g5a6ykV4gBPhra5ZSpAoKs4YYddUsL Z4M5YE91ijGwk6RqIUaSizBtoXa762aSNU7itKR48BJSz/EGO+so203Vja5GRIDolq DvZIftuZIv/vOrZ+7GwwiQXplQJFGWEhxD9atQ+I= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=flawful.org; s=mail; t=1686319759; bh=Q3Hm6FMI2aGPQjjUBTN4kaiW9jrcrf+oWe6LEXPzIxY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NETuw3C2fb1f0lIBRRbAh+pToHTbQx4GpC5Pl0u4S0iDv9hgPgbS9O9HFpud9xlNP qYnx+zoLJqT7YDDv/g0KhWghqBMyuvZi24zDg0CGkEboxydgZH98fEA2rUwWRLfG6J Oj4Ti+BMk2yyCnHPmU+GV2pbdjz90cdbBYWNF9tM= From: Niklas Cassel To: John Snow Cc: qemu-block@nongnu.org, qemu-devel@nongnu.org, Damien Le Moal , Niklas Cassel Subject: [PATCH v3 3/8] hw/ide/ahci: write D2H FIS when processing NCQ command Date: Fri, 9 Jun 2023 16:08:39 +0200 Message-Id: <20230609140844.202795-4-nks@flawful.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230609140844.202795-1-nks@flawful.org> References: <20230609140844.202795-1-nks@flawful.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::231; envelope-from=nks.gnu@gmail.com; helo=mail-lj1-x231.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer2=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @flawful.org) (identity @flawful.org) X-ZM-MESSAGEID: 1686321576359100007 Content-Type: text/plain; charset="utf-8" From: Niklas Cassel The way that BUSY + PxCI is cleared for NCQ (FPDMA QUEUED) commands is described in SATA 3.5a Gold: 11.15 FPDMA QUEUED command protocol DFPDMAQ2: ClearInterfaceBsy "Transmit Register Device to Host FIS with the BSY bit cleared to zero and the DRQ bit cleared to zero and Interrupt bit cleared to zero to mark interface ready for the next command." PxCI is currently cleared by handle_cmd(), but we don't write the D2H FIS to the FIS Receive Area that actually caused PxCI to be cleared. Similar to how ahci_pio_transfer() calls ahci_write_fis_pio() with an additional parameter to write a PIO Setup FIS without raising an IRQ, add a parameter to ahci_write_fis_d2h() so that ahci_write_fis_d2h() also can write the FIS to the FIS Receive Area without raising an IRQ. Change process_ncq_command() to call ahci_write_fis_d2h() without raising an IRQ (similar to ahci_pio_transfer()), such that the FIS Receive Area is in sync with the PxTFD shadow register. E.g. Linux reads status and error fields from the FIS Receive Area directly, so it is wise to keep the FIS Receive Area and the PxTFD shadow register in sync. Signed-off-by: Niklas Cassel --- hw/ide/ahci.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c index 48d550f633..4b272397fd 100644 --- a/hw/ide/ahci.c +++ b/hw/ide/ahci.c @@ -43,7 +43,7 @@ static void check_cmd(AHCIState *s, int port); static int handle_cmd(AHCIState *s, int port, uint8_t slot); static void ahci_reset_port(AHCIState *s, int port); -static bool ahci_write_fis_d2h(AHCIDevice *ad); +static bool ahci_write_fis_d2h(AHCIDevice *ad, bool d2h_fis_i); static void ahci_init_d2h(AHCIDevice *ad); static int ahci_dma_prepare_buf(const IDEDMA *dma, int32_t limit); static bool ahci_map_clb_address(AHCIDevice *ad); @@ -618,7 +618,7 @@ static void ahci_init_d2h(AHCIDevice *ad) return; } =20 - if (ahci_write_fis_d2h(ad)) { + if (ahci_write_fis_d2h(ad, true)) { ad->init_d2h_sent =3D true; /* We're emulating receiving the first Reg H2D Fis from the device; * Update the SIG register, but otherwise proceed as normal. */ @@ -850,7 +850,7 @@ static void ahci_write_fis_pio(AHCIDevice *ad, uint16_t= len, bool pio_fis_i) } } =20 -static bool ahci_write_fis_d2h(AHCIDevice *ad) +static bool ahci_write_fis_d2h(AHCIDevice *ad, bool d2h_fis_i) { AHCIPortRegs *pr =3D &ad->port_regs; uint8_t *d2h_fis; @@ -864,7 +864,7 @@ static bool ahci_write_fis_d2h(AHCIDevice *ad) d2h_fis =3D &ad->res_fis[RES_FIS_RFIS]; =20 d2h_fis[0] =3D SATA_FIS_TYPE_REGISTER_D2H; - d2h_fis[1] =3D (1 << 6); /* interrupt bit */ + d2h_fis[1] =3D d2h_fis_i ? (1 << 6) : 0; /* interrupt bit */ d2h_fis[2] =3D s->status; d2h_fis[3] =3D s->error; =20 @@ -890,7 +890,10 @@ static bool ahci_write_fis_d2h(AHCIDevice *ad) ahci_trigger_irq(ad->hba, ad, AHCI_PORT_IRQ_BIT_TFES); } =20 - ahci_trigger_irq(ad->hba, ad, AHCI_PORT_IRQ_BIT_DHRS); + if (d2h_fis_i) { + ahci_trigger_irq(ad->hba, ad, AHCI_PORT_IRQ_BIT_DHRS); + } + return true; } =20 @@ -1120,6 +1123,8 @@ static void process_ncq_command(AHCIState *s, int por= t, const uint8_t *cmd_fis, return; } =20 + ahci_write_fis_d2h(ad, false); + ncq_tfs->used =3D 1; ncq_tfs->drive =3D ad; ncq_tfs->slot =3D slot; @@ -1506,7 +1511,7 @@ static void ahci_cmd_done(const IDEDMA *dma) } =20 /* update d2h status */ - ahci_write_fis_d2h(ad); + ahci_write_fis_d2h(ad, true); =20 if (ad->port_regs.cmd_issue && !ad->check_bh) { ad->check_bh =3D qemu_bh_new_guarded(ahci_check_cmd_bh, ad, --=20 2.40.1 From nobody Tue May 7 02:56:55 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=flawful.org ARC-Seal: i=1; a=rsa-sha256; t=1686321490; cv=none; d=zohomail.com; s=zohoarc; b=ZEPluwIgfQvGh6v3kj/0N9G007qkv5eszvrtSB/eZG+ClfuUgmg7/9QI7nni5TB8H3PqVuhsB/pLnCd0hguknQbtuLwYLc49OkvNXMo9VRd73m7QSEhJl6dl4KD0hWfHM60c+OWEFUpYGAwWxL8SIrlrkA0/3VBkDnptiu4tVZE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1686321490; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=/ev5aaWOMtzj7uhrV2SRo+Ugfi/ZJw07xZsuBD2beIE=; b=bLqf99r1YitdIEwI8V7vxiK3sd8uE2h28C13gOVf2tZzwpKw1YMn4EMuFnXlvWGmMU4HUm0fJ1Rc+tLI0f2iEGheeTmbMrJCEJm/oeGxpPTxeyTcxhEtZL84/akg4RtCJpU/U6qT6/l8LwKP4hRRx4YMThD1Maw5XyAONnlCRUo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1686321490401916.693524993869; Fri, 9 Jun 2023 07:38:10 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1q7cpa-0003ZH-Q9; Fri, 09 Jun 2023 10:11:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1q7cp6-0003Ge-9V; Fri, 09 Jun 2023 10:10:42 -0400 Received: from mail-lf1-x12e.google.com ([2a00:1450:4864:20::12e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1q7coy-0000db-GL; Fri, 09 Jun 2023 10:10:39 -0400 Received: by mail-lf1-x12e.google.com with SMTP id 2adb3069b0e04-4f6195d2b3fso2328972e87.1; Fri, 09 Jun 2023 07:10:26 -0700 (PDT) Received: from flawful.org (c-f5f0e255.011-101-6d6c6d3.bbcust.telenor.se. [85.226.240.245]) by smtp.gmail.com with ESMTPSA id n6-20020a195506000000b004f38260f196sm554847lfe.218.2023.06.09.07.10.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Jun 2023 07:10:25 -0700 (PDT) Received: by flawful.org (Postfix, from userid 112) id BF61E12FF; Fri, 9 Jun 2023 16:10:23 +0200 (CEST) Received: from x1-carbon.lan (unknown [129.253.182.58]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by flawful.org (Postfix) with ESMTPSA id C2CAB19EB; Fri, 9 Jun 2023 16:09:21 +0200 (CEST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686319826; x=1688911826; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature:dkim-signature :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=/ev5aaWOMtzj7uhrV2SRo+Ugfi/ZJw07xZsuBD2beIE=; b=GHDIJtPUPDR2O5UD6WGTyEcLeSAUO56Hzq2z3qgkkqE876DgvqfdEBXruezZuu13/Z 9Zlrd5waBX+7V3yWpgh15kZfns1FzDnPu5j/yQkBwpl2urgr+dJOtCtjEtYfe3KzEEHE Nq94TVOsRZrrNJQ8V5hVlJkygY5P2xJgMGCY5UA6YPdBZee8+JkLMJTizFCDFfdwuedT BZ8YFcc4eIu2I1TpcMF5lQcggXgfmiz+zFnW2gl06FojQZOakMnzZXIgDXAyluhca1ih DsoE9RpyzxvJuAK/+gcYkwWiJaRae7OmxNfFQVnMUvEsaWHWcggPj8gIJveL/vRuaOm6 cQZQ== X-Gm-Message-State: AC+VfDwaGx63O8gersd9pyg6WuF+RnFwlvoHaKa5NKLwRMvl4UL9ZGq5 qHg0o7xSHGzPM4dExiqIBR0rqaPpJqYsAA7F X-Google-Smtp-Source: ACHHUZ4hPC6l7Q9hGPgc2YGVKfvtRpMbDkoTshK/JrxBY7BqnbIvocAOMFNwZSx5eIPlURecEPf5Bg== X-Received: by 2002:a19:8c0e:0:b0:4f5:bc19:68dd with SMTP id o14-20020a198c0e000000b004f5bc1968ddmr917221lfd.53.1686319825538; Fri, 09 Jun 2023 07:10:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=flawful.org; s=mail; t=1686319823; bh=+crhlsOe8XqLHrztrhhxdpb8tqjExwekFotXDvFGgAE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SUq4FXWMr9KUD+OeZwuIswFISQhQUqcEfY/j1g3hepKztvnWWsg/3zfn8tRWDb4jU 28nSdxXNKVdaleZ+2P38oYHjhPL+Reraq8Nrwsto0J35gt8LaHGkmHTtwPrIMcvFSp Ocb7XqkymmKl5VPivC8VamyHzeYyhmkqphqA5ZN8= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=flawful.org; s=mail; t=1686319765; bh=+crhlsOe8XqLHrztrhhxdpb8tqjExwekFotXDvFGgAE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mGzNk7wRiDjxloN6EqtG8uO+tELy+sk47ehskWQEW3TYBmUe6/XFemYQr+vwjpOb4 MXDxb6oppXDcAJNxr/iN0R3Z6oaElrfXJcfgVrPTEhDrlsyJZDYDekLDm2hXfK0NBL xfJ369DYlbNXSa0JXXWevP37uS79q5A6ocOzCzek= From: Niklas Cassel To: John Snow Cc: qemu-block@nongnu.org, qemu-devel@nongnu.org, Damien Le Moal , Niklas Cassel Subject: [PATCH v3 4/8] hw/ide/ahci: simplify and document PxCI handling Date: Fri, 9 Jun 2023 16:08:40 +0200 Message-Id: <20230609140844.202795-5-nks@flawful.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230609140844.202795-1-nks@flawful.org> References: <20230609140844.202795-1-nks@flawful.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::12e; envelope-from=nks.gnu@gmail.com; helo=mail-lf1-x12e.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01, T_SPF_TEMPERROR=0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer2=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @flawful.org) (identity @flawful.org) X-ZM-MESSAGEID: 1686321492765100001 Content-Type: text/plain; charset="utf-8" From: Niklas Cassel The AHCI spec states that: For NCQ, PxCI is cleared on command queued successfully. For non-NCQ, PxCI is cleared on command completed successfully. (A non-NCQ command that completes with error does not clear PxCI.) The current QEMU implementation either clears PxCI in check_cmd(), or in ahci_cmd_done(). check_cmd() will clear PxCI for a command if handle_cmd() returns 0. handle_cmd() will return -1 if BUSY or DRQ is set. The QEMU implementation for NCQ commands will currently not set BUSY or DRQ, so they will always have PxCI cleared by handle_cmd(). ahci_cmd_done() will never even get called for NCQ commands. Non-NCQ commands are executed by ide_bus_exec_cmd(). Non-NCQ commands in QEMU are implemented either in a sync or in an async way. For non-NCQ commands implemented in a sync way, the command handler will return true, and when ide_bus_exec_cmd() sees that a command handler returns true, it will call ide_cmd_done() (which will call ahci_cmd_done()). For a command implemented in a sync way, ahci_cmd_done() will do nothing (since busy_slot is not set). Instead, after ide_bus_exec_cmd() has finished, check_cmd() will clear PxCI for these commands. For non-NCQ commands implemented in an async way (using either aiocb or pio_aiocb), the command handler will return false, ide_bus_exec_cmd() will not call ide_cmd_done(), instead it is expected that the async callback function will call ide_cmd_done() once the async command is done. handle_cmd() will set busy_slot, if and only if BUSY or DRQ is set, and this is checked _after_ ide_bus_exec_cmd() has returned. handle_cmd() will return -1, so check_cmd() will not clear PxCI. When the async callback calls ide_cmd_done() (which will call ahci_cmd_done()), it will see that busy_slot is set, and ahci_cmd_done() will clear PxCI. This seems racy, since busy_slot is set _after_ ide_bus_exec_cmd() has returned. The callback might come before busy_slot gets set. And it is quite confusing that ahci_cmd_done() will be called for all non-NCQ commands when the command is done, but will only clear PxCI in certain cases, even though it will always write a D2H FIS and raise an IRQ. Even worse, in the case where ahci_cmd_done() does not clear PxCI, it still raises an IRQ. Host software might thus read an old PxCI value, since PxCI is cleared (by check_cmd()) after the IRQ has been raised. Try to simplify this by always setting busy_slot for non-NCQ commands, such that ahci_cmd_done() will always be responsible for clearing PxCI for non-NCQ commands. For NCQ commands, clear PxCI when we receive the D2H FIS, but before raising the IRQ, see AHCI 1.3.1, section 5.3.8, states RegFIS:Entry and RegFIS:ClearCI. Signed-off-by: Niklas Cassel --- hw/ide/ahci.c | 70 ++++++++++++++++++++++++++++++++++++--------------- 1 file changed, 50 insertions(+), 20 deletions(-) diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c index 4b272397fd..3deaf01add 100644 --- a/hw/ide/ahci.c +++ b/hw/ide/ahci.c @@ -41,9 +41,10 @@ #include "trace.h" =20 static void check_cmd(AHCIState *s, int port); -static int handle_cmd(AHCIState *s, int port, uint8_t slot); +static void handle_cmd(AHCIState *s, int port, uint8_t slot); static void ahci_reset_port(AHCIState *s, int port); static bool ahci_write_fis_d2h(AHCIDevice *ad, bool d2h_fis_i); +static void ahci_clear_cmd_issue(AHCIDevice *ad, uint8_t slot); static void ahci_init_d2h(AHCIDevice *ad); static int ahci_dma_prepare_buf(const IDEDMA *dma, int32_t limit); static bool ahci_map_clb_address(AHCIDevice *ad); @@ -591,9 +592,8 @@ static void check_cmd(AHCIState *s, int port) =20 if ((pr->cmd & PORT_CMD_START) && pr->cmd_issue) { for (slot =3D 0; (slot < 32) && pr->cmd_issue; slot++) { - if ((pr->cmd_issue & (1U << slot)) && - !handle_cmd(s, port, slot)) { - pr->cmd_issue &=3D ~(1U << slot); + if (pr->cmd_issue & (1U << slot)) { + handle_cmd(s, port, slot); } } } @@ -1123,6 +1123,22 @@ static void process_ncq_command(AHCIState *s, int po= rt, const uint8_t *cmd_fis, return; } =20 + /* + * A NCQ command clears the bit in PxCI after the command has been QUE= UED + * successfully (ERROR not set, BUSY and DRQ cleared). + * + * For NCQ commands, PxCI will always be cleared here. + * + * (Once the NCQ command is COMPLETED, the device will send a SDB FIS = with + * the interrupt bit set, which will clear PxSACT and raise an interru= pt.) + */ + ahci_clear_cmd_issue(ad, slot); + + /* + * In reality, for NCQ commands, PxCI is cleared after receiving a D2H= FIS + * without the interrupt bit set, but since ahci_write_fis_d2h() can r= aise + * an IRQ on error, we need to call them in reverse order. + */ ahci_write_fis_d2h(ad, false); =20 ncq_tfs->used =3D 1; @@ -1197,6 +1213,7 @@ static void handle_reg_h2d_fis(AHCIState *s, int port, { IDEState *ide_state =3D &s->dev[port].port.ifs[0]; AHCICmdHdr *cmd =3D get_cmd_header(s, port, slot); + AHCIDevice *ad =3D &s->dev[port]; uint16_t opts =3D le16_to_cpu(cmd->opts); =20 if (cmd_fis[1] & 0x0F) { @@ -1273,11 +1290,19 @@ static void handle_reg_h2d_fis(AHCIState *s, int po= rt, /* Reset transferred byte counter */ cmd->status =3D 0; =20 + /* + * A non-NCQ command clears the bit in PxCI after the command has COMP= LETED + * successfully (ERROR not set, BUSY and DRQ cleared). + * + * For non-NCQ commands, PxCI will always be cleared by ahci_cmd_done(= ). + */ + ad->busy_slot =3D slot; + /* We're ready to process the command in FIS byte 2. */ ide_bus_exec_cmd(&s->dev[port].port, cmd_fis[2]); } =20 -static int handle_cmd(AHCIState *s, int port, uint8_t slot) +static void handle_cmd(AHCIState *s, int port, uint8_t slot) { IDEState *ide_state; uint64_t tbl_addr; @@ -1288,12 +1313,12 @@ static int handle_cmd(AHCIState *s, int port, uint8= _t slot) if (s->dev[port].port.ifs[0].status & (BUSY_STAT|DRQ_STAT)) { /* Engine currently busy, try again later */ trace_handle_cmd_busy(s, port); - return -1; + return; } =20 if (!s->dev[port].lst) { trace_handle_cmd_nolist(s, port); - return -1; + return; } cmd =3D get_cmd_header(s, port, slot); /* remember current slot handle for later */ @@ -1303,7 +1328,7 @@ static int handle_cmd(AHCIState *s, int port, uint8_t= slot) ide_state =3D &s->dev[port].port.ifs[0]; if (!ide_state->blk) { trace_handle_cmd_badport(s, port); - return -1; + return; } =20 tbl_addr =3D le64_to_cpu(cmd->tbl_addr); @@ -1312,7 +1337,7 @@ static int handle_cmd(AHCIState *s, int port, uint8_t= slot) DMA_DIRECTION_TO_DEVICE, MEMTXATTRS_UNSPECIFI= ED); if (!cmd_fis) { trace_handle_cmd_badfis(s, port); - return -1; + return; } else if (cmd_len !=3D 0x80) { ahci_trigger_irq(s, &s->dev[port], AHCI_PORT_IRQ_BIT_HBFS); trace_handle_cmd_badmap(s, port, cmd_len); @@ -1336,15 +1361,6 @@ static int handle_cmd(AHCIState *s, int port, uint8_= t slot) out: dma_memory_unmap(s->as, cmd_fis, cmd_len, DMA_DIRECTION_TO_DEVICE, cmd_len); - - if (s->dev[port].port.ifs[0].status & (BUSY_STAT|DRQ_STAT)) { - /* async command, complete later */ - s->dev[port].busy_slot =3D slot; - return -1; - } - - /* done handling the command */ - return 0; } =20 /* Transfer PIO data between RAM and device */ @@ -1498,6 +1514,16 @@ static int ahci_dma_rw_buf(const IDEDMA *dma, bool i= s_write) return 1; } =20 +static void ahci_clear_cmd_issue(AHCIDevice *ad, uint8_t slot) +{ + IDEState *ide_state =3D &ad->port.ifs[0]; + + if (!(ide_state->status & (BUSY_STAT | DRQ_STAT))) { + ad->port_regs.cmd_issue &=3D ~(1 << slot); + } +} + +/* Non-NCQ command is done - This function is never called for NCQ command= s. */ static void ahci_cmd_done(const IDEDMA *dma) { AHCIDevice *ad =3D DO_UPCAST(AHCIDevice, dma, dma); @@ -1506,11 +1532,15 @@ static void ahci_cmd_done(const IDEDMA *dma) =20 /* no longer busy */ if (ad->busy_slot !=3D -1) { - ad->port_regs.cmd_issue &=3D ~(1 << ad->busy_slot); + ahci_clear_cmd_issue(ad, ad->busy_slot); ad->busy_slot =3D -1; } =20 - /* update d2h status */ + /* + * In reality, for non-NCQ commands, PxCI is cleared after receiving a= D2H + * FIS with the interrupt bit set, but since ahci_write_fis_d2h() will= raise + * an IRQ, we need to call them in reverse order. + */ ahci_write_fis_d2h(ad, true); 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[85.226.240.245]) by smtp.gmail.com with ESMTPSA id v7-20020a2e9f47000000b002b20058ecf9sm405479ljk.32.2023.06.09.07.10.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Jun 2023 07:10:24 -0700 (PDT) Received: by flawful.org (Postfix, from userid 112) id 7EA4417AD; Fri, 9 Jun 2023 16:10:23 +0200 (CEST) Received: from x1-carbon.lan (unknown [129.253.182.58]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by flawful.org (Postfix) with ESMTPSA id C5EEC19A5; Fri, 9 Jun 2023 16:09:26 +0200 (CEST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686319825; x=1688911825; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature:dkim-signature :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=nTPYZzbPBWQnltn+rjRZCiQSk+YmkRCKklq606/aWiM=; b=O0K/zoN9QXWNnBKoybmrP3lLkIaJabhSkiTM37WJCZskMZl5WSdrgCyNfrSchwkQn9 Gz+rJwViYQD7624MdwlfZ9zdxQEkqLq5NRhFuJxxvTS2gtAU1Adx1Fz2SejF1VLk3djC T3xYSwEjIrhIScPsxiuJRd7Lpz5f73DjOUz3qk6HeX7zvfXagwGdaDHThtOJF/36MUKY 15SCpxrgVdClqiLzWcRLsskKu5/yCdkknFMbNw5RRXsMNXwdGbr0oQ22GanN0lHkdecV 8FyRxlMTKYQyTdn5PrCxMwQeMmpk31EyVtGLC/EBCDGQFxc5PCkbQvHyqj/5nIXIp1kY QPFQ== X-Gm-Message-State: AC+VfDwWEu2vD3OjFKBHZZhCnE/ZgkuZ6CkoEIqwN04ZpTOnJJd31Kqo 7GOzR45WBfUUSO1yJ9gccm9beDnI1Z6fc0LY X-Google-Smtp-Source: ACHHUZ4sAijVqfMiv/ASfnhNKm3ngycCaCnnOHHu82D6aDsBnLv+4cgj1wsrwgeaBz7Mx2PZV25rog== X-Received: by 2002:a2e:360e:0:b0:2af:29d2:2ffe with SMTP id d14-20020a2e360e000000b002af29d22ffemr1128952lja.15.1686319825166; Fri, 09 Jun 2023 07:10:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=flawful.org; s=mail; t=1686319823; bh=4uJviMPFEwnIcHq2YXftAn5at7cFfEl+tvwWCuj/ojI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=R8+XNoD/57wmvo75XMUH8cR2dty6aZGQoXBxp9RI7Tvrbd5AQ4Xf5wYlMa996KJy3 nP/ixk0Of3RWBSwp2K/jdlF4mF4/CrNnQj89CwYRpRULyY9Khh12BeIYPMAleQpMw7 fkagYrCPniiGxZo0rMyEbMSf1GkcrCzzKhlq9fuk= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=flawful.org; s=mail; t=1686319770; bh=4uJviMPFEwnIcHq2YXftAn5at7cFfEl+tvwWCuj/ojI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PROkTmNW3QyggNBHVtI6hNcn26mH6s3QquJRZ4E9PcoqhCxAc/NW8DDyc8PWQk9V1 LtrpiAznnwW7vlw+qJizWgi/IrOHvnZwry8reeqWZ3etUnvAEOXTE6GZSh5H6ccTz0 9Le3W+V33y+x5i4W1dVc3vkGUY6ofZTJm/Vemw3Y= From: Niklas Cassel To: John Snow Cc: qemu-block@nongnu.org, qemu-devel@nongnu.org, Damien Le Moal , Niklas Cassel Subject: [PATCH v3 5/8] hw/ide/ahci: PxSACT and PxCI is cleared when PxCMD.ST is cleared Date: Fri, 9 Jun 2023 16:08:41 +0200 Message-Id: <20230609140844.202795-6-nks@flawful.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230609140844.202795-1-nks@flawful.org> References: <20230609140844.202795-1-nks@flawful.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::22a; envelope-from=nks.gnu@gmail.com; helo=mail-lj1-x22a.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer2=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @flawful.org) (identity @flawful.org) X-ZM-MESSAGEID: 1686321485084100043 Content-Type: text/plain; charset="utf-8" From: Niklas Cassel According to AHCI 1.3.1 definition of PxSACT: This field is cleared when PxCMD.ST is written from a '1' to a '0' by software. This field is not cleared by a COMRESET or a software reset. According to AHCI 1.3.1 definition of PxCI: This field is also cleared when PxCMD.ST is written from a '1' to a '0' by software. Clearing PxCMD.ST is part of the error recovery procedure, see AHCI 1.3.1, section "6.2 Error Recovery". If we don't clear PxCI on error recovery, the previous command will incorrectly still be marked as pending after error recovery. Signed-off-by: Niklas Cassel Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/ide/ahci.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c index 3deaf01add..a31e6fa65e 100644 --- a/hw/ide/ahci.c +++ b/hw/ide/ahci.c @@ -329,6 +329,11 @@ static void ahci_port_write(AHCIState *s, int port, in= t offset, uint32_t val) ahci_check_irq(s); break; case AHCI_PORT_REG_CMD: + if ((pr->cmd & PORT_CMD_START) && !(val & PORT_CMD_START)) { + pr->scr_act =3D 0; + pr->cmd_issue =3D 0; + } + /* Block any Read-only fields from being set; * including LIST_ON and FIS_ON. * The spec requires to set ICC bits to zero after the ICC change --=20 2.40.1 From nobody Tue May 7 02:56:55 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=flawful.org ARC-Seal: i=1; a=rsa-sha256; t=1686321571; cv=none; d=zohomail.com; s=zohoarc; b=hvbFjJZfy7oFufpRq32u9qUxSofQ8fOqNfixKe5j6gf7hm7UOHz2Xa7ooMy+Mb0lL6GxaK6Z+DXFqcdGp88YXYaiQBzhY2CNZ9gQnO8h+2XCEz0c4iiILO3BWEuUTC4UyyWxD2rG7SkBBOXrME2dD4gv84gYoH50qMk/Wpu6ZPc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1686321571; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=mkwTC8Vty9tpt7HJGEvIurSy9HSAeKfGf7/QzOLfMEs=; b=M1aXrBxsN+sSEPeV0GlRVJFglWDN1bYAhwkuXKkZYkRsi96Gbl/wAaVAJ6DOhZVJjYK/EcGoQEP/luXSQ8pzqahHdKV2BbWO0bbZnbeoAdcEjkwc/CgcyFp8pO5UI7o5Onm2YxjOqBZzZn+TvfJP1RNQGc9WMWqIb4UAnSp9YZ0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1686321571092853.9507020005923; Fri, 9 Jun 2023 07:39:31 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1q7cpc-0003ac-Gm; Fri, 09 Jun 2023 10:11:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1q7cpV-0003SH-KV; Fri, 09 Jun 2023 10:11:06 -0400 Received: from mail-lj1-x233.google.com ([2a00:1450:4864:20::233]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1q7cpQ-0000fg-N6; Fri, 09 Jun 2023 10:11:05 -0400 Received: by mail-lj1-x233.google.com with SMTP id 38308e7fff4ca-2b1b2ca09b9so20050711fa.1; Fri, 09 Jun 2023 07:10:59 -0700 (PDT) Received: from flawful.org (c-f5f0e255.011-101-6d6c6d3.bbcust.telenor.se. [85.226.240.245]) by smtp.gmail.com with ESMTPSA id p9-20020a2ea409000000b002aa40d705a5sm411403ljn.11.2023.06.09.07.10.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Jun 2023 07:10:57 -0700 (PDT) Received: by flawful.org (Postfix, from userid 112) id D589319A5; Fri, 9 Jun 2023 16:10:55 +0200 (CEST) Received: from x1-carbon.lan (unknown [129.253.182.58]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by flawful.org (Postfix) with ESMTPSA id 7FC5F180D; Fri, 9 Jun 2023 16:09:31 +0200 (CEST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686319858; x=1688911858; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature:dkim-signature :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=mkwTC8Vty9tpt7HJGEvIurSy9HSAeKfGf7/QzOLfMEs=; b=dgVuAG9Al84hbDKOal3VnlbF5puz7iFOAAKZANxxEtUTeU4CJrbXPUhBY9sMietPHK TI8jsfWHAyew0u5u7J0b3yzhGCBEVbfR8lMFEWA7wZ1IAdYDV/i09bwXlCMzVVWNne0G 0aok5WS3evg8KmCi3W6Nxp9BGcrAWRFZC3aV0+l17WlRMmiFcH0qoVv9xmCqfhmX17/v ulmRW2xHjIYuPcgvyw07lBsnoVKPUGLwOchATzAaItLebfZoLBJHyiTYJ9or30+yF53e /lzFi6r7hD0VdSyM9aLH9wC441lkUBewUo4HHDdL9YpeLfhcZE/vsAk/UixLlBS2zELZ WZTA== X-Gm-Message-State: AC+VfDxomEXTdZW6b7r9maC1jxV3YcZV0szcZv4ejywHu3ga/UeATQ9f xp1QSzM6HuvpCBRB3vOMK7Pqvp0vKC/+wm7q X-Google-Smtp-Source: ACHHUZ525L84Z6b9zWgZI8erbfXecAPm5h0OzEWwxHZ1LidZiSGGwpJwIGvHwfx2cSJzZELqxoUKgg== X-Received: by 2002:a2e:9bc7:0:b0:2a8:a6a5:e26e with SMTP id w7-20020a2e9bc7000000b002a8a6a5e26emr1197903ljj.20.1686319857860; Fri, 09 Jun 2023 07:10:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=flawful.org; s=mail; t=1686319856; bh=pUL6u6eRxrW/o4YQuJ/qElOefIt5US8w+5dHg4FA0Os=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BdmxT903T6xuWCfuZxI8S7AdXPJxHI6dFEPKEvr3CXYmspmkzaioqo0DCq6Ripn85 fl0cRP5OsEHL5lUTWkoT/cSrg8+Xtpl7ALMNRPkQQtYcM53AwWt7XK0s2D0OqLCi0K rDDtvzdntthlVuL8Epeo3+V/WnZkjl6j1xGX3VIA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=flawful.org; s=mail; t=1686319775; bh=pUL6u6eRxrW/o4YQuJ/qElOefIt5US8w+5dHg4FA0Os=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=pyZbVsJlaWoyAiBQdDZV7SEQU857JLbuXHr9PRf558cZlQAdG2DVQkrkXNSOLZtYo ydH2UmJZe7yeqcxVslepp3+E7dp3vVrpbnEEBDn3y3dWllOT0uCqabMOV3ztVxf6uy qNTjMuAKWiPRigZPlAlwg2D7sNDWlRb7BdH66o3E= From: Niklas Cassel To: John Snow Cc: qemu-block@nongnu.org, qemu-devel@nongnu.org, Damien Le Moal , Niklas Cassel Subject: [PATCH v3 6/8] hw/ide/ahci: PxCI should not get cleared when ERR_STAT is set Date: Fri, 9 Jun 2023 16:08:42 +0200 Message-Id: <20230609140844.202795-7-nks@flawful.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230609140844.202795-1-nks@flawful.org> References: <20230609140844.202795-1-nks@flawful.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::233; envelope-from=nks.gnu@gmail.com; helo=mail-lj1-x233.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer2=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @flawful.org) (identity @flawful.org) X-ZM-MESSAGEID: 1686321572455100001 Content-Type: text/plain; charset="utf-8" From: Niklas Cassel For NCQ, PxCI is cleared on command queued successfully. For non-NCQ, PxCI is cleared on command completed successfully. Successfully means ERR_STAT, BUSY and DRQ are all cleared. A command that has ERR_STAT set, does not get to clear PxCI. See AHCI 1.3.1, section 5.3.8, states RegFIS:Entry and RegFIS:ClearCI, and 5.3.16.5 ERR:FatalTaskfile. In the case of non-NCQ commands, not clearing PxCI is needed in order for host software to be able to see which command slot that failed. Signed-off-by: Niklas Cassel --- hw/ide/ahci.c | 7 ++- tests/qtest/libqos/ahci.c | 106 ++++++++++++++++++++++++++++---------- tests/qtest/libqos/ahci.h | 8 ++- 3 files changed, 88 insertions(+), 33 deletions(-) diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c index a31e6fa65e..12aaadc554 100644 --- a/hw/ide/ahci.c +++ b/hw/ide/ahci.c @@ -1523,7 +1523,8 @@ static void ahci_clear_cmd_issue(AHCIDevice *ad, uint= 8_t slot) { IDEState *ide_state =3D &ad->port.ifs[0]; =20 - if (!(ide_state->status & (BUSY_STAT | DRQ_STAT))) { + if (!(ide_state->status & ERR_STAT) && + !(ide_state->status & (BUSY_STAT | DRQ_STAT))) { ad->port_regs.cmd_issue &=3D ~(1 << slot); } } @@ -1532,6 +1533,7 @@ static void ahci_clear_cmd_issue(AHCIDevice *ad, uint= 8_t slot) static void ahci_cmd_done(const IDEDMA *dma) { AHCIDevice *ad =3D DO_UPCAST(AHCIDevice, dma, dma); + IDEState *ide_state =3D &ad->port.ifs[0]; =20 trace_ahci_cmd_done(ad->hba, ad->port_no); =20 @@ -1548,7 +1550,8 @@ static void ahci_cmd_done(const IDEDMA *dma) */ ahci_write_fis_d2h(ad, true); =20 - if (ad->port_regs.cmd_issue && !ad->check_bh) { + if (!(ide_state->status & ERR_STAT) && + ad->port_regs.cmd_issue && !ad->check_bh) { ad->check_bh =3D qemu_bh_new_guarded(ahci_check_cmd_bh, ad, &ad->mem_reentrancy_guard); qemu_bh_schedule(ad->check_bh); diff --git a/tests/qtest/libqos/ahci.c b/tests/qtest/libqos/ahci.c index f53f12aa99..a2c94c6e06 100644 --- a/tests/qtest/libqos/ahci.c +++ b/tests/qtest/libqos/ahci.c @@ -404,57 +404,110 @@ void ahci_port_clear(AHCIQState *ahci, uint8_t port) /** * Check a port for errors. */ -void ahci_port_check_error(AHCIQState *ahci, uint8_t port, - uint32_t imask, uint8_t emask) +void ahci_port_check_error(AHCIQState *ahci, AHCICommand *cmd) { + uint8_t port =3D cmd->port; uint32_t reg; =20 - /* The upper 9 bits of the IS register all indicate errors. */ - reg =3D ahci_px_rreg(ahci, port, AHCI_PX_IS); - reg &=3D ~imask; - reg >>=3D 23; - g_assert_cmphex(reg, =3D=3D, 0); + /* If expecting TF error, ensure that TFES is set. */ + if (cmd->errors) { + reg =3D ahci_px_rreg(ahci, port, AHCI_PX_IS); + ASSERT_BIT_SET(reg, AHCI_PX_IS_TFES); + } else { + /* The upper 9 bits of the IS register all indicate errors. */ + reg =3D ahci_px_rreg(ahci, port, AHCI_PX_IS); + reg &=3D ~cmd->interrupts; + reg >>=3D 23; + g_assert_cmphex(reg, =3D=3D, 0); + } =20 - /* The Sata Error Register should be empty. */ + /* The Sata Error Register should be empty, even when expecting TF err= or. */ reg =3D ahci_px_rreg(ahci, port, AHCI_PX_SERR); g_assert_cmphex(reg, =3D=3D, 0); =20 + /* If expecting TF error, and TFES was set, perform error recovery + * (see AHCI 1.3 section 6.2.2.1) such that we can send new commands. = */ + if (cmd->errors) { + /* This will clear PxCI. */ + ahci_px_clr(ahci, port, AHCI_PX_CMD, AHCI_PX_CMD_ST); + + /* The port has 500ms to disengage. */ + usleep(500000); + reg =3D ahci_px_rreg(ahci, port, AHCI_PX_CMD); + ASSERT_BIT_CLEAR(reg, AHCI_PX_CMD_CR); + + /* Clear PxIS. */ + reg =3D ahci_px_rreg(ahci, port, AHCI_PX_IS); + ahci_px_wreg(ahci, port, AHCI_PX_IS, reg); + + /* Check if we need to perform a COMRESET. + * Not implemented right now, as there is no reason why our QEMU m= odel + * should need a COMRESET when expecting TF error. */ + reg =3D ahci_px_rreg(ahci, port, AHCI_PX_TFD); + ASSERT_BIT_CLEAR(reg, AHCI_PX_TFD_STS_BSY | AHCI_PX_TFD_STS_DRQ); + + /* Enable issuing new commands. */ + ahci_px_set(ahci, port, AHCI_PX_CMD, AHCI_PX_CMD_ST); + } + /* The TFD also has two error sections. */ reg =3D ahci_px_rreg(ahci, port, AHCI_PX_TFD); - if (!emask) { + if (!cmd->errors) { ASSERT_BIT_CLEAR(reg, AHCI_PX_TFD_STS_ERR); } else { ASSERT_BIT_SET(reg, AHCI_PX_TFD_STS_ERR); } - ASSERT_BIT_CLEAR(reg, AHCI_PX_TFD_ERR & (~emask << 8)); - ASSERT_BIT_SET(reg, AHCI_PX_TFD_ERR & (emask << 8)); + ASSERT_BIT_CLEAR(reg, AHCI_PX_TFD_ERR & (~cmd->errors << 8)); + ASSERT_BIT_SET(reg, AHCI_PX_TFD_ERR & (cmd->errors << 8)); } =20 -void ahci_port_check_interrupts(AHCIQState *ahci, uint8_t port, - uint32_t intr_mask) +void ahci_port_check_interrupts(AHCIQState *ahci, AHCICommand *cmd) { + uint8_t port =3D cmd->port; uint32_t reg; =20 + /* If we expect errors, error handling in ahci_port_check_error() will + * already have cleared PxIS, so in that case this function cannot ver= ify + * and clear expected interrupts. */ + if (cmd->errors) { + return; + } + /* Check for expected interrupts */ reg =3D ahci_px_rreg(ahci, port, AHCI_PX_IS); - ASSERT_BIT_SET(reg, intr_mask); + ASSERT_BIT_SET(reg, cmd->interrupts); =20 /* Clear expected interrupts and assert all interrupts now cleared. */ - ahci_px_wreg(ahci, port, AHCI_PX_IS, intr_mask); + ahci_px_wreg(ahci, port, AHCI_PX_IS, cmd->interrupts); g_assert_cmphex(ahci_px_rreg(ahci, port, AHCI_PX_IS), =3D=3D, 0); } =20 -void ahci_port_check_nonbusy(AHCIQState *ahci, uint8_t port, uint8_t slot) +void ahci_port_check_nonbusy(AHCIQState *ahci, AHCICommand *cmd) { + uint8_t slot =3D cmd->slot; + uint8_t port =3D cmd->port; uint32_t reg; =20 - /* Assert that the command slot is no longer busy (NCQ) */ + /* For NCQ command with error PxSACT bit should still be set. + * For NCQ command without error, PxSACT bit should be cleared. + * For non-NCQ command, PxSACT bit should always be cleared. */ reg =3D ahci_px_rreg(ahci, port, AHCI_PX_SACT); - ASSERT_BIT_CLEAR(reg, (1 << slot)); + if (cmd->props->ncq && cmd->errors) { + ASSERT_BIT_SET(reg, (1 << slot)); + } else { + ASSERT_BIT_CLEAR(reg, (1 << slot)); + } =20 - /* Non-NCQ */ + /* For non-NCQ command with error, PxCI bit should still be set. + * For non-NCQ command without error, PxCI bit should be cleared. + * For NCQ command without error, PxCI bit should be cleared. + * For NCQ command with error, PxCI bit may or may not be cleared. */ reg =3D ahci_px_rreg(ahci, port, AHCI_PX_CI); - ASSERT_BIT_CLEAR(reg, (1 << slot)); + if (!cmd->props->ncq && cmd->errors) { + ASSERT_BIT_SET(reg, (1 << slot)); + } else if (!cmd->errors) { + ASSERT_BIT_CLEAR(reg, (1 << slot)); + } =20 /* And assert that we are generally not busy. */ reg =3D ahci_px_rreg(ahci, port, AHCI_PX_TFD); @@ -1207,9 +1260,10 @@ void ahci_command_wait(AHCIQState *ahci, AHCICommand= *cmd) =20 #define RSET(REG, MASK) (BITSET(ahci_px_rreg(ahci, cmd->port, (REG)), (MAS= K))) =20 - while (RSET(AHCI_PX_TFD, AHCI_PX_TFD_STS_BSY) || - RSET(AHCI_PX_CI, 1 << cmd->slot) || - (cmd->props->ncq && RSET(AHCI_PX_SACT, 1 << cmd->slot))) { + while (!RSET(AHCI_PX_TFD, AHCI_PX_TFD_STS_ERR) && + (RSET(AHCI_PX_TFD, AHCI_PX_TFD_STS_BSY) || + RSET(AHCI_PX_CI, 1 << cmd->slot) || + (cmd->props->ncq && RSET(AHCI_PX_SACT, 1 << cmd->slot)))) { usleep(50); } =20 @@ -1226,9 +1280,9 @@ void ahci_command_verify(AHCIQState *ahci, AHCIComman= d *cmd) uint8_t slot =3D cmd->slot; uint8_t port =3D cmd->port; =20 - ahci_port_check_error(ahci, port, cmd->interrupts, cmd->errors); - ahci_port_check_interrupts(ahci, port, cmd->interrupts); - ahci_port_check_nonbusy(ahci, port, slot); + ahci_port_check_nonbusy(ahci, cmd); + ahci_port_check_error(ahci, cmd); + ahci_port_check_interrupts(ahci, cmd); ahci_port_check_cmd_sanity(ahci, cmd); if (cmd->interrupts & AHCI_PX_IS_DHRS) { ahci_port_check_d2h_sanity(ahci, port, slot); diff --git a/tests/qtest/libqos/ahci.h b/tests/qtest/libqos/ahci.h index 88835b6228..48017864bf 100644 --- a/tests/qtest/libqos/ahci.h +++ b/tests/qtest/libqos/ahci.h @@ -590,11 +590,9 @@ void ahci_set_command_header(AHCIQState *ahci, uint8_t= port, void ahci_destroy_command(AHCIQState *ahci, uint8_t port, uint8_t slot); =20 /* AHCI sanity check routines */ -void ahci_port_check_error(AHCIQState *ahci, uint8_t port, - uint32_t imask, uint8_t emask); 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[85.226.240.245]) by smtp.gmail.com with ESMTPSA id u5-20020ac248a5000000b004f5a548820asm554580lfg.156.2023.06.09.07.10.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Jun 2023 07:10:50 -0700 (PDT) Received: by flawful.org (Postfix, from userid 112) id 327A319A5; Fri, 9 Jun 2023 16:10:48 +0200 (CEST) Received: from x1-carbon.lan (unknown [129.253.182.58]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by flawful.org (Postfix) with ESMTPSA id 646001A81; Fri, 9 Jun 2023 16:09:42 +0200 (CEST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686319851; x=1688911851; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature:dkim-signature :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=PVw/nyOLjJlLuDJ2e/yg0k3IjWpVDFSyPCJAnZ8lUhs=; b=SOGW5HwoE6nkueX2d9wdpNNlmlqxmLS4ITX+frV+yjwyuRhgWz0rxHfxjZfG/4+j/z HigFPybM7W+rY4wn88HnAUjgsp8ADftByCE7p471kip+1C19NlacWeUygSlgLcV8bnqi rnNZZsGRs8GXoFrL9prtNPpu6x+n50bT7QXa1Pm+DbdPawupXn//WQ1mQbL5FHJcwIXi +MJQpTEYAKiWcBCV+hM8wNZgHm0VyghRbBcDJopL66ztKJQ8VHke59lqiD5K6EuDJLgI cjcSjUeejojo43sASxAExDo+e1mzm0xzC8wwdQGJt7YdtBv26WD6+QK51JGH77IOF8Jr yx9A== X-Gm-Message-State: AC+VfDx4k4k+y9yVAkRDxQFV1JQFZINr2HJXlQYKh52218LGx29Vam+r AUf7IOUPIIOTAMyCYgiiotXMKeLH3qXzION1 X-Google-Smtp-Source: ACHHUZ6Jk2aWM8GegvH70eJVpQ96V0lUHvi2o9+Xo7dRblieYOleCDw+nbb5kOfx5inZLjowrWf2sg== X-Received: by 2002:ac2:4db2:0:b0:4f4:d83e:4140 with SMTP id h18-20020ac24db2000000b004f4d83e4140mr1007070lfe.34.1686319850882; Fri, 09 Jun 2023 07:10:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=flawful.org; s=mail; t=1686319849; bh=EJ3qj6IemNXqj29g+yvQ2KmLufYZrgZ147654xg75oY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SVR84AatxXa8T6LTcHrRblIsdsyhl8qaTap78iLaasV5TkvUzm8T92LtUsI2NUN5T I6BaezhnNkY6abOr0Mba75aD2F5CaYuzP/uWiz1Txkof01mdtOZ5kEGwmoM1UKCTVd 6KwN/CzBcGT6wrPbxnIHspFRgxHLF2iQyeLQFsSY= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=flawful.org; s=mail; t=1686319786; bh=EJ3qj6IemNXqj29g+yvQ2KmLufYZrgZ147654xg75oY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DdYRO2HMw2nuQPRgTOhKOfXMzg2ZBXJ9k7NVUn7zWIOwKI9NmUxVxox2Plk+yyweF jI45ZXIwHCK6t7b2Ov2m3pooYIwcyNPQq3JayNCuATbdDFRYbF5e+sN8y6g2t/8Qx8 Lh6B7/g6KlocKBb2/g5XEjGx45rpFrdBDbLE0sYg= From: Niklas Cassel To: John Snow Cc: qemu-block@nongnu.org, qemu-devel@nongnu.org, Damien Le Moal , Niklas Cassel Subject: [PATCH v3 7/8] hw/ide/ahci: fix ahci_write_fis_sdb() Date: Fri, 9 Jun 2023 16:08:43 +0200 Message-Id: <20230609140844.202795-8-nks@flawful.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230609140844.202795-1-nks@flawful.org> References: <20230609140844.202795-1-nks@flawful.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::131; envelope-from=nks.gnu@gmail.com; helo=mail-lf1-x131.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer2=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @flawful.org) (identity @flawful.org) X-ZM-MESSAGEID: 1686321588401100002 Content-Type: text/plain; charset="utf-8" From: Niklas Cassel When there is an error, we need to raise a TFES error irq, see AHCI 1.3.1, 5.3.13.1 SDB:Entry. If ERR_STAT is set, we jump to state ERR:FatalTaskfile, which will raise a TFES IRQ unconditionally, regardless if the I bit is set in the FIS or not. Thus, we should never raise a normal IRQ after having sent an error IRQ. It is valid to signal successfully completed commands as finished in the same SDB FIS that generates the error IRQ. The important thing is that commands that did not complete successfully (e.g. commands that were aborted, do not get the finished bit set). Before this commit, there was never a TFES IRQ raised on NCQ error. Signed-off-by: Niklas Cassel Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/ide/ahci.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c index 12aaadc554..ef6c9fc378 100644 --- a/hw/ide/ahci.c +++ b/hw/ide/ahci.c @@ -806,8 +806,14 @@ static void ahci_write_fis_sdb(AHCIState *s, NCQTransf= erState *ncq_tfs) pr->scr_act &=3D ~ad->finished; ad->finished =3D 0; =20 - /* Trigger IRQ if interrupt bit is set (which currently, it always is)= */ - if (sdb_fis->flags & 0x40) { + /* + * TFES IRQ is always raised if ERR_STAT is set, regardless of I bit. + * If ERR_STAT is not set, trigger SDBS IRQ if interrupt bit is set + * (which currently, it always is). + */ + if (sdb_fis->status & ERR_STAT) { + ahci_trigger_irq(s, ad, AHCI_PORT_IRQ_BIT_TFES); + } else if (sdb_fis->flags & 0x40) { ahci_trigger_irq(s, ad, AHCI_PORT_IRQ_BIT_SDBS); } } --=20 2.40.1 From nobody Tue May 7 02:56:55 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=flawful.org ARC-Seal: i=1; a=rsa-sha256; t=1686321577; cv=none; d=zohomail.com; s=zohoarc; b=Y+oM8Ruaf+XYZkbTeZHPOoQVM0mfgVfNonpo3CsJe2quI7cycYh1LVPcJ+Ai7MuQJASyypGATPJnZ7UeBDlrP6NIfa64gl0GYo5lUMbjHIVQVwdDNs/DnBcJcf9j7ALaiA8iXQlr1eYBaG363iI9Nl5daNZOpezi14LZF2/wf5w= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1686321577; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=vpw0xLuydvT7GFr8RIfSnERhs9PDAhGa5JWXYO3jpus=; b=WeWqM86Mx05a6tTw9VPLP87CK1qU5y/gfy9e+MbB0J5nVRwkzIVIAouEyllcGcx2kB001LgX5JXRGEE0cw/ZZDYDDMr15SzX1ysL47TSNp4jtT47tdyKhXWF2TzIOU4kb2Ba1COHzPmyAFKh2WtGN043SCr/1N4smCkXxtuy4yQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1686321577498961.9439978423804; Fri, 9 Jun 2023 07:39:37 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1q7cph-000439-2S; Fri, 09 Jun 2023 10:11:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1q7cpf-0003uk-KA; Fri, 09 Jun 2023 10:11:15 -0400 Received: from mail-lj1-x22d.google.com ([2a00:1450:4864:20::22d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1q7cpd-0000h8-UF; Fri, 09 Jun 2023 10:11:15 -0400 Received: by mail-lj1-x22d.google.com with SMTP id 38308e7fff4ca-2b1aecef94fso19967221fa.3; Fri, 09 Jun 2023 07:11:13 -0700 (PDT) Received: from flawful.org (c-f5f0e255.011-101-6d6c6d3.bbcust.telenor.se. [85.226.240.245]) by smtp.gmail.com with ESMTPSA id s4-20020a2e98c4000000b002b1a8e9d728sm396323ljj.64.2023.06.09.07.11.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Jun 2023 07:11:10 -0700 (PDT) Received: by flawful.org (Postfix, from userid 112) id 51A811763; Fri, 9 Jun 2023 16:11:09 +0200 (CEST) Received: from x1-carbon.lan (unknown [129.253.182.58]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by flawful.org (Postfix) with ESMTPSA id E6CDE1746; Fri, 9 Jun 2023 16:09:47 +0200 (CEST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686319870; x=1688911870; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature:dkim-signature :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=vpw0xLuydvT7GFr8RIfSnERhs9PDAhGa5JWXYO3jpus=; b=UIOwuwZhErCneu5quKb9AJV/VDaZZ3fuDcai4rDM+Arcl8BTAXrYnjc3IUHju05mAu y2e5C+yJjuU62m8n08g281YQ2AOdHzfVd/P8Gwa0kI694k/v+z5o7wRYbsOGu21kcmcy jGfGkD1/ok/zYLTsgbs+fmaRbXIkIg+BT0D8A8FRq27N1sLuCS+m8Sup/f6re0LByE0/ Rcprg3ugGZgmXDMjZ0PNjpzlFuPRYsnOB4LKCKBvekQcF3w7GIj6ns0QoODhwBWVJYTT /syX3kZFJux+mow3Hjit92VtB48XJQNkhXxNMczlbqBqDWOgZ8sOHP4cZmArxv0SigXT 7O2A== X-Gm-Message-State: AC+VfDxLnypWLrw5dyFq+3gyJaB4zUCbJrJ96cmYwcbMrKkpyP6W3c6B FVc6u4w1kJNpRnyCxn/9T6g6Udff9uMA/uym X-Google-Smtp-Source: ACHHUZ7XrVyNzOqZ6E+NvIzKIT6PgWoWIvWZbizLuwbfr4mI5gkvw1xyHF7U424VxeKOZ4/HlcUkMw== X-Received: by 2002:a2e:9256:0:b0:2b1:e6eb:1bbc with SMTP id v22-20020a2e9256000000b002b1e6eb1bbcmr1001157ljg.32.1686319870522; Fri, 09 Jun 2023 07:11:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=flawful.org; s=mail; t=1686319869; bh=wq7rsN/ynAZulkdl9oezyNlPiXKk6FZZrfXY0CHj0x0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=reUXXUrSEy1F7XcCoWqS8dS+3n216HXp2NASLFTFrBPSlhan89nmM8RdB3HgAOMZe OaMj75usJqs+xJ88d5NBSvrMDUhazFVrj+7mp63AqbjJ4SAyeQL1CrrfL8y0vgJqm6 duhSxKvfeDk4h7E6IREyldZPm7PZ1DSUqXoGhYPo= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=flawful.org; s=mail; t=1686319791; bh=wq7rsN/ynAZulkdl9oezyNlPiXKk6FZZrfXY0CHj0x0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=usYoMw5F+2178HSpbL+VV0Pn+z56UYzCB3hLKeDaVbIcH0e6mSPcPChn195+Dx041 8TOhqV3Cb3k7LWwNkWQKkJCFpSs8iQoq2aIPhCnK0NSOaI654acxyMQMe3VyiU/Ggh NFK/PX9NSuocIfewZVu6vsRmsG51rUtBmjhKGcoQ= From: Niklas Cassel To: John Snow Cc: qemu-block@nongnu.org, qemu-devel@nongnu.org, Damien Le Moal , Niklas Cassel Subject: [PATCH v3 8/8] hw/ide/ahci: fix broken SError handling Date: Fri, 9 Jun 2023 16:08:44 +0200 Message-Id: <20230609140844.202795-9-nks@flawful.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230609140844.202795-1-nks@flawful.org> References: <20230609140844.202795-1-nks@flawful.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::22d; envelope-from=nks.gnu@gmail.com; helo=mail-lj1-x22d.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer2=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @flawful.org) (identity @flawful.org) X-ZM-MESSAGEID: 1686321579238100003 Content-Type: text/plain; charset="utf-8" From: Niklas Cassel When encountering an NCQ error, you should not write the NCQ tag to the SError register. This is completely wrong. The SError register has a clear definition, where each bit represents a different error, see PxSERR definition in AHCI 1.3.1. If we write a random value (like the NCQ tag) in SError, e.g. Linux will read SError, and will trigger arbitrary error handling depending on the NCQ tag that happened to be executing. In case of success, ncq_cb() will call ncq_finish(). In case of error, ncq_cb() will call ncq_err() (which will clear ncq_tfs->used), and then call ncq_finish(), thus using ncq_tfs->used is sufficient to tell if finished should get set or not. Signed-off-by: Niklas Cassel Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/ide/ahci.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c index ef6c9fc378..d0a774bc17 100644 --- a/hw/ide/ahci.c +++ b/hw/ide/ahci.c @@ -1012,7 +1012,6 @@ static void ncq_err(NCQTransferState *ncq_tfs) =20 ide_state->error =3D ABRT_ERR; ide_state->status =3D READY_STAT | ERR_STAT; - ncq_tfs->drive->port_regs.scr_err |=3D (1 << ncq_tfs->tag); qemu_sglist_destroy(&ncq_tfs->sglist); ncq_tfs->used =3D 0; } @@ -1022,7 +1021,7 @@ static void ncq_finish(NCQTransferState *ncq_tfs) /* If we didn't error out, set our finished bit. Errored commands * do not get a bit set for the SDB FIS ACT register, nor do they * clear the outstanding bit in scr_act (PxSACT). */ - if (!(ncq_tfs->drive->port_regs.scr_err & (1 << ncq_tfs->tag))) { + if (ncq_tfs->used) { ncq_tfs->drive->finished |=3D (1 << ncq_tfs->tag); } =20 --=20 2.40.1