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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id u26-20020a05600c211a00b003f42314832fsm3097686wml.18.2023.06.09.08.54.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Jun 2023 08:54:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1686326099; x=1688918099; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=gzyK1+R1Q0PBbWpAgX7HkHDOH+bFjjAYfW6YaQlCD2E=; b=L9OOa69oHb1k9ANzMZQXMiQZwzh8/3t2DSlz9zLXYsph7ulDJXuRW2o7lsKWY5kUV3 9Ki4K2wA8AGoB9rUkmaR3LFbT9wH9WZCwLX/4XowVKNO8PT4HbjpNMMmcwWIF0dKl6vK 5ObQKvphiQFF43RctanL04A93MdNPRSn7x2uD+FsdYVFxc8D+1Hwzl6Njc/+kv7FQRbQ qPG2ojgYc/6tpQH4cTfAKQatfLkoAUleVyCEEo0DVpgAh4V5FkeyHZFZsfFSgg7fLzx3 p9gMpKc5VDVL1XTY4yWH4nFo6JavqkMh7vnsLISmgpMtz4SHyuYkFWkdCVDr6kT0E1l6 teMA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686326099; x=1688918099; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=gzyK1+R1Q0PBbWpAgX7HkHDOH+bFjjAYfW6YaQlCD2E=; b=bpHg9EU1lVsN0CA4YV6krx+zm4gLqey1nnTN7l4XlCfp4Dvy6hBJyYcraIV/IJOv9D gj2Ei6K8lsTDRQsbLNdw9MaQI9TDRT/H5J1Kw/ZZQKM89hDfrpdSOou9U/KhJmydrm8P lzXehPY+CJ6xE75VFFJiLaNvcjIAF0iqzEA95HPFaYLeVVaOv+7fjn/4Za1kMaV8R6oZ yfcWwp1hf1r6xcTNCp0G9VH+Oi2wy4xRKkLHBIsPaLTnL2I478jzMMsmHF7YgiN+lJ+2 tEeC/ZXqDaPS9N/RHys2EMyvtrivanxRtajF//DfxzEoD+DB88C/aC3BSftjd5NMr8uv zulQ== X-Gm-Message-State: AC+VfDxEV87J/+ns+BcjC4tDTgJA4a5/UOw/02XGTGO5hzvymHdCXYaf vcrqUOIFxqaiAE73yIuSKOMi9Q== X-Google-Smtp-Source: ACHHUZ6bNoC3bcjz9Ihm0nNsbTDy+hJ9LSYsCDCvK+9Jg0L4gCx/GBGkm+Bub6pvcNUOEcJDAXbevg== X-Received: by 2002:adf:dd8d:0:b0:303:daff:f1a3 with SMTP id x13-20020adfdd8d000000b00303dafff1a3mr4556477wrl.1.1686326099189; Fri, 09 Jun 2023 08:54:59 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Richard Henderson , qemu-stable@nongnu.org Subject: [PATCH] target/arm: Return correct result for LDG when ATA=0 Date: Fri, 9 Jun 2023 16:54:57 +0100 Message-Id: <20230609155457.87848-1-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer2=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1686326152006100001 Content-Type: text/plain; charset="utf-8" The LDG instruction loads the tag from a memory address (identified by [Xn + offset]), and then merges that tag into the destination register Xt. We implemented this correctly for the case when allocation tags are enabled, but didn't get it right when ATA=3D0: instead of merging the tag bits into Xt, we merged them into the memory address [Xn + offset] and then set Xt to that. Merge the tag bits into the old Xt value, as they should be. Cc: qemu-stable@nongnu.org Fixes: c15294c1e36a7dd9b25 ("target/arm: Implement LDG, STG, ST2G instructi= ons") Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- Spotted this while I was doing decodetree conversion stuff. I guess nobody runs with MTE available but not turned on :-) --- target/arm/tcg/translate-a64.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index aa93f37e216..9ead91a450b 100644 --- a/target/arm/tcg/translate-a64.c +++ b/target/arm/tcg/translate-a64.c @@ -4187,9 +4187,13 @@ static void disas_ldst_tag(DisasContext *s, uint32_t= insn) if (s->ata) { gen_helper_ldg(tcg_rt, cpu_env, addr, tcg_rt); } else { + /* + * Tag access disabled: we must check for aborts on the load + * load from [rn+offset], and then insert a 0 tag into rt. + */ clean_addr =3D clean_data_tbi(s, addr); gen_probe_access(s, clean_addr, MMU_DATA_LOAD, MO_8); - gen_address_with_allocation_tag0(tcg_rt, addr); + gen_address_with_allocation_tag0(tcg_rt, tcg_rt); } } else { tcg_rt =3D cpu_reg_sp(s, rt); --=20 2.34.1