From nobody Mon May 12 11:44:45 2025 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1695053439; cv=none; d=zohomail.com; s=zohoarc; b=klMFkLSmMZHLzAO1IcwfJOvxKHyqttZ9MqexRwvPEUEQrndjwQw4CTrq3VK2Kr6XcuUnXba/kQrhMeRGNwRY4M1Dl/UCY6UxMHoFjOEPjkx7xLCTV9hEiZMdN8wDyPGE2ElaiosJFvZZ0GbWLImHnzqEmPco4kbQF8bcp+Jo7jY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1695053439; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=TI3/KBb/+3Te5uOTKkyhQWXS4VS0D1UFt2aGwQADGyc=; b=IU7ter09BOLi8oKGrmiA9SOx5Obps9bcJh6PGAEHRm4BBFi4vSdDSxNg7JzwTqQUYfcsGaY3aVoVjQ7V7ny1O+3v2ExqDn1D7Oc2ZquNEwohEuaqamnapySOA9llJ9y1x4/hO20/VFw5Kqluyf+MN5v+uwW2ZnxU4gtVR8wlmoA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 169505343917028.8812207229646; Mon, 18 Sep 2023 09:10:39 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qiGks-0002mU-1D; Mon, 18 Sep 2023 12:05:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qiGkH-00025D-3G for qemu-devel@nongnu.org; Mon, 18 Sep 2023 12:05:11 -0400 Received: from mail-lf1-x130.google.com ([2a00:1450:4864:20::130]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qiGk8-0004Th-Jt for qemu-devel@nongnu.org; Mon, 18 Sep 2023 12:05:08 -0400 Received: by mail-lf1-x130.google.com with SMTP id 2adb3069b0e04-5031ccf004cso1483086e87.2 for ; Mon, 18 Sep 2023 09:04:58 -0700 (PDT) Received: from localhost.localdomain (static-212-193-78-212.thenetworkfactory.nl. [212.78.193.212]) by smtp.gmail.com with ESMTPSA id fd14-20020a056402388e00b005307e75d24dsm5026981edb.17.2023.09.18.09.04.55 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 18 Sep 2023 09:04:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1695053097; x=1695657897; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=TI3/KBb/+3Te5uOTKkyhQWXS4VS0D1UFt2aGwQADGyc=; b=pHX95i3nXfXTOZuEAFciA3QUiYGMZmoIxpNzIDAcQtvk9LsQv+8yEge3GPu0+74i1d P0DArD+nTKyMQttY5jJEj4MPSG4an7irfOdwaijJM9p5oscAEf/PQIU40aJK/V1Dhsyf q/J0ViBf3MYyDoCKU1vFrnqXWv+tWRq1k538i3ENYICht2dNpnf2bL6PULE/5BdFPcWm A5ydT8bB5Un0IlI/tBkwZ28BuKWb3DnGPcyt0TBkoCWV3ljvB71HsvgBOGxK/Hy1Dojh Ujp3/ee2f5kcF630xiZOoVmlywXR28S9KE0lQZVoStoJAAJVSRkxXw+b11QhuBqoGg9V oJaA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1695053097; x=1695657897; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=TI3/KBb/+3Te5uOTKkyhQWXS4VS0D1UFt2aGwQADGyc=; b=wdCuxnpUadqm5xEi7O1YUlQ1ZW3j12CAzVbS2DNoJnymLcjPYyqbMLdZhq574hJmtS HgCRgku/+XGabayVTkNd6eEmY1XuUsy9tEjA/ED92MY6h7BqBOSpRIa+3DDIVKOaYtcQ 8vRBdyzMRbfF8lDK+SRQVECo7l7j2bKHQ47gTYMe6DUBIY8Ae9KHvY5WHCpiCXYJ8LVL seS194Qs4G8OrtX1v/HDhRK1cEkxSnH9GGZ+sirJ/kRIo5OSUE1+fJNEiofdNRBywuQX gPnnbbzfdi0VKnvkCmJoQTqwrEk71mjogmJn9plrx29niPSBMNpgTYf6CU/SMaTo1jUd 3miQ== X-Gm-Message-State: AOJu0YyhI/iuOHL1pJJJ9lXnFuNQ7BeXu0N2CZw8Q8B3o6M1TAkwLLbK vLyQjpjwa7bsWLLuxTUBpoiFsQ0HjI4vWdX7n7ws7RYs X-Google-Smtp-Source: AGHT+IE8tHvaLGMz9Bg2ooXF3ZqMqPFeliYGvN3VlPRFdqErpxTJBqw3FnvE/+Bds7Ty0U2MCoDi/A== X-Received: by 2002:ac2:4887:0:b0:503:56f:c655 with SMTP id x7-20020ac24887000000b00503056fc655mr4625310lfc.57.1695053096666; Mon, 18 Sep 2023 09:04:56 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Laurent Vivier , Paolo Bonzini , Max Filippov , David Hildenbrand , Peter Xu , Anton Johansson , Peter Maydell , kvm@vger.kernel.org, Marek Vasut , David Gibson , Brian Cain , Yoshinori Sato , "Edgar E . Iglesias" , Claudio Fontana , Daniel Henrique Barboza , Artyom Tarasenko , Marcelo Tosatti , qemu-ppc@nongnu.org, Liu Zhiwei , Aurelien Jarno , Ilya Leoshkevich , Daniel Henrique Barboza , Bastian Koppelmann , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Alistair Francis , Alessandro Di Federico , Song Gao , Marcel Apfelbaum , Chris Wulff , "Michael S. Tsirkin" , Alistair Francis , Fabiano Rosas , qemu-s390x@nongnu.org, Yanan Wang , Luc Michel , Weiwei Li , Bin Meng , Stafford Horne , Xiaojuan Yang , "Daniel P . Berrange" , Thomas Huth , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Jiaxun Yang , Richard Henderson , Aleksandar Rikalo , Bernhard Beschow , Mark Cave-Ayland , qemu-riscv@nongnu.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , Nicholas Piggin , Greg Kurz , Michael Rolnik , Eduardo Habkost , Markus Armbruster , Palmer Dabbelt Subject: [PATCH 22/22] exec/cpu: Call cpu_exec_realizefn() once in cpu_common_realize() Date: Mon, 18 Sep 2023 18:02:55 +0200 Message-ID: <20230918160257.30127-23-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230918160257.30127-1-philmd@linaro.org> References: <20230918160257.30127-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::130; envelope-from=philmd@linaro.org; helo=mail-lf1-x130.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer2=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1695053440907100003 cpu_exec_realizefn() is called in each ${target}_cpu_realize(), before calling their parent_realize(), which is simply cpu_common_realizefn(). Directly call it there instead. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/core/cpu-common.c | 4 ++++ target/alpha/cpu.c | 8 -------- target/arm/cpu.c | 6 ------ target/avr/cpu.c | 7 ------- target/cris/cpu.c | 7 ------- target/hexagon/cpu.c | 7 ------- target/hppa/cpu.c | 15 ++------------- target/i386/cpu.c | 6 ------ target/i386/kvm/kvm-cpu.c | 4 ++-- target/loongarch/cpu.c | 7 ------- target/m68k/cpu.c | 7 ------- target/microblaze/cpu.c | 7 ------- target/mips/cpu.c | 7 ------- target/nios2/cpu.c | 7 ------- target/openrisc/cpu.c | 7 ------- target/ppc/cpu_init.c | 5 ----- target/riscv/cpu.c | 6 ------ target/rx/cpu.c | 7 ------- target/s390x/cpu.c | 5 ----- target/sh4/cpu.c | 7 ------- target/sparc/cpu.c | 8 -------- target/tricore/cpu.c | 7 ------- target/xtensa/cpu.c | 7 ------- 23 files changed, 8 insertions(+), 150 deletions(-) diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index 35c0cc4dad..8901c482a0 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -204,6 +204,10 @@ static void cpu_common_realizefn(DeviceState *dev, Err= or **errp) } } =20 + if (!cpu_exec_realizefn(cpu, errp)) { + return; + } + /* Create CPU address space and vCPU thread */ qemu_init_vcpu(cpu); =20 diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index eb78318bb8..85834c4d61 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -72,15 +72,7 @@ static void alpha_cpu_disas_set_info(CPUState *cpu, disa= ssemble_info *info) =20 static void alpha_cpu_realizefn(DeviceState *dev, Error **errp) { - CPUState *cs =3D CPU(dev); AlphaCPUClass *acc =3D ALPHA_CPU_GET_CLASS(dev); - Error *local_err =3D NULL; - - cpu_exec_realizefn(cs, &local_err); - if (local_err !=3D NULL) { - error_propagate(errp, local_err); - return; - } =20 acc->parent_realize(dev, errp); } diff --git a/target/arm/cpu.c b/target/arm/cpu.c index a551383fd3..d8eaa186cd 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1756,12 +1756,6 @@ static void arm_cpu_realizefn(DeviceState *dev, Erro= r **errp) int pagebits; Error *local_err =3D NULL; =20 - cpu_exec_realizefn(cs, &local_err); - if (local_err !=3D NULL) { - error_propagate(errp, local_err); - return; - } - #ifndef CONFIG_USER_ONLY { uint64_t scale; diff --git a/target/avr/cpu.c b/target/avr/cpu.c index d3460b3960..e512ad46d3 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -112,13 +112,6 @@ static void avr_cpu_realizefn(DeviceState *dev, Error = **errp) { CPUState *cs =3D CPU(dev); AVRCPUClass *mcc =3D AVR_CPU_GET_CLASS(dev); - Error *local_err =3D NULL; - - cpu_exec_realizefn(cs, &local_err); - if (local_err !=3D NULL) { - error_propagate(errp, local_err); - return; - } =20 mcc->parent_realize(dev, errp); cpu_reset(cs); diff --git a/target/cris/cpu.c b/target/cris/cpu.c index 671693a362..9fb69ecda4 100644 --- a/target/cris/cpu.c +++ b/target/cris/cpu.c @@ -144,13 +144,6 @@ static void cris_cpu_realizefn(DeviceState *dev, Error= **errp) { CPUState *cs =3D CPU(dev); CRISCPUClass *ccc =3D CRIS_CPU_GET_CLASS(dev); - Error *local_err =3D NULL; - - cpu_exec_realizefn(cs, &local_err); - if (local_err !=3D NULL) { - error_propagate(errp, local_err); - return; - } =20 ccc->parent_realize(dev, errp); cpu_reset(cs); diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index 5b9bb3fe83..17785e2921 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -332,13 +332,6 @@ static void hexagon_cpu_realize(DeviceState *dev, Erro= r **errp) { CPUState *cs =3D CPU(dev); HexagonCPUClass *mcc =3D HEXAGON_CPU_GET_CLASS(dev); - Error *local_err =3D NULL; - - cpu_exec_realizefn(cs, &local_err); - if (local_err !=3D NULL) { - error_propagate(errp, local_err); - return; - } =20 gdb_register_coprocessor(cs, hexagon_hvx_gdb_read_register, hexagon_hvx_gdb_write_register, diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index b0d106b6c7..a87028b275 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -121,22 +121,11 @@ void hppa_cpu_do_unaligned_access(CPUState *cs, vaddr= addr, =20 static void hppa_cpu_realizefn(DeviceState *dev, Error **errp) { - CPUState *cs =3D CPU(dev); HPPACPUClass *acc =3D HPPA_CPU_GET_CLASS(dev); - Error *local_err =3D NULL; - - cpu_exec_realizefn(cs, &local_err); - if (local_err !=3D NULL) { - error_propagate(errp, local_err); - return; - } =20 #ifndef CONFIG_USER_ONLY - { - HPPACPU *cpu =3D HPPA_CPU(cs); - cpu->alarm_timer =3D timer_new_ns(QEMU_CLOCK_VIRTUAL, - hppa_cpu_alarm_timer, cpu); - } + cpu->alarm_timer =3D timer_new_ns(QEMU_CLOCK_VIRTUAL, + hppa_cpu_alarm_timer, HPPA_CPU(dev)); #endif =20 acc->parent_realize(dev, errp); diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 2884733397..c170e2976b 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7311,12 +7311,6 @@ static void x86_cpu_realizefn(DeviceState *dev, Erro= r **errp) return; } =20 - cpu_exec_realizefn(cs, &local_err); - if (local_err !=3D NULL) { - error_propagate(errp, local_err); - return; - } - if (xcc->host_cpuid_required && !accel_uses_host_cpuid()) { g_autofree char *name =3D x86_cpu_class_get_model_name(xcc); error_setg(&local_err, "CPU model '%s' requires KVM or HVF", name); diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c index 1fe62ce176..0f52649779 100644 --- a/target/i386/kvm/kvm-cpu.c +++ b/target/i386/kvm/kvm-cpu.c @@ -34,10 +34,10 @@ static bool kvm_cpu_realizefn(CPUState *cs, Error **err= p) * * x86_cpu_realize(): * -> x86_cpu_expand_features() - * -> cpu_exec_realizefn(): + * -> cpu_common_realizefn() + * -> cpu_exec_realizefn(): * -> accel_cpu_realizefn() * kvm_cpu_realizefn() -> host_cpu_realizefn() - * -> cpu_common_realizefn() * -> check/update ucode_rev, phys_bits, mwait */ if (cpu->max_features) { diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index dc0ac39833..d61dcaebca 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -555,13 +555,6 @@ static void loongarch_cpu_realizefn(DeviceState *dev, = Error **errp) { CPUState *cs =3D CPU(dev); LoongArchCPUClass *lacc =3D LOONGARCH_CPU_GET_CLASS(dev); - Error *local_err =3D NULL; - - cpu_exec_realizefn(cs, &local_err); - if (local_err !=3D NULL) { - error_propagate(errp, local_err); - return; - } =20 loongarch_cpu_register_gdb_regs_for_features(cs); =20 diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 3da316bc30..c6740e0e78 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -309,16 +309,9 @@ static void m68k_cpu_realizefn(DeviceState *dev, Error= **errp) CPUState *cs =3D CPU(dev); M68kCPU *cpu =3D M68K_CPU(dev); M68kCPUClass *mcc =3D M68K_CPU_GET_CLASS(dev); - Error *local_err =3D NULL; =20 register_m68k_insns(&cpu->env); =20 - cpu_exec_realizefn(cs, &local_err); - if (local_err !=3D NULL) { - error_propagate(errp, local_err); - return; - } - m68k_cpu_init_gdb(cpu); =20 mcc->parent_realize(dev, errp); diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 1f19a6e07d..5194911ad4 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -207,13 +207,6 @@ static void mb_cpu_realizefn(DeviceState *dev, Error *= *errp) uint8_t version_code =3D 0; const char *version; int i =3D 0; - Error *local_err =3D NULL; - - cpu_exec_realizefn(cs, &local_err); - if (local_err !=3D NULL) { - error_propagate(errp, local_err); - return; - } =20 if (cpu->cfg.addr_size < 32 || cpu->cfg.addr_size > 64) { error_setg(errp, "addr-size %d is out of range (32 - 64)", diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 7c81e6c356..4f15dcea44 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -462,13 +462,6 @@ static void mips_cpu_realizefn(DeviceState *dev, Error= **errp) MIPSCPU *cpu =3D MIPS_CPU(dev); CPUMIPSState *env =3D &cpu->env; MIPSCPUClass *mcc =3D MIPS_CPU_GET_CLASS(dev); - Error *local_err =3D NULL; - - cpu_exec_realizefn(cs, &local_err); - if (local_err !=3D NULL) { - error_propagate(errp, local_err); - return; - } =20 env->exception_base =3D (int32_t)0xBFC00000; =20 diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c index f500ca7ba2..fc753bb1be 100644 --- a/target/nios2/cpu.c +++ b/target/nios2/cpu.c @@ -199,13 +199,6 @@ static void nios2_cpu_realizefn(DeviceState *dev, Erro= r **errp) CPUState *cs =3D CPU(dev); Nios2CPU *cpu =3D NIOS2_CPU(cs); Nios2CPUClass *ncc =3D NIOS2_CPU_GET_CLASS(dev); - Error *local_err =3D NULL; - - cpu_exec_realizefn(cs, &local_err); - if (local_err !=3D NULL) { - error_propagate(errp, local_err); - return; - } =20 realize_cr_status(cs); =20 diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index e4ec95ca7f..438146c681 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -133,13 +133,6 @@ static void openrisc_cpu_realizefn(DeviceState *dev, E= rror **errp) { CPUState *cs =3D CPU(dev); OpenRISCCPUClass *occ =3D OPENRISC_CPU_GET_CLASS(dev); - Error *local_err =3D NULL; - - cpu_exec_realizefn(cs, &local_err); - if (local_err !=3D NULL) { - error_propagate(errp, local_err); - return; - } =20 occ->parent_realize(dev, errp); cpu_reset(cs); diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 24d4e8fa7e..99087ee57c 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -6809,11 +6809,6 @@ static void ppc_cpu_realize(DeviceState *dev, Error = **errp) PowerPCCPUClass *pcc =3D POWERPC_CPU_GET_CLASS(cpu); Error *local_err =3D NULL; =20 - cpu_exec_realizefn(cs, &local_err); - if (local_err !=3D NULL) { - error_propagate(errp, local_err); - return; - } if (cpu->vcpu_id =3D=3D UNASSIGNED_CPU_INDEX) { cpu->vcpu_id =3D cs->cpu_index; } diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 4f7ae55359..62be6d88fc 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1503,12 +1503,6 @@ static void riscv_cpu_realize(DeviceState *dev, Erro= r **errp) RISCVCPUClass *mcc =3D RISCV_CPU_GET_CLASS(dev); Error *local_err =3D NULL; =20 - cpu_exec_realizefn(cs, &local_err); - if (local_err !=3D NULL) { - error_propagate(errp, local_err); - return; - } - if (tcg_enabled()) { riscv_cpu_realize_tcg(dev, &local_err); if (local_err !=3D NULL) { diff --git a/target/rx/cpu.c b/target/rx/cpu.c index 089df61790..db951ff988 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -129,13 +129,6 @@ static void rx_cpu_realize(DeviceState *dev, Error **e= rrp) { CPUState *cs =3D CPU(dev); RXCPUClass *rcc =3D RX_CPU_GET_CLASS(dev); - Error *local_err =3D NULL; - - cpu_exec_realizefn(cs, &local_err); - if (local_err !=3D NULL) { - error_propagate(errp, local_err); - return; - } =20 rcc->parent_realize(dev, errp); cpu_reset(cs); diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 983dbfe563..e305928651 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -231,11 +231,6 @@ static void s390_cpu_realizefn(DeviceState *dev, Error= **errp) S390CPUClass *scc =3D S390_CPU_GET_CLASS(dev); Error *err =3D NULL; =20 - cpu_exec_realizefn(cs, &err); - if (err !=3D NULL) { - goto out; - } - #if !defined(CONFIG_USER_ONLY) qemu_register_reset(s390_cpu_machine_reset_cb, S390_CPU(dev)); #endif diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index e6690daf9a..a3fc034ea5 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -220,13 +220,6 @@ static void superh_cpu_realizefn(DeviceState *dev, Err= or **errp) { CPUState *cs =3D CPU(dev); SuperHCPUClass *scc =3D SUPERH_CPU_GET_CLASS(dev); - Error *local_err =3D NULL; - - cpu_exec_realizefn(cs, &local_err); - if (local_err !=3D NULL) { - error_propagate(errp, local_err); - return; - } =20 scc->parent_realize(dev, errp); cpu_reset(cs); diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 88157fcd33..f0b2187f3b 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -750,18 +750,10 @@ static ObjectClass *sparc_cpu_class_by_name(const cha= r *cpu_model) =20 static void sparc_cpu_realizefn(DeviceState *dev, Error **errp) { - CPUState *cs =3D CPU(dev); SPARCCPUClass *scc =3D SPARC_CPU_GET_CLASS(dev); - Error *local_err =3D NULL; SPARCCPU *cpu =3D SPARC_CPU(dev); CPUSPARCState *env =3D &cpu->env; =20 - cpu_exec_realizefn(cs, &local_err); - if (local_err !=3D NULL) { - error_propagate(errp, local_err); - return; - } - #if defined(CONFIG_USER_ONLY) if ((env->def.features & CPU_FEATURE_FLOAT)) { env->def.features |=3D CPU_FEATURE_FLOAT128; diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c index 0142cf556d..5319a6841e 100644 --- a/target/tricore/cpu.c +++ b/target/tricore/cpu.c @@ -95,13 +95,6 @@ static void tricore_cpu_realizefn(DeviceState *dev, Erro= r **errp) TriCoreCPU *cpu =3D TRICORE_CPU(dev); TriCoreCPUClass *tcc =3D TRICORE_CPU_GET_CLASS(dev); CPUTriCoreState *env =3D &cpu->env; - Error *local_err =3D NULL; - - cpu_exec_realizefn(cs, &local_err); - if (local_err !=3D NULL) { - error_propagate(errp, local_err); - return; - } =20 /* Some features automatically imply others */ if (tricore_has_feature(env, TRICORE_FEATURE_162)) { diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index bbfd2d42a8..c7bdd0980a 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -160,13 +160,6 @@ static void xtensa_cpu_realizefn(DeviceState *dev, Err= or **errp) { CPUState *cs =3D CPU(dev); XtensaCPUClass *xcc =3D XTENSA_CPU_GET_CLASS(dev); - Error *local_err =3D NULL; - - cpu_exec_realizefn(cs, &local_err); - if (local_err !=3D NULL) { - error_propagate(errp, local_err); - return; - } =20 cs->gdb_num_regs =3D xcc->config->gdb_regmap.num_regs; =20 --=20 2.41.0