Add VMX FRED controls used to enable save/load of FRED MSRs.

Tested-by: Shan Kang <shan.kang@intel.com>
Signed-off-by: Xin Li <xin3.li@intel.com>
---
 scripts/kvm/vmxcap | 3 +++
 target/i386/cpu.c  | 2 +-
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/scripts/kvm/vmxcap b/scripts/kvm/vmxcap
index 7da1e00ca8..44898d73c2 100755
--- a/scripts/kvm/vmxcap
+++ b/scripts/kvm/vmxcap
@@ -229,6 +229,8 @@ controls = [
     Allowed1Control(
         name = 'secondary VM-Exit controls',
         bits = {
+            0: 'Save IA32 FRED MSRs',
+            1: 'Load IA32 FRED MSRs',
             },
         cap_msr = MSR_IA32_VMX_EXIT_CTLS2,
         ),
@@ -246,6 +248,7 @@ controls = [
             16: 'Load IA32_BNDCFGS',
             17: 'Conceal VM entries from PT',
             18: 'Load IA32_RTIT_CTL',
+            23: 'Load IA32 FRED MSRs',
             },
         cap_msr = MSR_IA32_VMX_ENTRY_CTLS,
         true_cap_msr = MSR_IA32_VMX_TRUE_ENTRY_CTLS,
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 227ee1c759..dcf914a7ec 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -1285,7 +1285,7 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
             NULL, "vmx-entry-ia32e-mode", NULL, NULL,
             NULL, "vmx-entry-load-perf-global-ctrl", "vmx-entry-load-pat", "vmx-entry-load-efer",
             "vmx-entry-load-bndcfgs", NULL, "vmx-entry-load-rtit-ctl", NULL,
-            NULL, NULL, "vmx-entry-load-pkrs", NULL,
+            NULL, NULL, "vmx-entry-load-pkrs", "vmx-entry-load-fred",
             NULL, NULL, NULL, NULL,
             NULL, NULL, NULL, NULL,
         },
-- 
2.42.0

On 11/9/23 08:20, Xin Li wrote:
> Add VMX FRED controls used to enable save/load of FRED MSRs.
> 
> Tested-by: Shan Kang <shan.kang@intel.com>
> Signed-off-by: Xin Li <xin3.li@intel.com>
> ---
>   scripts/kvm/vmxcap | 3 +++
>   target/i386/cpu.c  | 2 +-
>   2 files changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/scripts/kvm/vmxcap b/scripts/kvm/vmxcap
> index 7da1e00ca8..44898d73c2 100755
> --- a/scripts/kvm/vmxcap
> +++ b/scripts/kvm/vmxcap
> @@ -229,6 +229,8 @@ controls = [
>       Allowed1Control(
>           name = 'secondary VM-Exit controls',
>           bits = {
> +            0: 'Save IA32 FRED MSRs',
> +            1: 'Load IA32 FRED MSRs',
>               },
>           cap_msr = MSR_IA32_VMX_EXIT_CTLS2,
>           ),
> @@ -246,6 +248,7 @@ controls = [
>               16: 'Load IA32_BNDCFGS',
>               17: 'Conceal VM entries from PT',
>               18: 'Load IA32_RTIT_CTL',
> +            23: 'Load IA32 FRED MSRs',
>               },
>           cap_msr = MSR_IA32_VMX_ENTRY_CTLS,
>           true_cap_msr = MSR_IA32_VMX_TRUE_ENTRY_CTLS,
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 227ee1c759..dcf914a7ec 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -1285,7 +1285,7 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
>               NULL, "vmx-entry-ia32e-mode", NULL, NULL,
>               NULL, "vmx-entry-load-perf-global-ctrl", "vmx-entry-load-pat", "vmx-entry-load-efer",
>               "vmx-entry-load-bndcfgs", NULL, "vmx-entry-load-rtit-ctl", NULL,
> -            NULL, NULL, "vmx-entry-load-pkrs", NULL,
> +            NULL, NULL, "vmx-entry-load-pkrs", "vmx-entry-load-fred",
>               NULL, NULL, NULL, NULL,
>               NULL, NULL, NULL, NULL,
>           },

The bits in the secondary vmexit controls are not supported, and in 
general the same is true for the secondary vmexit case.  I think it's 
better to not include the vmx-entry-load-fred bit either, and only do 
the vmxcap changes.

Also, in patch 1 there should be a dependency from LM to FRED.

I applied these changes and queued the series, thanks.

Paolo

> The bits in the secondary vmexit controls are not supported, and in general the same
> is true for the secondary vmexit case.  I think it's better to not include the vmx-entry-
> load-fred bit either, and only do the vmxcap changes.

Right, we don't need it at all.

> 
> Also, in patch 1 there should be a dependency from LM to FRED.

Make sense.

I really hope we can simplify the hundreds, if not thousands, of x86 CPU
features with just a few CPU feature baselines.

> 
> I applied these changes and queued the series, thanks.

A great news to me!

Thanks a lot!
    Xin