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Thu, 28 Mar 2024 17:48:19 -0700 (PDT) From: "Ho-Ren (Jack) Chuang" To: "Huang, Ying" , "Gregory Price" , aneesh.kumar@linux.ibm.com, mhocko@suse.com, tj@kernel.org, john@jagalactic.com, "Eishan Mirakhur" , "Vinicius Tavares Petrucci" , "Ravis OpenSrc" , "Alistair Popple" , "Srinivasulu Thanneeru" , Dan Williams , Vishal Verma , Dave Jiang , Andrew Morton , nvdimm@lists.linux.dev, linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org Cc: "Ho-Ren (Jack) Chuang" , "Ho-Ren (Jack) Chuang" , "Ho-Ren (Jack) Chuang" , qemu-devel@nongnu.org Subject: [PATCH v8 1/2] memory tier: dax/kmem: introduce an abstract layer for finding, allocating, and putting memory types Date: Fri, 29 Mar 2024 00:48:13 +0000 Message-Id: <20240329004815.195476-2-horenchuang@bytedance.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20240329004815.195476-1-horenchuang@bytedance.com> References: <20240329004815.195476-1-horenchuang@bytedance.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::b2f; envelope-from=horenchuang@bytedance.com; helo=mail-yb1-xb2f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer2=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @bytedance.com) X-ZM-MESSAGEID: 1711673363690100001 Content-Type: text/plain; charset="utf-8" Since different memory devices require finding, allocating, and putting memory types, these common steps are abstracted in this patch, enhancing the scalability and conciseness of the code. Signed-off-by: Ho-Ren (Jack) Chuang Reviewed-by: "Huang, Ying" --- drivers/dax/kmem.c | 20 ++------------------ include/linux/memory-tiers.h | 13 +++++++++++++ mm/memory-tiers.c | 32 ++++++++++++++++++++++++++++++++ 3 files changed, 47 insertions(+), 18 deletions(-) diff --git a/drivers/dax/kmem.c b/drivers/dax/kmem.c index 42ee360cf4e3..01399e5b53b2 100644 --- a/drivers/dax/kmem.c +++ b/drivers/dax/kmem.c @@ -55,21 +55,10 @@ static LIST_HEAD(kmem_memory_types); =20 static struct memory_dev_type *kmem_find_alloc_memory_type(int adist) { - bool found =3D false; struct memory_dev_type *mtype; =20 mutex_lock(&kmem_memory_type_lock); - list_for_each_entry(mtype, &kmem_memory_types, list) { - if (mtype->adistance =3D=3D adist) { - found =3D true; - break; - } - } - if (!found) { - mtype =3D alloc_memory_type(adist); - if (!IS_ERR(mtype)) - list_add(&mtype->list, &kmem_memory_types); - } + mtype =3D mt_find_alloc_memory_type(adist, &kmem_memory_types); mutex_unlock(&kmem_memory_type_lock); =20 return mtype; @@ -77,13 +66,8 @@ static struct memory_dev_type *kmem_find_alloc_memory_ty= pe(int adist) =20 static void kmem_put_memory_types(void) { - struct memory_dev_type *mtype, *mtn; - mutex_lock(&kmem_memory_type_lock); - list_for_each_entry_safe(mtype, mtn, &kmem_memory_types, list) { - list_del(&mtype->list); - put_memory_type(mtype); - } + mt_put_memory_types(&kmem_memory_types); mutex_unlock(&kmem_memory_type_lock); } =20 diff --git a/include/linux/memory-tiers.h b/include/linux/memory-tiers.h index 69e781900082..a44c03c2ba3a 100644 --- a/include/linux/memory-tiers.h +++ b/include/linux/memory-tiers.h @@ -48,6 +48,9 @@ int mt_calc_adistance(int node, int *adist); int mt_set_default_dram_perf(int nid, struct access_coordinate *perf, const char *source); int mt_perf_to_adistance(struct access_coordinate *perf, int *adist); +struct memory_dev_type *mt_find_alloc_memory_type(int adist, + struct list_head *memory_types); +void mt_put_memory_types(struct list_head *memory_types); #ifdef CONFIG_MIGRATION int next_demotion_node(int node); void node_get_allowed_targets(pg_data_t *pgdat, nodemask_t *targets); @@ -136,5 +139,15 @@ static inline int mt_perf_to_adistance(struct access_c= oordinate *perf, int *adis { return -EIO; } + +struct memory_dev_type *mt_find_alloc_memory_type(int adist, struct list_h= ead *memory_types) +{ + return NULL; +} + +void mt_put_memory_types(struct list_head *memory_types) +{ + +} #endif /* CONFIG_NUMA */ #endif /* _LINUX_MEMORY_TIERS_H */ diff --git a/mm/memory-tiers.c b/mm/memory-tiers.c index 0537664620e5..974af10cfdd8 100644 --- a/mm/memory-tiers.c +++ b/mm/memory-tiers.c @@ -623,6 +623,38 @@ void clear_node_memory_type(int node, struct memory_de= v_type *memtype) } EXPORT_SYMBOL_GPL(clear_node_memory_type); =20 +struct memory_dev_type *mt_find_alloc_memory_type(int adist, struct list_h= ead *memory_types) +{ + bool found =3D false; + struct memory_dev_type *mtype; + + list_for_each_entry(mtype, memory_types, list) { + if (mtype->adistance =3D=3D adist) { + found =3D true; + break; + } + } + if (!found) { + mtype =3D alloc_memory_type(adist); + if (!IS_ERR(mtype)) + list_add(&mtype->list, memory_types); + } + + return mtype; +} +EXPORT_SYMBOL_GPL(mt_find_alloc_memory_type); + +void mt_put_memory_types(struct list_head *memory_types) +{ + struct memory_dev_type *mtype, *mtn; + + list_for_each_entry_safe(mtype, mtn, memory_types, list) { + list_del(&mtype->list); + put_memory_type(mtype); + } +} +EXPORT_SYMBOL_GPL(mt_put_memory_types); + static void dump_hmem_attrs(struct access_coordinate *coord, const char *p= refix) { pr_info( --=20 Ho-Ren (Jack) Chuang From nobody Sun May 19 03:14:29 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=bytedance.com ARC-Seal: i=1; a=rsa-sha256; t=1711673348; cv=none; d=zohomail.com; s=zohoarc; b=Yqqk7jNQpn7d887jo/q4wG06TD3NRGJx0vMzi9CtiX1D7/zsUf1E8jRaizAeTFRB9kyHa1yFqa0Fg2+V47HcUvRt9JV5VMhob64Hd7tyU+hRXk9lKLG4aM1XaoL1BaP7OG2nXx7F+LBx0Rc7tpBXVl029y3ouF6OhY/Z6kfK2v0= ARC-Message-Signature: i=1; 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AJvYcCXfUAvlLPCmsTmmK+GCl1d2vpFrgcSN99vdCzvY+ni1dtaIeQntKnMGZvvbJYavoK/4eYmCI6TMGDH2bUn9mslo/H6RkQc= X-Gm-Message-State: AOJu0Yw7GQslDQUKx6UrTEvqIDq/EzyDEA/AokoHRjNfYdfQq3HsTPsU 9u71q00kgW6AiXnco0ZUQSCrmJvVGrwwpvz4dGfNQASoMkKEn1UjpTGVo1Rh1kM= X-Google-Smtp-Source: AGHT+IGRQkIbG4fv+uoIg3/nxd1eFfIFzArVzfxtSMxfeYkTUQ5hMztZBEvA8x2mPlQTJlfj6KU89Q== X-Received: by 2002:a05:622a:1492:b0:432:b84b:ac1 with SMTP id t18-20020a05622a149200b00432b84b0ac1mr1357113qtx.19.1711673301149; Thu, 28 Mar 2024 17:48:21 -0700 (PDT) From: "Ho-Ren (Jack) Chuang" To: "Huang, Ying" , "Gregory Price" , aneesh.kumar@linux.ibm.com, mhocko@suse.com, tj@kernel.org, john@jagalactic.com, "Eishan Mirakhur" , "Vinicius Tavares Petrucci" , "Ravis OpenSrc" , "Alistair Popple" , "Srinivasulu Thanneeru" , Dan Williams , Vishal Verma , Dave Jiang , Andrew Morton , nvdimm@lists.linux.dev, linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org Cc: "Ho-Ren (Jack) Chuang" , "Ho-Ren (Jack) Chuang" , "Ho-Ren (Jack) Chuang" , qemu-devel@nongnu.org, Hao Xiang Subject: [PATCH v8 2/2] memory tier: create CPUless memory tiers after obtaining HMAT info Date: Fri, 29 Mar 2024 00:48:14 +0000 Message-Id: <20240329004815.195476-3-horenchuang@bytedance.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20240329004815.195476-1-horenchuang@bytedance.com> References: <20240329004815.195476-1-horenchuang@bytedance.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::82c; envelope-from=horenchuang@bytedance.com; helo=mail-qt1-x82c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer2=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @bytedance.com) X-ZM-MESSAGEID: 1711673349661100003 Content-Type: text/plain; charset="utf-8" The current implementation treats emulated memory devices, such as CXL1.1 type3 memory, as normal DRAM when they are emulated as normal memory (E820_TYPE_RAM). However, these emulated devices have different characteristics than traditional DRAM, making it important to distinguish them. Thus, we modify the tiered memory initialization process to introduce a delay specifically for CPUless NUMA nodes. This delay ensures that the memory tier initialization for these nodes is deferred until HMAT information is obtained during the boot process. Finally, demotion tables are recalculated at the end. * late_initcall(memory_tier_late_init); Some device drivers may have initialized memory tiers between `memory_tier_init()` and `memory_tier_late_init()`, potentially bringing online memory nodes and configuring memory tiers. They should be excluded in the late init. * Handle cases where there is no HMAT when creating memory tiers There is a scenario where a CPUless node does not provide HMAT information. If no HMAT is specified, it falls back to using the default DRAM tier. * Introduce another new lock `default_dram_perf_lock` for adist calculation In the current implementation, iterating through CPUlist nodes requires holding the `memory_tier_lock`. However, `mt_calc_adistance()` will end up trying to acquire the same lock, leading to a potential deadlock. Therefore, we propose introducing a standalone `default_dram_perf_lock` to protect `default_dram_perf_*`. This approach not only avoids deadlock but also prevents holding a large lock simultaneously. * Upgrade `set_node_memory_tier` to support additional cases, including default DRAM, late CPUless, and hot-plugged initializations. To cover hot-plugged memory nodes, `mt_calc_adistance()` and `mt_find_alloc_memory_type()` are moved into `set_node_memory_tier()` to handle cases where memtype is not initialized and where HMAT information is available. * Introduce `default_memory_types` for those memory types that are not initialized by device drivers. Because late initialized memory and default DRAM memory need to be managed, a default memory type is created for storing all memory types that are not initialized by device drivers and as a fallback. Signed-off-by: Ho-Ren (Jack) Chuang Signed-off-by: Hao Xiang Reviewed-by: "Huang, Ying" --- mm/memory-tiers.c | 94 +++++++++++++++++++++++++++++++++++++++-------- 1 file changed, 78 insertions(+), 16 deletions(-) diff --git a/mm/memory-tiers.c b/mm/memory-tiers.c index 974af10cfdd8..e24fc3bebae4 100644 --- a/mm/memory-tiers.c +++ b/mm/memory-tiers.c @@ -36,6 +36,11 @@ struct node_memory_type_map { =20 static DEFINE_MUTEX(memory_tier_lock); static LIST_HEAD(memory_tiers); +/* + * The list is used to store all memory types that are not created + * by a device driver. + */ +static LIST_HEAD(default_memory_types); static struct node_memory_type_map node_memory_types[MAX_NUMNODES]; struct memory_dev_type *default_dram_type; =20 @@ -108,6 +113,8 @@ static struct demotion_nodes *node_demotion __read_most= ly; =20 static BLOCKING_NOTIFIER_HEAD(mt_adistance_algorithms); =20 +/* The lock is used to protect `default_dram_perf*` info and nid. */ +static DEFINE_MUTEX(default_dram_perf_lock); static bool default_dram_perf_error; static struct access_coordinate default_dram_perf; static int default_dram_perf_ref_nid =3D NUMA_NO_NODE; @@ -505,7 +512,8 @@ static inline void __init_node_memory_type(int node, st= ruct memory_dev_type *mem static struct memory_tier *set_node_memory_tier(int node) { struct memory_tier *memtier; - struct memory_dev_type *memtype; + struct memory_dev_type *mtype =3D default_dram_type; + int adist =3D MEMTIER_ADISTANCE_DRAM; pg_data_t *pgdat =3D NODE_DATA(node); =20 =20 @@ -514,11 +522,20 @@ static struct memory_tier *set_node_memory_tier(int n= ode) if (!node_state(node, N_MEMORY)) return ERR_PTR(-EINVAL); =20 - __init_node_memory_type(node, default_dram_type); + mt_calc_adistance(node, &adist); + if (node_memory_types[node].memtype =3D=3D NULL) { + mtype =3D mt_find_alloc_memory_type(adist, &default_memory_types); + if (IS_ERR(mtype)) { + mtype =3D default_dram_type; + pr_info("Failed to allocate a memory type. Fall back.\n"); + } + } + + __init_node_memory_type(node, mtype); =20 - memtype =3D node_memory_types[node].memtype; - node_set(node, memtype->nodes); - memtier =3D find_create_memory_tier(memtype); + mtype =3D node_memory_types[node].memtype; + node_set(node, mtype->nodes); + memtier =3D find_create_memory_tier(mtype); if (!IS_ERR(memtier)) rcu_assign_pointer(pgdat->memtier, memtier); return memtier; @@ -655,6 +672,34 @@ void mt_put_memory_types(struct list_head *memory_type= s) } EXPORT_SYMBOL_GPL(mt_put_memory_types); =20 +/* + * This is invoked via `late_initcall()` to initialize memory tiers for + * CPU-less memory nodes after driver initialization, which is + * expected to provide `adistance` algorithms. + */ +static int __init memory_tier_late_init(void) +{ + int nid; + + mutex_lock(&memory_tier_lock); + for_each_node_state(nid, N_MEMORY) + if (!node_state(nid, N_CPU) && + node_memory_types[nid].memtype =3D=3D NULL) + /* + * Some device drivers may have initialized memory tiers + * between `memory_tier_init()` and `memory_tier_late_init()`, + * potentially bringing online memory nodes and + * configuring memory tiers. Exclude them here. + */ + set_node_memory_tier(nid); + + establish_demotion_targets(); + mutex_unlock(&memory_tier_lock); + + return 0; +} +late_initcall(memory_tier_late_init); + static void dump_hmem_attrs(struct access_coordinate *coord, const char *p= refix) { pr_info( @@ -668,7 +713,7 @@ int mt_set_default_dram_perf(int nid, struct access_coo= rdinate *perf, { int rc =3D 0; =20 - mutex_lock(&memory_tier_lock); + mutex_lock(&default_dram_perf_lock); if (default_dram_perf_error) { rc =3D -EIO; goto out; @@ -716,23 +761,30 @@ int mt_set_default_dram_perf(int nid, struct access_c= oordinate *perf, } =20 out: - mutex_unlock(&memory_tier_lock); + mutex_unlock(&default_dram_perf_lock); return rc; } =20 int mt_perf_to_adistance(struct access_coordinate *perf, int *adist) { - if (default_dram_perf_error) - return -EIO; + int rc =3D 0; =20 - if (default_dram_perf_ref_nid =3D=3D NUMA_NO_NODE) - return -ENOENT; + mutex_lock(&default_dram_perf_lock); + if (default_dram_perf_error) { + rc =3D -EIO; + goto out; + } =20 if (perf->read_latency + perf->write_latency =3D=3D 0 || - perf->read_bandwidth + perf->write_bandwidth =3D=3D 0) - return -EINVAL; + perf->read_bandwidth + perf->write_bandwidth =3D=3D 0) { + rc =3D -EINVAL; + goto out; + } =20 - mutex_lock(&memory_tier_lock); + if (default_dram_perf_ref_nid =3D=3D NUMA_NO_NODE) { + rc =3D -ENOENT; + goto out; + } /* * The abstract distance of a memory node is in direct proportion to * its memory latency (read + write) and inversely proportional to its @@ -745,8 +797,9 @@ int mt_perf_to_adistance(struct access_coordinate *perf= , int *adist) (default_dram_perf.read_latency + default_dram_perf.write_latency) * (default_dram_perf.read_bandwidth + default_dram_perf.write_bandwidth) / (perf->read_bandwidth + perf->write_bandwidth); - mutex_unlock(&memory_tier_lock); =20 +out: + mutex_unlock(&default_dram_perf_lock); return 0; } EXPORT_SYMBOL_GPL(mt_perf_to_adistance); @@ -858,7 +911,8 @@ static int __init memory_tier_init(void) * For now we can have 4 faster memory tiers with smaller adistance * than default DRAM tier. */ - default_dram_type =3D alloc_memory_type(MEMTIER_ADISTANCE_DRAM); + default_dram_type =3D mt_find_alloc_memory_type(MEMTIER_ADISTANCE_DRAM, + &default_memory_types); if (IS_ERR(default_dram_type)) panic("%s() failed to allocate default DRAM tier\n", __func__); =20 @@ -868,6 +922,14 @@ static int __init memory_tier_init(void) * types assigned. */ for_each_node_state(node, N_MEMORY) { + if (!node_state(node, N_CPU)) + /* + * Defer memory tier initialization on CPUless numa nodes. + * These will be initialized after firmware and devices are + * initialized. + */ + continue; + memtier =3D set_node_memory_tier(node); if (IS_ERR(memtier)) /* --=20 Ho-Ren (Jack) Chuang