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a=rsa-sha256; c=relaxed/relaxed; d=amazon.co.uk; i=@amazon.co.uk; q=dns/txt; s=amazon201209; t=1712232291; x=1743768291; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=sVywjRiZ1vFgVRZg9B7Oj01vGsLIDcLjACuW81lksaM=; b=KvT5ARbZ53uim7LDO/AOWyUw0i2AxWS3M1fihmK6wkfzv4xo42kwMQvq KOPfZeTWTWchhiiPtdCzfXxiXE5lHEpDgh536+7sv/zspOCIatMGQYzkS 5iTgmVrLlubhdkpphCtaBZc/K0m4gpzgeA8aEk85Dimg9lHF9/C0cukxV A=; X-IronPort-AV: E=Sophos;i="6.07,179,1708387200"; d="scan'208";a="716688577" X-Farcaster-Flow-ID: 6b2bd791-1243-44c6-ad62-633fa15ad325 From: John Berg To: CC: , , , , John Berg , John Berg Subject: [PATCH] hw/nvme: Add support for setting the MQES for the NVMe emulation Date: Thu, 4 Apr 2024 13:04:18 +0100 Message-ID: <20240404120418.1611513-1-jhnberg@amazon.co.uk> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" From: John Berg The MQES field in the CAP register describes the Maximum Queue Entries Supported for the IO queues of an NVMe controller. Adding a +1 to the value in this field results in the total queue size. A full queue is when a queue of size N contains N - 1 entries, and the minimum queue size is 2. Thus the lowest MQES value is 1. This patch adds the new mqes property to the NVMe emulation which allows a user to specify the maximum queue size by setting this property. This is useful as it enables testing of NVMe controller where the MQES is relatively small. The smallest NVMe queue size supported in NVMe is 2 submission and completion entries, which means that the smallest legal mqes value is 1. The following example shows how the mqes can be set for a the NVMe emulation: -drive id=3Dnvme0,if=3Dnone,file=3Dnvme.img,format=3Draw -device nvme,drive=3Dnvme0,serial=3Dfoo,mqes=3D1 If the mqes property is not provided then the default mqes will still be 0x7ff (the queue size is 2048 entries). Signed-off-by: John Berg Reviewed-by: Keith Busch Reviewed-by: Klaus Jensen --- hw/nvme/ctrl.c | 9 ++++++++- hw/nvme/nvme.h | 1 + 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c index 127c3d2383..86cda9bc73 100644 --- a/hw/nvme/ctrl.c +++ b/hw/nvme/ctrl.c @@ -7805,6 +7805,12 @@ static bool nvme_check_params(NvmeCtrl *n, Error **e= rrp) return false; } =20 + if (params->mqes < 1) + { + error_setg(errp, "mqes property cannot be less than 1"); + return false; + } + if (n->pmr.dev) { if (params->msix_exclusive_bar) { error_setg(errp, "not enough BARs available to enable PMR"); @@ -8281,7 +8287,7 @@ static void nvme_init_ctrl(NvmeCtrl *n, PCIDevice *pc= i_dev) =20 id->ctratt =3D cpu_to_le32(ctratt); =20 - NVME_CAP_SET_MQES(cap, 0x7ff); + NVME_CAP_SET_MQES(cap, n->params.mqes); NVME_CAP_SET_CQR(cap, 1); NVME_CAP_SET_TO(cap, 0xf); NVME_CAP_SET_CSS(cap, NVME_CAP_CSS_NVM); @@ -8451,6 +8457,7 @@ static Property nvme_props[] =3D { params.sriov_max_vq_per_vf, 0), DEFINE_PROP_BOOL("msix-exclusive-bar", NvmeCtrl, params.msix_exclusive= _bar, false), + DEFINE_PROP_UINT16("mqes", NvmeCtrl, params.mqes, 0x7ff), DEFINE_PROP_END_OF_LIST(), }; =20 diff --git a/hw/nvme/nvme.h b/hw/nvme/nvme.h index bed8191bd5..2e7d31c0ae 100644 --- a/hw/nvme/nvme.h +++ b/hw/nvme/nvme.h @@ -521,6 +521,7 @@ typedef struct NvmeParams { uint32_t num_queues; /* deprecated since 5.1 */ uint32_t max_ioqpairs; uint16_t msix_qsize; + uint16_t mqes; uint32_t cmb_size_mb; uint8_t aerl; uint32_t aer_max_queued; --=20 2.34.1