From nobody Mon Sep 16 20:19:15 2024 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1712735049200168.39468869126426; Wed, 10 Apr 2024 00:44:09 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ruSOr-00085M-Dv; Wed, 10 Apr 2024 03:29:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ruSOZ-0007ef-A7; Wed, 10 Apr 2024 03:29:25 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ruSOV-00052F-5X; Wed, 10 Apr 2024 03:29:23 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id 5CA545D6B2; Wed, 10 Apr 2024 10:25:07 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id F24BBB02F2; Wed, 10 Apr 2024 10:23:08 +0300 (MSK) Received: (nullmailer pid 4191848 invoked by uid 1000); Wed, 10 Apr 2024 07:23:04 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: qemu-stable@nongnu.org, Daniel Henrique Barboza , Richard Henderson , Alistair Francis , Michael Tokarev Subject: [Stable-8.2.3 66/87] target/riscv/vector_helpers: do early exit when vstart >= vl Date: Wed, 10 Apr 2024 10:22:39 +0300 Message-Id: <20240410072303.4191455-66-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer2=patchew.org@nongnu.org X-ZM-MESSAGEID: 1712735050973100003 Content-Type: text/plain; charset="utf-8" From: Daniel Henrique Barboza We're going to make changes that will required each helper to be responsible for the 'vstart' management, i.e. we will relieve the 'vstart < vl' assumption that helpers have today. Helpers are usually able to deal with vstart >=3D vl, i.e. doing nothing aside from setting vstart =3D 0 at the end, but the tail update functions will update the tail regardless of vstart being valid or not. Unifying the tail update process in a single function that would handle the vstart >=3D vl case isn't trivial (see [1] for more info). This patch takes a blunt approach: do an early exit in every single vector helper if vstart >=3D vl, unless the helper is guarded with vstart_eq_zero in the translation. For those cases the helper is ready to deal with cases where vl might be zero, i.e. throwing exceptions based on it like vcpop_m() and first_m(). Helpers that weren't changed: - vcpop_m(), vfirst_m(), vmsetm(), GEN_VEXT_VIOTA_M(): these are guarded directly with vstart_eq_zero; - GEN_VEXT_VCOMPRESS_VM(): guarded with vcompress_vm_check() that checks vstart_eq_zero; - GEN_VEXT_RED(): guarded with either reduction_check() or reduction_widen_check(), both check vstart_eq_zero; - GEN_VEXT_FRED(): guarded with either freduction_check() or freduction_widen_check(), both check vstart_eq_zero. Another exception is vext_ldst_whole(), who operates on effective vector length regardless of the current settings in vtype and vl. [1] https://lore.kernel.org/qemu-riscv/1590234b-0291-432a-a0fa-c5a6876097bc= @linux.alibaba.com/ Signed-off-by: Daniel Henrique Barboza Reviewed-by: Richard Henderson Signed-off-by: Daniel Henrique Barboza Acked-by: Alistair Francis Message-ID: <20240314175704.478276-7-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis (cherry picked from commit df4252b2ecaf93b601109373a17427d1867046e8) Signed-off-by: Michael Tokarev diff --git a/target/riscv/vcrypto_helper.c b/target/riscv/vcrypto_helper.c index e2d719b13b..f7423df226 100644 --- a/target/riscv/vcrypto_helper.c +++ b/target/riscv/vcrypto_helper.c @@ -222,6 +222,8 @@ static inline void xor_round_key(AESState *round_state,= AESState *round_key) uint32_t total_elems =3D vext_get_total_elems(env, desc, 4); = \ uint32_t vta =3D vext_vta(desc); = \ \ + VSTART_CHECK_EARLY_EXIT(env); \ + \ for (uint32_t i =3D env->vstart / 4; i < env->vl / 4; i++) { = \ AESState round_key; \ round_key.d[0] =3D *((uint64_t *)vs2 + H8(i * 2 + 0)); = \ @@ -246,6 +248,8 @@ static inline void xor_round_key(AESState *round_state,= AESState *round_key) uint32_t total_elems =3D vext_get_total_elems(env, desc, 4); = \ uint32_t vta =3D vext_vta(desc); = \ \ + VSTART_CHECK_EARLY_EXIT(env); \ + \ for (uint32_t i =3D env->vstart / 4; i < env->vl / 4; i++) { = \ AESState round_key; \ round_key.d[0] =3D *((uint64_t *)vs2 + H8(0)); = \ @@ -305,6 +309,8 @@ void HELPER(vaeskf1_vi)(void *vd_vptr, void *vs2_vptr, = uint32_t uimm, uint32_t total_elems =3D vext_get_total_elems(env, desc, 4); uint32_t vta =3D vext_vta(desc); =20 + VSTART_CHECK_EARLY_EXIT(env); + uimm &=3D 0b1111; if (uimm > 10 || uimm =3D=3D 0) { uimm ^=3D 0b1000; @@ -351,6 +357,8 @@ void HELPER(vaeskf2_vi)(void *vd_vptr, void *vs2_vptr, = uint32_t uimm, uint32_t total_elems =3D vext_get_total_elems(env, desc, 4); uint32_t vta =3D vext_vta(desc); =20 + VSTART_CHECK_EARLY_EXIT(env); + uimm &=3D 0b1111; if (uimm > 14 || uimm < 2) { uimm ^=3D 0b1000; @@ -457,6 +465,8 @@ void HELPER(vsha2ms_vv)(void *vd, void *vs1, void *vs2,= CPURISCVState *env, uint32_t total_elems; uint32_t vta =3D vext_vta(desc); =20 + VSTART_CHECK_EARLY_EXIT(env); + for (uint32_t i =3D env->vstart / 4; i < env->vl / 4; i++) { if (sew =3D=3D MO_32) { vsha2ms_e32(((uint32_t *)vd) + i * 4, ((uint32_t *)vs1) + i * = 4, @@ -572,6 +582,8 @@ void HELPER(vsha2ch32_vv)(void *vd, void *vs1, void *vs= 2, CPURISCVState *env, uint32_t total_elems; uint32_t vta =3D vext_vta(desc); =20 + VSTART_CHECK_EARLY_EXIT(env); + for (uint32_t i =3D env->vstart / 4; i < env->vl / 4; i++) { vsha2c_32(((uint32_t *)vs2) + 4 * i, ((uint32_t *)vd) + 4 * i, ((uint32_t *)vs1) + 4 * i + 2); @@ -590,6 +602,8 @@ void HELPER(vsha2ch64_vv)(void *vd, void *vs1, void *vs= 2, CPURISCVState *env, uint32_t total_elems; uint32_t vta =3D vext_vta(desc); =20 + VSTART_CHECK_EARLY_EXIT(env); + for (uint32_t i =3D env->vstart / 4; i < env->vl / 4; i++) { vsha2c_64(((uint64_t *)vs2) + 4 * i, ((uint64_t *)vd) + 4 * i, ((uint64_t *)vs1) + 4 * i + 2); @@ -608,6 +622,8 @@ void HELPER(vsha2cl32_vv)(void *vd, void *vs1, void *vs= 2, CPURISCVState *env, uint32_t total_elems; uint32_t vta =3D vext_vta(desc); =20 + VSTART_CHECK_EARLY_EXIT(env); + for (uint32_t i =3D env->vstart / 4; i < env->vl / 4; i++) { vsha2c_32(((uint32_t *)vs2) + 4 * i, ((uint32_t *)vd) + 4 * i, (((uint32_t *)vs1) + 4 * i)); @@ -626,6 +642,8 @@ void HELPER(vsha2cl64_vv)(void *vd, void *vs1, void *vs= 2, CPURISCVState *env, uint32_t total_elems; uint32_t vta =3D vext_vta(desc); =20 + VSTART_CHECK_EARLY_EXIT(env); + for (uint32_t i =3D env->vstart / 4; i < env->vl / 4; i++) { vsha2c_64(((uint64_t *)vs2) + 4 * i, ((uint64_t *)vd) + 4 * i, (((uint64_t *)vs1) + 4 * i)); @@ -658,6 +676,8 @@ void HELPER(vsm3me_vv)(void *vd_vptr, void *vs1_vptr, v= oid *vs2_vptr, uint32_t *vs1 =3D vs1_vptr; uint32_t *vs2 =3D vs2_vptr; =20 + VSTART_CHECK_EARLY_EXIT(env); + for (int i =3D env->vstart / 8; i < env->vl / 8; i++) { uint32_t w[24]; for (int j =3D 0; j < 8; j++) { @@ -757,6 +777,8 @@ void HELPER(vsm3c_vi)(void *vd_vptr, void *vs2_vptr, ui= nt32_t uimm, uint32_t *vs2 =3D vs2_vptr; uint32_t v1[8], v2[8], v3[8]; =20 + VSTART_CHECK_EARLY_EXIT(env); + for (int i =3D env->vstart / 8; i < env->vl / 8; i++) { for (int k =3D 0; k < 8; k++) { v2[k] =3D bswap32(vd[H4(i * 8 + k)]); @@ -780,6 +802,8 @@ void HELPER(vghsh_vv)(void *vd_vptr, void *vs1_vptr, vo= id *vs2_vptr, uint32_t vta =3D vext_vta(desc); uint32_t total_elems =3D vext_get_total_elems(env, desc, 4); =20 + VSTART_CHECK_EARLY_EXIT(env); + for (uint32_t i =3D env->vstart / 4; i < env->vl / 4; i++) { uint64_t Y[2] =3D {vd[i * 2 + 0], vd[i * 2 + 1]}; uint64_t H[2] =3D {brev8(vs2[i * 2 + 0]), brev8(vs2[i * 2 + 1])}; @@ -817,6 +841,8 @@ void HELPER(vgmul_vv)(void *vd_vptr, void *vs2_vptr, CP= URISCVState *env, uint32_t vta =3D vext_vta(desc); uint32_t total_elems =3D vext_get_total_elems(env, desc, 4); =20 + VSTART_CHECK_EARLY_EXIT(env); + for (uint32_t i =3D env->vstart / 4; i < env->vl / 4; i++) { uint64_t Y[2] =3D {brev8(vd[i * 2 + 0]), brev8(vd[i * 2 + 1])}; uint64_t H[2] =3D {brev8(vs2[i * 2 + 0]), brev8(vs2[i * 2 + 1])}; @@ -853,6 +879,8 @@ void HELPER(vsm4k_vi)(void *vd, void *vs2, uint32_t uim= m5, CPURISCVState *env, uint32_t esz =3D sizeof(uint32_t); uint32_t total_elems =3D vext_get_total_elems(env, desc, esz); =20 + VSTART_CHECK_EARLY_EXIT(env); + for (uint32_t i =3D group_start; i < group_end; ++i) { uint32_t vstart =3D i * egs; uint32_t vend =3D (i + 1) * egs; @@ -909,6 +937,8 @@ void HELPER(vsm4r_vv)(void *vd, void *vs2, CPURISCVStat= e *env, uint32_t desc) uint32_t esz =3D sizeof(uint32_t); uint32_t total_elems =3D vext_get_total_elems(env, desc, esz); =20 + VSTART_CHECK_EARLY_EXIT(env); + for (uint32_t i =3D group_start; i < group_end; ++i) { uint32_t vstart =3D i * egs; uint32_t vend =3D (i + 1) * egs; @@ -943,6 +973,8 @@ void HELPER(vsm4r_vs)(void *vd, void *vs2, CPURISCVStat= e *env, uint32_t desc) uint32_t esz =3D sizeof(uint32_t); uint32_t total_elems =3D vext_get_total_elems(env, desc, esz); =20 + VSTART_CHECK_EARLY_EXIT(env); + for (uint32_t i =3D group_start; i < group_end; ++i) { uint32_t vstart =3D i * egs; uint32_t vend =3D (i + 1) * egs; diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index 3c146afc88..4494313abe 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -196,6 +196,8 @@ vext_ldst_stride(void *vd, void *v0, target_ulong base, uint32_t esz =3D 1 << log2_esz; uint32_t vma =3D vext_vma(desc); =20 + VSTART_CHECK_EARLY_EXIT(env); + for (i =3D env->vstart; i < env->vl; i++, env->vstart++) { k =3D 0; while (k < nf) { @@ -261,6 +263,8 @@ vext_ldst_us(void *vd, target_ulong base, CPURISCVState= *env, uint32_t desc, uint32_t max_elems =3D vext_max_elems(desc, log2_esz); uint32_t esz =3D 1 << log2_esz; =20 + VSTART_CHECK_EARLY_EXIT(env); + /* load bytes from guest memory */ for (i =3D env->vstart; i < evl; i++, env->vstart++) { k =3D 0; @@ -375,6 +379,8 @@ vext_ldst_index(void *vd, void *v0, target_ulong base, uint32_t esz =3D 1 << log2_esz; uint32_t vma =3D vext_vma(desc); =20 + VSTART_CHECK_EARLY_EXIT(env); + /* load bytes from guest memory */ for (i =3D env->vstart; i < env->vl; i++, env->vstart++) { k =3D 0; @@ -465,6 +471,8 @@ vext_ldff(void *vd, void *v0, target_ulong base, uint32_t vma =3D vext_vma(desc); target_ulong addr, offset, remain; =20 + VSTART_CHECK_EARLY_EXIT(env); + /* probe every access */ for (i =3D env->vstart; i < env->vl; i++) { if (!vm && !vext_elem_mask(v0, i)) { @@ -866,6 +874,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void *= vs2, \ uint32_t vta =3D vext_vta(desc); \ uint32_t i; \ \ + VSTART_CHECK_EARLY_EXIT(env); \ + \ for (i =3D env->vstart; i < vl; i++) { \ ETYPE s1 =3D *((ETYPE *)vs1 + H(i)); \ ETYPE s2 =3D *((ETYPE *)vs2 + H(i)); \ @@ -898,6 +908,8 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1, = void *vs2, \ uint32_t vta =3D vext_vta(desc); = \ uint32_t i; \ \ + VSTART_CHECK_EARLY_EXIT(env); \ + \ for (i =3D env->vstart; i < vl; i++) { = \ ETYPE s2 =3D *((ETYPE *)vs2 + H(i)); = \ ETYPE carry =3D vext_elem_mask(v0, i); = \ @@ -933,6 +945,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void *= vs2, \ uint32_t vta_all_1s =3D vext_vta_all_1s(desc); \ uint32_t i; \ \ + VSTART_CHECK_EARLY_EXIT(env); \ + \ for (i =3D env->vstart; i < vl; i++) { \ ETYPE s1 =3D *((ETYPE *)vs1 + H(i)); \ ETYPE s2 =3D *((ETYPE *)vs2 + H(i)); \ @@ -971,6 +985,8 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1, = \ uint32_t vta_all_1s =3D vext_vta_all_1s(desc); \ uint32_t i; \ \ + VSTART_CHECK_EARLY_EXIT(env); \ + \ for (i =3D env->vstart; i < vl; i++) { \ ETYPE s2 =3D *((ETYPE *)vs2 + H(i)); \ ETYPE carry =3D !vm && vext_elem_mask(v0, i); \ @@ -1067,6 +1083,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, = \ uint32_t vma =3D vext_vma(desc); = \ uint32_t i; \ \ + VSTART_CHECK_EARLY_EXIT(env); \ + \ for (i =3D env->vstart; i < vl; i++) { = \ if (!vm && !vext_elem_mask(v0, i)) { \ /* set masked-off elements to 1s */ \ @@ -1114,6 +1132,8 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1= , \ uint32_t vma =3D vext_vma(desc); \ uint32_t i; \ \ + VSTART_CHECK_EARLY_EXIT(env); \ + \ for (i =3D env->vstart; i < vl; i++) { \ if (!vm && !vext_elem_mask(v0, i)) { \ /* set masked-off elements to 1s */ \ @@ -1176,6 +1196,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void= *vs2, \ uint32_t vma =3D vext_vma(desc); \ uint32_t i; \ \ + VSTART_CHECK_EARLY_EXIT(env); \ + \ for (i =3D env->vstart; i < vl; i++) { \ ETYPE s1 =3D *((ETYPE *)vs1 + H(i)); \ ETYPE s2 =3D *((ETYPE *)vs2 + H(i)); \ @@ -1241,6 +1263,8 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1= , void *vs2, \ uint32_t vma =3D vext_vma(desc); \ uint32_t i; \ \ + VSTART_CHECK_EARLY_EXIT(env); \ + \ for (i =3D env->vstart; i < vl; i++) { \ ETYPE s2 =3D *((ETYPE *)vs2 + H(i)); \ if (!vm && !vext_elem_mask(v0, i)) { \ @@ -1788,6 +1812,8 @@ void HELPER(NAME)(void *vd, void *vs1, CPURISCVState = *env, \ uint32_t vta =3D vext_vta(desc); \ uint32_t i; \ \ + VSTART_CHECK_EARLY_EXIT(env); \ + \ for (i =3D env->vstart; i < vl; i++) { \ ETYPE s1 =3D *((ETYPE *)vs1 + H(i)); \ *((ETYPE *)vd + H(i)) =3D s1; \ @@ -1812,6 +1838,8 @@ void HELPER(NAME)(void *vd, uint64_t s1, CPURISCVStat= e *env, \ uint32_t vta =3D vext_vta(desc); \ uint32_t i; \ \ + VSTART_CHECK_EARLY_EXIT(env); \ + \ for (i =3D env->vstart; i < vl; i++) { \ *((ETYPE *)vd + H(i)) =3D (ETYPE)s1; \ } \ @@ -1835,6 +1863,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void= *vs2, \ uint32_t vta =3D vext_vta(desc); \ uint32_t i; \ \ + VSTART_CHECK_EARLY_EXIT(env); \ + \ for (i =3D env->vstart; i < vl; i++) { \ ETYPE *vt =3D (!vext_elem_mask(v0, i) ? vs2 : vs1); \ *((ETYPE *)vd + H(i)) =3D *(vt + H(i)); \ @@ -1859,6 +1889,8 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1= , \ uint32_t vta =3D vext_vta(desc); \ uint32_t i; \ \ + VSTART_CHECK_EARLY_EXIT(env); \ + \ for (i =3D env->vstart; i < vl; i++) { \ ETYPE s2 =3D *((ETYPE *)vs2 + H(i)); \ ETYPE d =3D (!vext_elem_mask(v0, i) ? s2 : \ @@ -1904,6 +1936,8 @@ vext_vv_rm_1(void *vd, void *v0, void *vs1, void *vs2, uint32_t vl, uint32_t vm, int vxrm, opivv2_rm_fn *fn, uint32_t vma, uint32_t esz) { + VSTART_CHECK_EARLY_EXIT(env); + for (uint32_t i =3D env->vstart; i < vl; i++) { if (!vm && !vext_elem_mask(v0, i)) { /* set masked-off elements to 1s */ @@ -2029,6 +2063,8 @@ vext_vx_rm_1(void *vd, void *v0, target_long s1, void= *vs2, uint32_t vl, uint32_t vm, int vxrm, opivx2_rm_fn *fn, uint32_t vma, uint32_t esz) { + VSTART_CHECK_EARLY_EXIT(env); + for (uint32_t i =3D env->vstart; i < vl; i++) { if (!vm && !vext_elem_mask(v0, i)) { /* set masked-off elements to 1s */ @@ -2826,6 +2862,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, = \ uint32_t vma =3D vext_vma(desc); \ uint32_t i; \ \ + VSTART_CHECK_EARLY_EXIT(env); \ + \ for (i =3D env->vstart; i < vl; i++) { \ if (!vm && !vext_elem_mask(v0, i)) { \ /* set masked-off elements to 1s */ \ @@ -2869,6 +2907,8 @@ void HELPER(NAME)(void *vd, void *v0, uint64_t s1, = \ uint32_t vma =3D vext_vma(desc); \ uint32_t i; \ \ + VSTART_CHECK_EARLY_EXIT(env); \ + \ for (i =3D env->vstart; i < vl; i++) { \ if (!vm && !vext_elem_mask(v0, i)) { \ /* set masked-off elements to 1s */ \ @@ -3455,6 +3495,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs2, = \ uint32_t vma =3D vext_vma(desc); \ uint32_t i; \ \ + VSTART_CHECK_EARLY_EXIT(env); \ + \ if (vl =3D=3D 0) { \ return; \ } \ @@ -3976,6 +4018,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void= *vs2, \ uint32_t vma =3D vext_vma(desc); \ uint32_t i; \ \ + VSTART_CHECK_EARLY_EXIT(env); \ + \ for (i =3D env->vstart; i < vl; i++) { \ ETYPE s1 =3D *((ETYPE *)vs1 + H(i)); \ ETYPE s2 =3D *((ETYPE *)vs2 + H(i)); \ @@ -4016,6 +4060,8 @@ void HELPER(NAME)(void *vd, void *v0, uint64_t s1, vo= id *vs2, \ uint32_t vma =3D vext_vma(desc); \ uint32_t i; \ \ + VSTART_CHECK_EARLY_EXIT(env); \ + \ for (i =3D env->vstart; i < vl; i++) { \ ETYPE s2 =3D *((ETYPE *)vs2 + H(i)); \ if (!vm && !vext_elem_mask(v0, i)) { \ @@ -4209,6 +4255,8 @@ void HELPER(NAME)(void *vd, void *v0, uint64_t s1, vo= id *vs2, \ uint32_t vta =3D vext_vta(desc); \ uint32_t i; \ \ + VSTART_CHECK_EARLY_EXIT(env); \ + \ for (i =3D env->vstart; i < vl; i++) { \ ETYPE s2 =3D *((ETYPE *)vs2 + H(i)); \ *((ETYPE *)vd + H(i)) =3D \ @@ -4533,6 +4581,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, = \ uint32_t i; \ int a, b; \ \ + VSTART_CHECK_EARLY_EXIT(env); \ + \ for (i =3D env->vstart; i < vl; i++) { \ a =3D vext_elem_mask(vs1, i); \ b =3D vext_elem_mask(vs2, i); \ @@ -4726,6 +4776,8 @@ void HELPER(NAME)(void *vd, void *v0, CPURISCVState *= env, uint32_t desc) \ uint32_t vma =3D vext_vma(desc); = \ int i; \ \ + VSTART_CHECK_EARLY_EXIT(env); \ + \ for (i =3D env->vstart; i < vl; i++) { = \ if (!vm && !vext_elem_mask(v0, i)) { \ /* set masked-off elements to 1s */ \ @@ -4761,6 +4813,8 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1= , void *vs2, \ uint32_t vma =3D vext_vma(desc); = \ target_ulong offset =3D s1, i_min, i; = \ \ + VSTART_CHECK_EARLY_EXIT(env); \ + \ i_min =3D MAX(env->vstart, offset); = \ for (i =3D i_min; i < vl; i++) { = \ if (!vm && !vext_elem_mask(v0, i)) { \ @@ -4794,6 +4848,8 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1= , void *vs2, \ uint32_t vma =3D vext_vma(desc); = \ target_ulong i_max, i_min, i; \ \ + VSTART_CHECK_EARLY_EXIT(env); \ + \ i_min =3D MIN(s1 < vlmax ? vlmax - s1 : 0, vl); = \ i_max =3D MAX(i_min, env->vstart); = \ for (i =3D env->vstart; i < i_max; ++i) { = \ @@ -4836,6 +4892,8 @@ static void vslide1up_##BITWIDTH(void *vd, void *v0, = uint64_t s1, \ uint32_t vma =3D vext_vma(desc); = \ uint32_t i; = \ = \ + VSTART_CHECK_EARLY_EXIT(env); = \ + = \ for (i =3D env->vstart; i < vl; i++) { = \ if (!vm && !vext_elem_mask(v0, i)) { = \ /* set masked-off elements to 1s */ = \ @@ -4885,6 +4943,8 @@ static void vslide1down_##BITWIDTH(void *vd, void *v0= , uint64_t s1, \ uint32_t vma =3D vext_vma(desc); = \ uint32_t i; = \ = \ + VSTART_CHECK_EARLY_EXIT(env); = \ + = \ for (i =3D env->vstart; i < vl; i++) { = \ if (!vm && !vext_elem_mask(v0, i)) { = \ /* set masked-off elements to 1s */ = \ @@ -4960,6 +5020,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void= *vs2, \ uint64_t index; \ uint32_t i; \ \ + VSTART_CHECK_EARLY_EXIT(env); \ + \ for (i =3D env->vstart; i < vl; i++) { = \ if (!vm && !vext_elem_mask(v0, i)) { \ /* set masked-off elements to 1s */ \ @@ -5003,6 +5065,8 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1= , void *vs2, \ uint64_t index =3D s1; = \ uint32_t i; \ \ + VSTART_CHECK_EARLY_EXIT(env); \ + \ for (i =3D env->vstart; i < vl; i++) { = \ if (!vm && !vext_elem_mask(v0, i)) { \ /* set masked-off elements to 1s */ \ @@ -5097,6 +5161,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs2, = \ uint32_t vma =3D vext_vma(desc); \ uint32_t i; \ \ + VSTART_CHECK_EARLY_EXIT(env); \ + \ for (i =3D env->vstart; i < vl; i++) { \ if (!vm && !vext_elem_mask(v0, i)) { \ /* set masked-off elements to 1s */ \ diff --git a/target/riscv/vector_internals.c b/target/riscv/vector_internal= s.c index 9cf5c17cde..40faf3e65b 100644 --- a/target/riscv/vector_internals.c +++ b/target/riscv/vector_internals.c @@ -43,6 +43,8 @@ void do_vext_vv(void *vd, void *v0, void *vs1, void *vs2, uint32_t vma =3D vext_vma(desc); uint32_t i; =20 + VSTART_CHECK_EARLY_EXIT(env); + for (i =3D env->vstart; i < vl; i++) { if (!vm && !vext_elem_mask(v0, i)) { /* set masked-off elements to 1s */ @@ -67,6 +69,8 @@ void do_vext_vx(void *vd, void *v0, target_long s1, void = *vs2, uint32_t vma =3D vext_vma(desc); uint32_t i; =20 + VSTART_CHECK_EARLY_EXIT(env); + for (i =3D env->vstart; i < vl; i++) { if (!vm && !vext_elem_mask(v0, i)) { /* set masked-off elements to 1s */ diff --git a/target/riscv/vector_internals.h b/target/riscv/vector_internal= s.h index 8133111e5f..4539970e81 100644 --- a/target/riscv/vector_internals.h +++ b/target/riscv/vector_internals.h @@ -25,6 +25,13 @@ #include "tcg/tcg-gvec-desc.h" #include "internals.h" =20 +#define VSTART_CHECK_EARLY_EXIT(env) do { \ + if (env->vstart >=3D env->vl) { \ + env->vstart =3D 0; \ + return; \ + } \ +} while (0) + static inline uint32_t vext_nf(uint32_t desc) { return FIELD_EX32(simd_data(desc), VDATA, NF); @@ -152,6 +159,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs2, \ uint32_t vma =3D vext_vma(desc); \ uint32_t i; \ \ + VSTART_CHECK_EARLY_EXIT(env); \ + \ for (i =3D env->vstart; i < vl; i++) { \ if (!vm && !vext_elem_mask(v0, i)) { \ /* set masked-off elements to 1s */ \ --=20 2.39.2