Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with RISC-V.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
configs/devices/riscv32-softmmu/default.mak | 13 ++++++-------
configs/devices/riscv64-softmmu/default.mak | 15 +++++++--------
.gitlab-ci.d/buildtest.yml | 2 +-
hw/riscv/Kconfig | 14 ++++++++++++++
4 files changed, 28 insertions(+), 16 deletions(-)
diff --git a/configs/devices/riscv32-softmmu/default.mak b/configs/devices/riscv32-softmmu/default.mak
index 07e4fd26df3..c2cd86ce05f 100644
--- a/configs/devices/riscv32-softmmu/default.mak
+++ b/configs/devices/riscv32-softmmu/default.mak
@@ -4,10 +4,9 @@
# CONFIG_PCI_DEVICES=n
# CONFIG_TEST_DEVICES=n
-# Boards:
-#
-CONFIG_SPIKE=y
-CONFIG_SIFIVE_E=y
-CONFIG_SIFIVE_U=y
-CONFIG_RISCV_VIRT=y
-CONFIG_OPENTITAN=y
+# Boards are selected by default, uncomment to keep out of the build.
+# CONFIG_SPIKE=n
+# CONFIG_SIFIVE_E=n
+# CONFIG_SIFIVE_U=n
+# CONFIG_RISCV_VIRT=n
+# CONFIG_OPENTITAN=n
diff --git a/configs/devices/riscv64-softmmu/default.mak b/configs/devices/riscv64-softmmu/default.mak
index 221963d4c5c..39ed3a0061a 100644
--- a/configs/devices/riscv64-softmmu/default.mak
+++ b/configs/devices/riscv64-softmmu/default.mak
@@ -4,11 +4,10 @@
# CONFIG_PCI_DEVICES=n
# CONFIG_TEST_DEVICES=n
-# Boards:
-#
-CONFIG_SPIKE=y
-CONFIG_SIFIVE_E=y
-CONFIG_SIFIVE_U=y
-CONFIG_RISCV_VIRT=y
-CONFIG_MICROCHIP_PFSOC=y
-CONFIG_SHAKTI_C=y
+# Boards are selected by default, uncomment to keep out of the build.
+# CONFIG_SPIKE=n
+# CONFIG_SIFIVE_E=n
+# CONFIG_SIFIVE_U=n
+# CONFIG_RISCV_VIRT=n
+# CONFIG_MICROCHIP_PFSOC=n
+# CONFIG_SHAKTI_C=n
diff --git a/.gitlab-ci.d/buildtest.yml b/.gitlab-ci.d/buildtest.yml
index a5f4b4d3793..a65b5fc9560 100644
--- a/.gitlab-ci.d/buildtest.yml
+++ b/.gitlab-ci.d/buildtest.yml
@@ -649,7 +649,7 @@ build-tci:
# Check our reduced build configurations
# requires libfdt: aarch64, arm, i386, loongarch64, microblaze, microblazeel,
-# mips64el, or1k, ppc, ppc64, x86_64
+# mips64el, or1k, ppc, ppc64, riscv32, riscv64, x86_64
# does not build without boards: i386, loongarch64, x86_64
build-without-defaults:
extends: .native_build_job_template
diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig
index fc72ef03799..5f5f9e31bb0 100644
--- a/hw/riscv/Kconfig
+++ b/hw/riscv/Kconfig
@@ -8,6 +8,8 @@ config IBEX
config MICROCHIP_PFSOC
bool
+ default y
+ depends on RISCV64
select CADENCE_SDHCI
select CPU_CLUSTER
select MCHP_PFSOC_DMC
@@ -21,12 +23,16 @@ config MICROCHIP_PFSOC
config OPENTITAN
bool
+ default y
+ depends on RISCV32
select IBEX
select SIFIVE_PLIC
select UNIMP
config RISCV_VIRT
bool
+ default y
+ depends on RISCV32 || RISCV64
imply PCI_DEVICES
imply VIRTIO_VGA
imply TEST_DEVICES
@@ -51,6 +57,8 @@ config RISCV_VIRT
config SHAKTI_C
bool
+ default y
+ depends on RISCV64
select RISCV_ACLINT
select SHAKTI_UART
select SIFIVE_PLIC
@@ -58,6 +66,8 @@ config SHAKTI_C
config SIFIVE_E
bool
+ default y
+ depends on RISCV32 || RISCV64
select RISCV_ACLINT
select SIFIVE_GPIO
select SIFIVE_PLIC
@@ -68,6 +78,8 @@ config SIFIVE_E
config SIFIVE_U
bool
+ default y
+ depends on RISCV32 || RISCV64
select CADENCE
select CPU_CLUSTER
select RISCV_ACLINT
@@ -85,6 +97,8 @@ config SIFIVE_U
config SPIKE
bool
+ default y
+ depends on RISCV32 || RISCV64
select RISCV_NUMA
select HTIF
select RISCV_ACLINT
--
2.44.0