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Sat, 08 Jun 2024 01:34:43 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFMwQrD4T6AOMsqfMR3wFfYilitp1VeGT1DCER+3DCMINCHqSoasDBYb///sgWSW/UgYRdreQ== X-Received: by 2002:a17:907:1ca1:b0:a6e:337:1428 with SMTP id a640c23a62f3a-a6e03372a85mr259585166b.57.1717835676597; Sat, 08 Jun 2024 01:34:36 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 06/42] target/i386: disable/enable breakpoints on vmentry/vmexit Date: Sat, 8 Jun 2024 10:33:39 +0200 Message-ID: <20240608083415.2769160-7-pbonzini@redhat.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240608083415.2769160-1-pbonzini@redhat.com> References: <20240608083415.2769160-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer2=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1717835928791100001 Content-Type: text/plain; charset="utf-8" If the required DR7 (either from the VMCB or from the host save area) disables a breakpoint that was enabled prior to vmentry or vmexit, it is left enabled and will trigger EXCP_DEBUG. This causes a spurious #DB on the next crossing of the breakpoint. To disable it, vmentry/vmexit must use cpu_x86_update_dr7 to load DR7. Because cpu_x86_update_dr7 takes a 32-bit argument, check reserved bits prior to calling cpu_x86_update_dr7, and do the same for DR6 as well for consistency. This scenario is tested by the "host_rflags" test in kvm-unit-tests. Signed-off-by: Paolo Bonzini --- target/i386/tcg/sysemu/svm_helper.c | 25 +++++++++++++++---------- 1 file changed, 15 insertions(+), 10 deletions(-) diff --git a/target/i386/tcg/sysemu/svm_helper.c b/target/i386/tcg/sysemu/s= vm_helper.c index 5d6de2294fa..922d8964f8e 100644 --- a/target/i386/tcg/sysemu/svm_helper.c +++ b/target/i386/tcg/sysemu/svm_helper.c @@ -163,6 +163,8 @@ void helper_vmrun(CPUX86State *env, int aflag, int next= _eip_addend) uint64_t new_cr0; uint64_t new_cr3; uint64_t new_cr4; + uint64_t new_dr6; + uint64_t new_dr7; =20 if (aflag =3D=3D 2) { addr =3D env->regs[R_EAX]; @@ -361,20 +363,22 @@ void helper_vmrun(CPUX86State *env, int aflag, int ne= xt_eip_addend) env->vm_vmcb + offsetof(struct vmcb, save.= rsp)); env->regs[R_EAX] =3D x86_ldq_phys(cs, env->vm_vmcb + offsetof(struct vmcb, save.= rax)); - env->dr[7] =3D x86_ldq_phys(cs, - env->vm_vmcb + offsetof(struct vmcb, save.dr7)); - env->dr[6] =3D x86_ldq_phys(cs, - env->vm_vmcb + offsetof(struct vmcb, save.dr6)); + + new_dr7 =3D x86_ldq_phys(cs, env->vm_vmcb + offsetof(struct vmcb, save= .dr7)); + new_dr6 =3D x86_ldq_phys(cs, env->vm_vmcb + offsetof(struct vmcb, save= .dr6)); =20 #ifdef TARGET_X86_64 - if (env->dr[6] & DR_RESERVED_MASK) { + if (new_dr7 & DR_RESERVED_MASK) { cpu_vmexit(env, SVM_EXIT_ERR, 0, GETPC()); } - if (env->dr[7] & DR_RESERVED_MASK) { + if (new_dr6 & DR_RESERVED_MASK) { cpu_vmexit(env, SVM_EXIT_ERR, 0, GETPC()); } #endif =20 + cpu_x86_update_dr7(env, new_dr7); + env->dr[6] =3D new_dr6; + if (is_efer_invalid_state(env)) { cpu_vmexit(env, SVM_EXIT_ERR, 0, GETPC()); } @@ -864,8 +868,11 @@ void do_vmexit(CPUX86State *env) =20 env->dr[6] =3D x86_ldq_phys(cs, env->vm_hsave + offsetof(struct vmcb, save.dr6)); - env->dr[7] =3D x86_ldq_phys(cs, - env->vm_hsave + offsetof(struct vmcb, save.dr7)); + + /* Disables all breakpoints in the host DR7 register. */ + cpu_x86_update_dr7(env, + x86_ldq_phys(cs, + env->vm_hsave + offsetof(struct vmcb, save.dr7))= & ~0xff); =20 /* other setups */ x86_stl_phys(cs, @@ -891,8 +898,6 @@ void do_vmexit(CPUX86State *env) from the page table indicated the host's CR3. If the PDPEs contain illegal state, the processor causes a shutdown. */ =20 - /* Disables all breakpoints in the host DR7 register. */ - /* Checks the reloaded host state for consistency. */ =20 /* If the host's rIP reloaded by #VMEXIT is outside the limit of the --=20 2.45.1