Update firmware to have graphics card memory fix from EDK2 commit
c1d1910be6e04a8b1a73090cf2881fb698947a6e:
OvmfPkg/QemuVideoDxe: add feature PCD to remap framebuffer W/C
Some platforms (such as SBSA-QEMU on recent builds of the emulator) only
tolerate misaligned accesses to normal memory, and raise alignment
faults on such accesses to device memory, which is the default for PCIe
MMIO BARs.
When emulating a PCIe graphics controller, the framebuffer is typically
exposed via a MMIO BAR, while the disposition of the region is closer to
memory (no side effects on reads or writes, except for the changing
picture on the screen; direct random access to any pixel in the image).
In order to permit the use of such controllers on platforms that only
tolerate these types of accesses for normal memory, it is necessary to
remap the memory. Use the DXE services to set the desired capabilities
and attributes.
Hide this behavior under a feature PCD so only platforms that really
need it can enable it. (OVMF on x86 has no need for this)
With this fix enabled we can boot sbsa-ref with more than one cpu core.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
---
tests/avocado/machine_aarch64_sbsaref.py | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/tests/avocado/machine_aarch64_sbsaref.py b/tests/avocado/machine_aarch64_sbsaref.py
index 6bb82f2a03..e854ec6a1a 100644
--- a/tests/avocado/machine_aarch64_sbsaref.py
+++ b/tests/avocado/machine_aarch64_sbsaref.py
@@ -37,18 +37,18 @@ def fetch_firmware(self):
Used components:
- - Trusted Firmware 2.11.0
- - Tianocore EDK2 stable202405
- - Tianocore EDK2-platforms commit 4bbd0ed
+ - Trusted Firmware v2.11.0
+ - Tianocore EDK2 4d4f569924
+ - Tianocore EDK2-platforms 3f08401
"""
# Secure BootRom (TF-A code)
fs0_xz_url = (
"https://artifacts.codelinaro.org/artifactory/linaro-419-sbsa-ref/"
- "20240528-140808/edk2/SBSA_FLASH0.fd.xz"
+ "20240619-148232/edk2/SBSA_FLASH0.fd.xz"
)
- fs0_xz_hash = "fa6004900b67172914c908b78557fec4d36a5f784f4c3dd08f49adb75e1892a9"
+ fs0_xz_hash = "0c954842a590988f526984de22e21ae0ab9cb351a0c99a8a58e928f0c7359cf7"
tar_xz_path = self.fetch_asset(fs0_xz_url, asset_hash=fs0_xz_hash,
algorithm='sha256')
archive.extract(tar_xz_path, self.workdir)
@@ -57,9 +57,9 @@ def fetch_firmware(self):
# Non-secure rom (UEFI and EFI variables)
fs1_xz_url = (
"https://artifacts.codelinaro.org/artifactory/linaro-419-sbsa-ref/"
- "20240528-140808/edk2/SBSA_FLASH1.fd.xz"
+ "20240619-148232/edk2/SBSA_FLASH1.fd.xz"
)
- fs1_xz_hash = "5f3747d4000bc416d9641e33ff4ac60c3cc8cb74ca51b6e932e58531c62eb6f7"
+ fs1_xz_hash = "c6ec39374c4d79bb9e9cdeeb6db44732d90bb4a334cec92002b3f4b9cac4b5ee"
tar_xz_path = self.fetch_asset(fs1_xz_url, asset_hash=fs1_xz_hash,
algorithm='sha256')
archive.extract(tar_xz_path, self.workdir)
--
2.45.1On Thu, 20 Jun 2024 at 12:20, Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> wrote: > > Update firmware to have graphics card memory fix from EDK2 commit > c1d1910be6e04a8b1a73090cf2881fb698947a6e: > > OvmfPkg/QemuVideoDxe: add feature PCD to remap framebuffer W/C > > Some platforms (such as SBSA-QEMU on recent builds of the emulator) only > tolerate misaligned accesses to normal memory, and raise alignment > faults on such accesses to device memory, which is the default for PCIe > MMIO BARs. > > When emulating a PCIe graphics controller, the framebuffer is typically > exposed via a MMIO BAR, while the disposition of the region is closer to > memory (no side effects on reads or writes, except for the changing > picture on the screen; direct random access to any pixel in the image). > > In order to permit the use of such controllers on platforms that only > tolerate these types of accesses for normal memory, it is necessary to > remap the memory. Use the DXE services to set the desired capabilities > and attributes. > > Hide this behavior under a feature PCD so only platforms that really > need it can enable it. (OVMF on x86 has no need for this) > > With this fix enabled we can boot sbsa-ref with more than one cpu core. > This requires an explanation: what does the number of CPU cores have to do with the memory attributes used for the framebuffer? > Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> > --- > tests/avocado/machine_aarch64_sbsaref.py | 14 +++++++------- > 1 file changed, 7 insertions(+), 7 deletions(-) > > diff --git a/tests/avocado/machine_aarch64_sbsaref.py b/tests/avocado/machine_aarch64_sbsaref.py > index 6bb82f2a03..e854ec6a1a 100644 > --- a/tests/avocado/machine_aarch64_sbsaref.py > +++ b/tests/avocado/machine_aarch64_sbsaref.py > @@ -37,18 +37,18 @@ def fetch_firmware(self): > > Used components: > > - - Trusted Firmware 2.11.0 > - - Tianocore EDK2 stable202405 > - - Tianocore EDK2-platforms commit 4bbd0ed > + - Trusted Firmware v2.11.0 > + - Tianocore EDK2 4d4f569924 > + - Tianocore EDK2-platforms 3f08401 > > """ > > # Secure BootRom (TF-A code) > fs0_xz_url = ( > "https://artifacts.codelinaro.org/artifactory/linaro-419-sbsa-ref/" > - "20240528-140808/edk2/SBSA_FLASH0.fd.xz" > + "20240619-148232/edk2/SBSA_FLASH0.fd.xz" > ) > - fs0_xz_hash = "fa6004900b67172914c908b78557fec4d36a5f784f4c3dd08f49adb75e1892a9" > + fs0_xz_hash = "0c954842a590988f526984de22e21ae0ab9cb351a0c99a8a58e928f0c7359cf7" > tar_xz_path = self.fetch_asset(fs0_xz_url, asset_hash=fs0_xz_hash, > algorithm='sha256') > archive.extract(tar_xz_path, self.workdir) > @@ -57,9 +57,9 @@ def fetch_firmware(self): > # Non-secure rom (UEFI and EFI variables) > fs1_xz_url = ( > "https://artifacts.codelinaro.org/artifactory/linaro-419-sbsa-ref/" > - "20240528-140808/edk2/SBSA_FLASH1.fd.xz" > + "20240619-148232/edk2/SBSA_FLASH1.fd.xz" > ) > - fs1_xz_hash = "5f3747d4000bc416d9641e33ff4ac60c3cc8cb74ca51b6e932e58531c62eb6f7" > + fs1_xz_hash = "c6ec39374c4d79bb9e9cdeeb6db44732d90bb4a334cec92002b3f4b9cac4b5ee" > tar_xz_path = self.fetch_asset(fs1_xz_url, asset_hash=fs1_xz_hash, > algorithm='sha256') > archive.extract(tar_xz_path, self.workdir) > > -- > 2.45.1 >
W dniu 30.06.2024 o 16:37, Ard Biesheuvel pisze: > On Thu, 20 Jun 2024 at 12:20, Marcin Juszkiewicz > <marcin.juszkiewicz@linaro.org> wrote: >> >> Update firmware to have graphics card memory fix from EDK2 commit >> c1d1910be6e04a8b1a73090cf2881fb698947a6e: >> >> OvmfPkg/QemuVideoDxe: add feature PCD to remap framebuffer W/C >> >> Some platforms (such as SBSA-QEMU on recent builds of the emulator) only >> tolerate misaligned accesses to normal memory, and raise alignment >> faults on such accesses to device memory, which is the default for PCIe >> MMIO BARs. >> >> When emulating a PCIe graphics controller, the framebuffer is typically >> exposed via a MMIO BAR, while the disposition of the region is closer to >> memory (no side effects on reads or writes, except for the changing >> picture on the screen; direct random access to any pixel in the image). >> >> In order to permit the use of such controllers on platforms that only >> tolerate these types of accesses for normal memory, it is necessary to >> remap the memory. Use the DXE services to set the desired capabilities >> and attributes. >> >> Hide this behavior under a feature PCD so only platforms that really >> need it can enable it. (OVMF on x86 has no need for this) >> >> With this fix enabled we can boot sbsa-ref with more than one cpu core. >> > > This requires an explanation: what does the number of CPU cores have > to do with the memory attributes used for the framebuffer? I have no idea. Older firmware was hanging on several systems but was passing in QEMU tests. After closer looking I noticed that Avocado tests run with "-smp 1" and pass. Checked failing system with "-smp 1" and it worked. In meantime you have fixed problem in EDK2. So yes, updating firmware may look like hiding a bug. Which I do not know how to track (I can build and test QEMU, but going into its internals is something I never done).
On Mon, 1 Jul 2024 at 07:49, Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> wrote: > > W dniu 30.06.2024 o 16:37, Ard Biesheuvel pisze: > > On Thu, 20 Jun 2024 at 12:20, Marcin Juszkiewicz > > <marcin.juszkiewicz@linaro.org> wrote: > >> > >> Update firmware to have graphics card memory fix from EDK2 commit > >> c1d1910be6e04a8b1a73090cf2881fb698947a6e: > >> > >> OvmfPkg/QemuVideoDxe: add feature PCD to remap framebuffer W/C > >> > >> Some platforms (such as SBSA-QEMU on recent builds of the emulator) only > >> tolerate misaligned accesses to normal memory, and raise alignment > >> faults on such accesses to device memory, which is the default for PCIe > >> MMIO BARs. > >> > >> When emulating a PCIe graphics controller, the framebuffer is typically > >> exposed via a MMIO BAR, while the disposition of the region is closer to > >> memory (no side effects on reads or writes, except for the changing > >> picture on the screen; direct random access to any pixel in the image). > >> > >> In order to permit the use of such controllers on platforms that only > >> tolerate these types of accesses for normal memory, it is necessary to > >> remap the memory. Use the DXE services to set the desired capabilities > >> and attributes. > >> > >> Hide this behavior under a feature PCD so only platforms that really > >> need it can enable it. (OVMF on x86 has no need for this) > >> > >> With this fix enabled we can boot sbsa-ref with more than one cpu core. > >> > > > > This requires an explanation: what does the number of CPU cores have > > to do with the memory attributes used for the framebuffer? > > I have no idea. Older firmware was hanging on several systems but was > passing in QEMU tests. After closer looking I noticed that Avocado tests > run with "-smp 1" and pass. > > Checked failing system with "-smp 1" and it worked. In meantime you have > fixed problem in EDK2. > > So yes, updating firmware may look like hiding a bug. Which I do not > know how to track (I can build and test QEMU, but going into its > internals is something I never done). My assumption was that random chance meant that TF-A when only dealing with one CPU meant that its memory layout etc was such that it didn't do the unaligned access. I don't think this is likely to be a QEMU side question. -- PMM
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