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Iglesias'" , Peter Maydell , , "Edgar E . Iglesias" Subject: [PATCH v3 2/3] hw/arm/xilinx_zynq: Add boot-mode property Date: Thu, 20 Jun 2024 16:11:38 +0530 Message-ID: <20240620104139.217908-3-sai.pavan.boddu@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240620104139.217908-1-sai.pavan.boddu@amd.com> References: <20240620104139.217908-1-sai.pavan.boddu@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: None (SATLEXMB03.amd.com: sai.pavan.boddu@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000042A7:EE_|DM4PR12MB5964:EE_ X-MS-Office365-Filtering-Correlation-Id: cb6fabd8-7b78-4dc0-0b4f-08dc91159a69 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230037|376011|36860700010|1800799021|82310400023; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?QCsz2uJzPxrTRGLarSuzP3Gty7LOLT3bwmCuiHTvfOY1VsNLq7ZsNLv1vrAz?= =?us-ascii?Q?xFJ5B0zHkPK81rb+1/3T96BTSQ5CV3FOyiJQ30OHI1oWQ5xMAeNVFKdHXFgH?= =?us-ascii?Q?tNVIsnyV2mZ0I5KPeO1Dv9jB6D7Guxe1J5CmPPChsg5HTsXMmkdvxug/F9kk?= =?us-ascii?Q?NrPifRNe2Uicz6s4rVbEfJ3onoD2kzgbdNIQDDtoep8RTDDwMQdx8/Wms8fi?= =?us-ascii?Q?Mtue90ljG4hwZ/G2Jj8XquCX8tW7yUB0GmbL9yu10zUFiDvdP1qLB+FZNpVa?= =?us-ascii?Q?eoqZmBnKV2mSHPnOVdwYqbonvpduzTRWLA5+t19G/OukRb5/e+ScoFjKkONP?= =?us-ascii?Q?8fs1IkPryOvs7W+qG7gXzaQotezdqJjdkJAW7p8ioP484PKKAMaqZ8HkitPE?= =?us-ascii?Q?hma2gFNhoFY3CLckHPS/yz++93JUJbrqBkDHYvI1Sqz40Zx3dDvqWgOMyjJn?= =?us-ascii?Q?tp5p3W03VfsqIAlv+wYnS3ZAgvsw4VsboM5tKWafiZa3HgbRsMHJon4HsY6u?= =?us-ascii?Q?6sp7ti8teyF3DEJ0SV8v/E9H2aL+iQxkZUT5IiB/gW46IduK77i9QzjhKmMh?= =?us-ascii?Q?3tXDd6YoRCNiQq4wZrSx/bY7atl6PWkUtSBKnpSXHYt/O9UehU7IwyNDGShn?= =?us-ascii?Q?WT2jspTZ0+K49aCXDJ35IPNr2jrP+kxkdadV9leegUeLmjANYWm4K7HEXHBX?= =?us-ascii?Q?CeKKuTegXOrZvnvCm+v2jRTANbLNWWsGS8wVWFB7wlXAd8MPIq4eaB9iyR4W?= =?us-ascii?Q?9VP3S02r7h1XovumbB0EF48vNxwLMwQDrnL6EkpUsLF7+7LYme0BBEiIkXaJ?= =?us-ascii?Q?I1V27xpjGJnQzuUcoGPnIxBA1RzXvKjvx3tTFbSed0iaC9MRXNaxAwTFyMrz?= =?us-ascii?Q?fZPCPNXhWm+gAS7tGpV9bZNeLn2q8Z8/K9Yp25gLeWvFsebALOl7UXkRE8q8?= =?us-ascii?Q?q/xgOGf+UuawnkDrO/c2+uK1dgAjP1MPl0ttA3e2PJ1V6CTjOhuTLHIiUPHX?= =?us-ascii?Q?7dozkbZ6aQibUpRuM01Y3eJreKosv7Db6xk+Qnw15MtyvHTBHsivylIAO1xV?= =?us-ascii?Q?wxAiN0ypeNTjYFxnlPmgQWNeqjicJC/X2JOPdYUhfsKGSdnKIa2mPjExtFF4?= =?us-ascii?Q?l5mhfg17ZrO4bsiXDc4AwT/zfaxZ02qibi5bLlz2qqTDWMZslCuxkMdZ+7nO?= =?us-ascii?Q?QZMHFuOGdIW0+VTluJCoDNU+LGqba2uXLvKhn2HE8xAs8e4lFb/UzXyOPV5i?= =?us-ascii?Q?VaHAoChvYznkmkNAHOM6xOKmiwpTsueC9Vg4nfN3fQNEm7BwwURRMF9oqD8W?= =?us-ascii?Q?EleKJHYNRQ7LYPOjxjamAiy9LDlbxIUb293MNGiXmPd39fgVaIFgHVIkaJtH?= =?us-ascii?Q?nS+hXDcgsuije1J6gKOyLZgw2pIdMp94Dlx0AmlXiwIVsuYlsQ=3D=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230037)(376011)(36860700010)(1800799021)(82310400023); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Jun 2024 10:41:54.8496 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cb6fabd8-7b78-4dc0-0b4f-08dc91159a69 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000042A7.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5964 Received-SPF: permerror client-ip=2a01:111:f403:2414::605; envelope-from=sai.pavan.boddu@amd.com; helo=NAM11-BN8-obe.outbound.protection.outlook.com X-Spam_score_int: -22 X-Spam_score: -2.3 X-Spam_bar: -- X-Spam_report: (-2.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.144, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer2=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1718880190153100007 Content-Type: text/plain; charset="utf-8" Read boot-mode value as machine property and propagate that to SLCR.BOOT_MODE register. Signed-off-by: Sai Pavan Boddu Acked-by: Edgar E. Iglesias Reviewed-by: Francisco Iglesias --- hw/arm/xilinx_zynq.c | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 7f7a3d23fbe..39f07e6dfd8 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -38,6 +38,7 @@ #include "qom/object.h" #include "exec/tswap.h" #include "target/arm/cpu-qom.h" +#include "qapi/visitor.h" =20 #define TYPE_ZYNQ_MACHINE MACHINE_TYPE_NAME("xilinx-zynq-a9") OBJECT_DECLARE_SIMPLE_TYPE(ZynqMachineState, ZYNQ_MACHINE) @@ -90,6 +91,7 @@ struct ZynqMachineState { MachineState parent; Clock *ps_clk; ARMCPU *cpu[ZYNQ_MAX_CPUS]; + uint8_t boot_mode; }; =20 static void zynq_write_board_setup(ARMCPU *cpu, @@ -176,6 +178,27 @@ static inline int zynq_init_spi_flashes(uint32_t base_= addr, qemu_irq irq, return unit; } =20 +static void zynq_set_boot_mode(Object *obj, const char *str, + Error **errp) +{ + ZynqMachineState *m =3D ZYNQ_MACHINE(obj); + uint8_t mode =3D 0; + + if (!strcasecmp(str, "QSPI")) { + mode =3D 1; + } else if (!strcasecmp(str, "SD")) { + mode =3D 5; + } else if (!strcasecmp(str, "NOR")) { + mode =3D 2; + } else if (!strcasecmp(str, "JTAG")) { + mode =3D 0; + } else { + error_setg(errp, "bootmode %s not supported", str); + return; + } + m->boot_mode =3D mode; +} + static void zynq_init(MachineState *machine) { ZynqMachineState *zynq_machine =3D ZYNQ_MACHINE(machine); @@ -241,6 +264,7 @@ static void zynq_init(MachineState *machine) /* Create slcr, keep a pointer to connect clocks */ slcr =3D qdev_new("xilinx-zynq_slcr"); qdev_connect_clock_in(slcr, "ps_clk", zynq_machine->ps_clk); + qdev_prop_set_uint8(slcr, "boot-mode", zynq_machine->boot_mode); sysbus_realize_and_unref(SYS_BUS_DEVICE(slcr), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(slcr), 0, 0xF8000000); =20 @@ -372,6 +396,7 @@ static void zynq_machine_class_init(ObjectClass *oc, vo= id *data) NULL }; MachineClass *mc =3D MACHINE_CLASS(oc); + ObjectProperty *prop; mc->desc =3D "Xilinx Zynq Platform Baseboard for Cortex-A9"; mc->init =3D zynq_init; mc->max_cpus =3D ZYNQ_MAX_CPUS; @@ -379,6 +404,12 @@ static void zynq_machine_class_init(ObjectClass *oc, v= oid *data) mc->ignore_memory_transaction_failures =3D true; mc->valid_cpu_types =3D valid_cpu_types; mc->default_ram_id =3D "zynq.ext_ram"; + prop =3D object_class_property_add_str(oc, "boot-mode", NULL, + zynq_set_boot_mode); + object_class_property_set_description(oc, "boot-mode", + "Supported boot modes:" + " JTAG QSPI SD NOR"); + object_property_set_default_str(prop, "QSPI"); } =20 static const TypeInfo zynq_machine_type =3D { --=20 2.34.1