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charset="utf-8" Upcoming AMD uarch will support Bus Lock Detect (called Bus Lock Trap in AMD docs). Bus Lock Detect is enumerated with cpuid Fn0000_0007_ECX_x0 bit [24 / BUSLOCKTRAP]. It can be enabled through MSR_IA32_DEBUGCTLMSR. When enabled, hardware clears DR6[11] and raises a #DB exception on occurrence of Bus Lock if CPL > 0. More detail about the feature can be found in AMD APM[1]. Qemu supports remote debugging through host gdb (the "gdbstub" facility) where some of the remote debugging features like instruction and data breakpoints relies on the same hardware infrastructure (#DB, DR6 etc.) that Bus Lock Detect also uses. Instead of handling internally, KVM forwards #DB to Qemu when remote debugging is ON and #DB is being intercepted. It's Qemu's responsibility to re-inject the exception to guest when some of the exception source bits (in DR6) are not being handled by Qemu remote debug handler. Bus Lock Detect is one such case. [1]: AMD64 Architecture Programmer's Manual Pub. 40332, Rev. 4.07 - June 2023, Vol 2, 13.1.3.6 Bus Lock Trap https://bugzilla.kernel.org/attachment.cgi?id=3D304653 Signed-off-by: Ravi Bangoria --- Kernel and KVM patches: https://lore.kernel.org/r/20240712093943.1288-1-ravi.bangoria@amd.com target/i386/cpu.h | 1 + target/i386/kvm/kvm.c | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index c64ef0c1a2..89bcff2fa3 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -271,6 +271,7 @@ typedef enum X86Seg { | CR4_SMEP_MASK | CR4_SMAP_MASK | CR4_PKE_MASK | CR4_PKS_M= ASK \ | CR4_LAM_SUP_MASK)) =20 +#define DR6_BLD (1 << 11) #define DR6_BD (1 << 13) #define DR6_BS (1 << 14) #define DR6_BT (1 << 15) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 6c864e4611..d128d4e5ca 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -5141,14 +5141,14 @@ static int kvm_handle_debug(X86CPU *cpu, } else if (kvm_find_sw_breakpoint(cs, arch_info->pc)) { ret =3D EXCP_DEBUG; } - if (ret =3D=3D 0) { + if (ret =3D=3D 0 || !(arch_info->dr6 & DR6_BLD)) { cpu_synchronize_state(cs); assert(env->exception_nr =3D=3D -1); =20 /* pass to guest */ kvm_queue_exception(env, arch_info->exception, arch_info->exception =3D=3D EXCP01_DB, - arch_info->dr6); + ret =3D=3D 0 ? arch_info->dr6 ^ DR6_BLD : DR6_= BLD); env->has_error_code =3D 0; } =20 --=20 2.34.1