support ADC and I2C for AST2700

[PATCH v1 04/15] hw/i2c/aspeed: support discontinuous register memory region of I2C bus

Posted by Jamin Lin via 2 months ago

It only support continuous register memory region for all I2C bus.
However, the register address of all I2c bus are discontinuous
for AST2700.

Ex: the register address of I2C bus for ast2700 as following.
0x100 - 0x17F: Device 0
0x200 - 0x27F: Device 1
0x300 - 0x37F: Device 2
0x400 - 0x47F: Device 3
0x500 - 0x57F: Device 4
0x600 - 0x67F: Device 5
0x700 - 0x77F: Device 6
0x800 - 0x87F: Device 7
0x900 - 0x97F: Device 8
0xA00 - 0xA7F: Device 9
0xB00 - 0xB7F: Device 10
0xC00 - 0xC7F: Device 11
0xD00 - 0xD7F: Device 12
0xE00 - 0xE7F: Device 13
0xF00 – 0xF7F: Device 14
0x1000 – 0x107F: Device 15

Introduce a new class attribute to make user set each I2C bus gap size.
Update formula to create all I2C bus register memory regions.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
 hw/i2c/aspeed_i2c.c         | 3 ++-
 include/hw/i2c/aspeed_i2c.h | 1 +
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c
index 7d5a53c4c0..462ad78a13 100644
--- a/hw/i2c/aspeed_i2c.c
+++ b/hw/i2c/aspeed_i2c.c
@@ -1011,6 +1011,7 @@ static void aspeed_i2c_realize(DeviceState *dev, Error **errp)
     SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
     AspeedI2CState *s = ASPEED_I2C(dev);
     AspeedI2CClass *aic = ASPEED_I2C_GET_CLASS(s);
+    uint32_t reg_offset = aic->reg_size + aic->reg_gap_size;
 
     sysbus_init_irq(sbd, &s->irq);
     memory_region_init_io(&s->iomem, OBJECT(s), &aspeed_i2c_ctrl_ops, s,
@@ -1033,7 +1034,7 @@ static void aspeed_i2c_realize(DeviceState *dev, Error **errp)
             return;
         }
 
-        memory_region_add_subregion(&s->iomem, aic->reg_size * (i + offset),
+        memory_region_add_subregion(&s->iomem, reg_offset * (i + offset),
                                     &s->busses[i].mr);
     }
 
diff --git a/include/hw/i2c/aspeed_i2c.h b/include/hw/i2c/aspeed_i2c.h
index 065b636d29..422ee0e298 100644
--- a/include/hw/i2c/aspeed_i2c.h
+++ b/include/hw/i2c/aspeed_i2c.h
@@ -275,6 +275,7 @@ struct AspeedI2CClass {
 
     uint8_t num_busses;
     uint8_t reg_size;
+    uint32_t reg_gap_size;
     uint8_t gap;
     qemu_irq (*bus_get_irq)(AspeedI2CBus *);
 
-- 
2.34.1

Re: [PATCH v1 04/15] hw/i2c/aspeed: support discontinuous register memory region of I2C bus

Posted by Cédric Le Goater 2 months ago

On 7/18/24 08:49, Jamin Lin wrote:
> It only support continuous register memory region for all I2C bus.
> However, the register address of all I2c bus are discontinuous
> for AST2700.
> 
> Ex: the register address of I2C bus for ast2700 as following.
> 0x100 - 0x17F: Device 0
> 0x200 - 0x27F: Device 1
> 0x300 - 0x37F: Device 2
> 0x400 - 0x47F: Device 3
> 0x500 - 0x57F: Device 4
> 0x600 - 0x67F: Device 5
> 0x700 - 0x77F: Device 6
> 0x800 - 0x87F: Device 7
> 0x900 - 0x97F: Device 8
> 0xA00 - 0xA7F: Device 9
> 0xB00 - 0xB7F: Device 10
> 0xC00 - 0xC7F: Device 11
> 0xD00 - 0xD7F: Device 12
> 0xE00 - 0xE7F: Device 13
> 0xF00 – 0xF7F: Device 14
> 0x1000 – 0x107F: Device 15
> 
> Introduce a new class attribute to make user set each I2C bus gap size.
> Update formula to create all I2C bus register memory regions.

I don't think this is necessary to model. Could we simply increase
tge register MMIO size for the AST2700 bus model and rely on the
memops to catch invalid register offsets ?


Thanks,

C.



> 
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> ---
>   hw/i2c/aspeed_i2c.c         | 3 ++-
>   include/hw/i2c/aspeed_i2c.h | 1 +
>   2 files changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c
> index 7d5a53c4c0..462ad78a13 100644
> --- a/hw/i2c/aspeed_i2c.c
> +++ b/hw/i2c/aspeed_i2c.c
> @@ -1011,6 +1011,7 @@ static void aspeed_i2c_realize(DeviceState *dev, Error **errp)
>       SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
>       AspeedI2CState *s = ASPEED_I2C(dev);
>       AspeedI2CClass *aic = ASPEED_I2C_GET_CLASS(s);
> +    uint32_t reg_offset = aic->reg_size + aic->reg_gap_size;
>   
>       sysbus_init_irq(sbd, &s->irq);
>       memory_region_init_io(&s->iomem, OBJECT(s), &aspeed_i2c_ctrl_ops, s,
> @@ -1033,7 +1034,7 @@ static void aspeed_i2c_realize(DeviceState *dev, Error **errp)
>               return;
>           }
>   
> -        memory_region_add_subregion(&s->iomem, aic->reg_size * (i + offset),
> +        memory_region_add_subregion(&s->iomem, reg_offset * (i + offset),
>                                       &s->busses[i].mr);
>       }
>   
> diff --git a/include/hw/i2c/aspeed_i2c.h b/include/hw/i2c/aspeed_i2c.h
> index 065b636d29..422ee0e298 100644
> --- a/include/hw/i2c/aspeed_i2c.h
> +++ b/include/hw/i2c/aspeed_i2c.h
> @@ -275,6 +275,7 @@ struct AspeedI2CClass {
>   
>       uint8_t num_busses;
>       uint8_t reg_size;
> +    uint32_t reg_gap_size;
>       uint8_t gap;
>       qemu_irq (*bus_get_irq)(AspeedI2CBus *);
>

RE: [PATCH v1 04/15] hw/i2c/aspeed: support discontinuous register memory region of I2C bus

Posted by Jamin Lin 2 months ago

Hi Cedric,

> Subject: Re: [PATCH v1 04/15] hw/i2c/aspeed: support discontinuous register
> memory region of I2C bus
>
> On 7/18/24 08:49, Jamin Lin wrote:
> > It only support continuous register memory region for all I2C bus.
> > However, the register address of all I2c bus are discontinuous for
> > AST2700.
> >
> > Ex: the register address of I2C bus for ast2700 as following.
> > 0x100 - 0x17F: Device 0
> > 0x200 - 0x27F: Device 1
> > 0x300 - 0x37F: Device 2
> > 0x400 - 0x47F: Device 3
> > 0x500 - 0x57F: Device 4
> > 0x600 - 0x67F: Device 5
> > 0x700 - 0x77F: Device 6
> > 0x800 - 0x87F: Device 7
> > 0x900 - 0x97F: Device 8
> > 0xA00 - 0xA7F: Device 9
> > 0xB00 - 0xB7F: Device 10
> > 0xC00 - 0xC7F: Device 11
> > 0xD00 - 0xD7F: Device 12
> > 0xE00 - 0xE7F: Device 13
> > 0xF00 – 0xF7F: Device 14
> > 0x1000 – 0x107F: Device 15
> >
> > Introduce a new class attribute to make user set each I2C bus gap size.
> > Update formula to create all I2C bus register memory regions.
>
> I don't think this is necessary to model. Could we simply increase tge register
> MMIO size for the AST2700 bus model and rely on the memops to catch
> invalid register offsets ?
>
Thanks for your review and suggestion.

Sorry, I am not very clearly understand your comments.
Could you please describe it more detail?
Thanks-Jamin

>
> Thanks,
>
> C.
>
>
>
> >
> > Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> > ---
> >   hw/i2c/aspeed_i2c.c         | 3 ++-
> >   include/hw/i2c/aspeed_i2c.h | 1 +
> >   2 files changed, 3 insertions(+), 1 deletion(-)
> >
> > diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c index
> > 7d5a53c4c0..462ad78a13 100644
> > --- a/hw/i2c/aspeed_i2c.c
> > +++ b/hw/i2c/aspeed_i2c.c
> > @@ -1011,6 +1011,7 @@ static void aspeed_i2c_realize(DeviceState *dev,
> Error **errp)
> >       SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
> >       AspeedI2CState *s = ASPEED_I2C(dev);
> >       AspeedI2CClass *aic = ASPEED_I2C_GET_CLASS(s);
> > +    uint32_t reg_offset = aic->reg_size + aic->reg_gap_size;
> >
> >       sysbus_init_irq(sbd, &s->irq);
> >       memory_region_init_io(&s->iomem, OBJECT(s),
> > &aspeed_i2c_ctrl_ops, s, @@ -1033,7 +1034,7 @@ static void
> aspeed_i2c_realize(DeviceState *dev, Error **errp)
> >               return;
> >           }
> >
> > -        memory_region_add_subregion(&s->iomem, aic->reg_size * (i +
> offset),
> > +        memory_region_add_subregion(&s->iomem, reg_offset * (i +
> > + offset),
> >                                       &s->busses[i].mr);
> >       }
> >
> > diff --git a/include/hw/i2c/aspeed_i2c.h b/include/hw/i2c/aspeed_i2c.h
> > index 065b636d29..422ee0e298 100644
> > --- a/include/hw/i2c/aspeed_i2c.h
> > +++ b/include/hw/i2c/aspeed_i2c.h
> > @@ -275,6 +275,7 @@ struct AspeedI2CClass {
> >
> >       uint8_t num_busses;
> >       uint8_t reg_size;
> > +    uint32_t reg_gap_size;
> >       uint8_t gap;
> >       qemu_irq (*bus_get_irq)(AspeedI2CBus *);
> >

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Re: [PATCH v1 04/15] hw/i2c/aspeed: support discontinuous register memory region of I2C bus

Posted by Cédric Le Goater 2 months ago

On 7/18/24 11:44, Jamin Lin wrote:
> Hi Cedric,
> 
>> Subject: Re: [PATCH v1 04/15] hw/i2c/aspeed: support discontinuous register
>> memory region of I2C bus
>>
>> On 7/18/24 08:49, Jamin Lin wrote:
>>> It only support continuous register memory region for all I2C bus.
>>> However, the register address of all I2c bus are discontinuous for
>>> AST2700.
>>>
>>> Ex: the register address of I2C bus for ast2700 as following.
>>> 0x100 - 0x17F: Device 0
>>> 0x200 - 0x27F: Device 1
>>> 0x300 - 0x37F: Device 2
>>> 0x400 - 0x47F: Device 3
>>> 0x500 - 0x57F: Device 4
>>> 0x600 - 0x67F: Device 5
>>> 0x700 - 0x77F: Device 6
>>> 0x800 - 0x87F: Device 7
>>> 0x900 - 0x97F: Device 8
>>> 0xA00 - 0xA7F: Device 9
>>> 0xB00 - 0xB7F: Device 10
>>> 0xC00 - 0xC7F: Device 11
>>> 0xD00 - 0xD7F: Device 12
>>> 0xE00 - 0xE7F: Device 13
>>> 0xF00 – 0xF7F: Device 14
>>> 0x1000 – 0x107F: Device 15
>>>
>>> Introduce a new class attribute to make user set each I2C bus gap size.
>>> Update formula to create all I2C bus register memory regions.
>>
>> I don't think this is necessary to model. Could we simply increase tge register
>> MMIO size for the AST2700 bus model and rely on the memops to catch
>> invalid register offsets ?
>>
> Thanks for your review and suggestion.
> 
> Sorry, I am not very clearly understand your comments.
> Could you please describe it more detail?
> Thanks-Jamin

I don't think you need to introduce a gap size class attribute.

Setting :

     aic->reg_size = 0x100; /* size + gap */

in aspeed_2700_i2c_class_init() should be enough.

Thanks,

C.