From nobody Sat Jul 12 06:01:48 2025 Delivered-To: importer2@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=irq.a4lg.com ARC-Seal: i=1; a=rsa-sha256; t=1652583537; cv=none; d=zohomail.com; s=zohoarc; b=GIT3Yum9bPNAKH6g+RAyd8HtCR0Hp21Z8XEwGtJtyJrEy6syL6GPNKscNsF6qNf0G2DsTJj0zzBjDyD7oxik05rF20l65bWbem5BORrmnN6GDYS/jb3YyfE0CP11E1B5zy+BX5D3RGi4ivm/NISNxt4io5NFD5+KcPmnRqrusFk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1652583537; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=U1E5YcO6hbXuVriPUxUBmX2CdR0DFWEC40Vlm7seRbU=; b=NsRsi55fkXNpxoo0rw5pJDTQFg/j5v0GGqxf3z/9JrXTIC4vhlVTLOL5Wif2F7D2PzlR5EA4CbY7+9janmUpIq58W5fqIlb/Db5iITo/ZeJtl0qi1rKCmFkllLeCPD4ai5+s7xtsa9HQ+oeXDbMcd1beS7c+LYoDDmbWBs8FQdA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer2=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1652583537673659.5035664922498; Sat, 14 May 2022 19:58:57 -0700 (PDT) Received: from localhost ([::1]:54502 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nq4TA-0006KJ-MZ for importer2@patchew.org; Sat, 14 May 2022 22:58:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58200) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nq4R8-00047Q-Hs; Sat, 14 May 2022 22:56:50 -0400 Received: from mail-sender.a4lg.com ([153.120.152.154]:53432 helo=mail-sender-0.a4lg.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nq4R6-0005KW-RT; Sat, 14 May 2022 22:56:50 -0400 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id A4A03300089; Sun, 15 May 2022 02:56:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=irq.a4lg.com; s=2017s01; t=1652583406; bh=U1E5YcO6hbXuVriPUxUBmX2CdR0DFWEC40Vlm7seRbU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: Mime-Version:Content-Transfer-Encoding; b=NGknJdWsgnfzKaJaDv4wNRprgm9qgix6CwM0HG9Ipb+EVmEnFeiwDbcRQjPzrjrDg tZJ+SbbwVBwRYt74JvR7QS/jhWTpE/4hh/K7BwYpycyl46Z2XHQaHAlKJcCQQYB+8s QRZj5+2JG4z3/0JgmEi5n+Hh9YJmRhYF4tKLYrOo= From: Tsukasa OI To: Tsukasa OI , Alistair Francis , Frank Chang Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [PATCH v2 5/5] target/riscv: Move/refactor ISA extension checks Date: Sun, 15 May 2022 11:56:11 +0900 Message-Id: In-Reply-To: References: Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer2=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=153.120.152.154; envelope-from=research_trasio@irq.a4lg.com; helo=mail-sender-0.a4lg.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer2=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @irq.a4lg.com) X-ZM-MESSAGEID: 1652583539496100001 Content-Type: text/plain; charset="utf-8" We should separate "check" and "configure" steps as possible. This commit separates both steps except vector/Zfinx-related checks. Signed-off-by: Tsukasa OI Reviewed-by: Alistair Francis --- target/riscv/cpu.c | 31 ++++++++++++++++--------------- 1 file changed, 16 insertions(+), 15 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index f910a41407..5ab246bf63 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -630,14 +630,27 @@ static void riscv_cpu_realize(DeviceState *dev, Error= **errp) return; } =20 + if ((cpu->cfg.ext_zve32f || cpu->cfg.ext_zve64f) && !cpu->cfg.ext_= f) { + error_setg(errp, "Zve32f/Zve64f extensions require F extension= "); + return; + } + + /* Set the ISA extensions, checks should have happened above */ if (cpu->cfg.ext_zdinx || cpu->cfg.ext_zhinx || cpu->cfg.ext_zhinxmin) { cpu->cfg.ext_zfinx =3D true; } =20 - if (cpu->cfg.ext_zfinx && !cpu->cfg.ext_icsr) { - error_setg(errp, "Zfinx extension requires Zicsr"); - return; + if (cpu->cfg.ext_zfinx) { + if (!cpu->cfg.ext_icsr) { + error_setg(errp, "Zfinx extension requires Zicsr"); + return; + } + if (cpu->cfg.ext_f) { + error_setg(errp, + "Zfinx cannot be supported together with F extension"); + return; + } } =20 if (cpu->cfg.ext_zk) { @@ -663,7 +676,6 @@ static void riscv_cpu_realize(DeviceState *dev, Error *= *errp) cpu->cfg.ext_zksh =3D true; } =20 - /* Set the ISA extensions, checks should have happened above */ if (cpu->cfg.ext_i) { ext |=3D RVI; } @@ -734,20 +746,9 @@ static void riscv_cpu_realize(DeviceState *dev, Error = **errp) } set_vext_version(env, vext_version); } - if ((cpu->cfg.ext_zve32f || cpu->cfg.ext_zve64f) && !cpu->cfg.ext_= f) { - error_setg(errp, "Zve32f/Zve64f extension depends upon RVF."); - return; - } if (cpu->cfg.ext_j) { ext |=3D RVJ; } - if (cpu->cfg.ext_zfinx && ((ext & (RVF | RVD)) || cpu->cfg.ext_zfh= || - cpu->cfg.ext_zfhmin)) { - error_setg(errp, - "'Zfinx' cannot be supported together with 'F', 'D', '= Zfh'," - " 'Zfhmin'"); - return; - } =20 set_misa(env, env->misa_mxl, ext); } --=20 2.34.1