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a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : in-reply-to : references; s=corp-2022-7-12; bh=hQdDrXesDc+e7ZPl0QeAWbPDNFhn5J9buEdtGCyORsk=; b=AG4Ni7CEthJyfI8bWLU8shlJxSwudqeAq9H9k3zkGdX5KX3UhUZFa69zLY7u6wRSz56K YhAVjLkxPPwPw+cl1KjFWWd0yGCNBRfrtq8iXv7UN7v+fXpPzgsSuSjkn96a85TPSR+0 7BLrbLHILiv+nF7dISJTSQ+gU7yJU8acsoS2REDEh2wD0zspM0VJWHWNmCgzViSeFRYF AInz7kXGXfivcYZk6RCjW5aHYkyNHHDiDxNndOkOPeRKGB0J8GL80o54JCpyKwUdOBfH GPGmoFQquw7TMol5xAsxYxwPT1B7phUztEkEMfQnyJ7fV4pRBCTbFMR9G8EZ5pF4GGiK 4g== From: John Johnson To: qemu-devel@nongnu.org Cc: alex.williamson@redhat.com, clg@redhat.com, philmd@linaro.org Subject: [PATCH v2 02/23] vfio-user: add VFIO base abstract class Date: Wed, 1 Feb 2023 21:55:38 -0800 Message-Id: X-Mailer: git-send-email 1.8.3.1 In-Reply-To: References: In-Reply-To: References: X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-02-01_15,2023-01-31_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 spamscore=0 phishscore=0 malwarescore=0 adultscore=0 bulkscore=0 mlxscore=0 mlxlogscore=999 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2302020053 X-Proofpoint-ORIG-GUID: FopPxtlZcfdZ78UIQN1ew5GTxIxXzLYj X-Proofpoint-GUID: FopPxtlZcfdZ78UIQN1ew5GTxIxXzLYj Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" Add an abstract base class both the kernel driver and user socket implementations can use to share code. Signed-off-by: John G Johnson Signed-off-by: Elena Ufimtseva Signed-off-by: Jagannathan Raman --- hw/vfio/pci.h | 16 +++++++-- hw/vfio/pci.c | 106 +++++++++++++++++++++++++++++++++++-------------------= ---- 2 files changed, 78 insertions(+), 44 deletions(-) diff --git a/hw/vfio/pci.h b/hw/vfio/pci.h index 7c236a5..7fb656c 100644 --- a/hw/vfio/pci.h +++ b/hw/vfio/pci.h @@ -115,8 +115,13 @@ typedef struct VFIOMSIXInfo { unsigned long *pending; } VFIOMSIXInfo; =20 -#define TYPE_VFIO_PCI "vfio-pci" -OBJECT_DECLARE_SIMPLE_TYPE(VFIOPCIDevice, VFIO_PCI) +/* + * TYPE_VFIO_PCI_BASE is an abstract type used to share code + * between VFIO implementations that use a kernel driver + * with those that use user sockets. + */ +#define TYPE_VFIO_PCI_BASE "vfio-pci-base" +OBJECT_DECLARE_SIMPLE_TYPE(VFIOPCIDevice, VFIO_PCI_BASE) =20 struct VFIOPCIDevice { PCIDevice pdev; @@ -177,6 +182,13 @@ struct VFIOPCIDevice { Notifier irqchip_change_notifier; }; =20 +#define TYPE_VFIO_PCI "vfio-pci" +OBJECT_DECLARE_SIMPLE_TYPE(VFIOKernelPCIDevice, VFIO_PCI) + +struct VFIOKernelPCIDevice { + VFIOPCIDevice device; +}; + /* Use uin32_t for vendor & device so PCI_ANY_ID expands and cannot match = hw */ static inline bool vfio_pci_is(VFIOPCIDevice *vdev, uint32_t vendor, uint3= 2_t device) { diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index 939dcc3..9d70114 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -235,7 +235,7 @@ static void vfio_intx_update(VFIOPCIDevice *vdev, PCIIN= TxRoute *route) =20 static void vfio_intx_routing_notifier(PCIDevice *pdev) { - VFIOPCIDevice *vdev =3D VFIO_PCI(pdev); + VFIOPCIDevice *vdev =3D VFIO_PCI_BASE(pdev); PCIINTxRoute route; =20 if (vdev->interrupt !=3D VFIO_INT_INTx) { @@ -467,7 +467,7 @@ static void vfio_update_kvm_msi_virq(VFIOMSIVector *vec= tor, MSIMessage msg, static int vfio_msix_vector_do_use(PCIDevice *pdev, unsigned int nr, MSIMessage *msg, IOHandler *handler) { - VFIOPCIDevice *vdev =3D VFIO_PCI(pdev); + VFIOPCIDevice *vdev =3D VFIO_PCI_BASE(pdev); VFIOMSIVector *vector; int ret; =20 @@ -561,7 +561,7 @@ static int vfio_msix_vector_use(PCIDevice *pdev, =20 static void vfio_msix_vector_release(PCIDevice *pdev, unsigned int nr) { - VFIOPCIDevice *vdev =3D VFIO_PCI(pdev); + VFIOPCIDevice *vdev =3D VFIO_PCI_BASE(pdev); VFIOMSIVector *vector =3D &vdev->msi_vectors[nr]; =20 trace_vfio_msix_vector_release(vdev->vbasedev.name, nr); @@ -1109,7 +1109,7 @@ static const MemoryRegionOps vfio_vga_ops =3D { */ static void vfio_sub_page_bar_update_mapping(PCIDevice *pdev, int bar) { - VFIOPCIDevice *vdev =3D VFIO_PCI(pdev); + VFIOPCIDevice *vdev =3D VFIO_PCI_BASE(pdev); VFIORegion *region =3D &vdev->bars[bar].region; MemoryRegion *mmap_mr, *region_mr, *base_mr; PCIIORegion *r; @@ -1155,7 +1155,7 @@ static void vfio_sub_page_bar_update_mapping(PCIDevic= e *pdev, int bar) */ uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len) { - VFIOPCIDevice *vdev =3D VFIO_PCI(pdev); + VFIOPCIDevice *vdev =3D VFIO_PCI_BASE(pdev); uint32_t emu_bits =3D 0, emu_val =3D 0, phys_val =3D 0, val; =20 memcpy(&emu_bits, vdev->emulated_config_bits + addr, len); @@ -1188,7 +1188,7 @@ uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32= _t addr, int len) void vfio_pci_write_config(PCIDevice *pdev, uint32_t addr, uint32_t val, int len) { - VFIOPCIDevice *vdev =3D VFIO_PCI(pdev); + VFIOPCIDevice *vdev =3D VFIO_PCI_BASE(pdev); uint32_t val_le =3D cpu_to_le32(val); =20 trace_vfio_pci_write_config(vdev->vbasedev.name, addr, val, len); @@ -2845,7 +2845,7 @@ static void vfio_unregister_req_notifier(VFIOPCIDevic= e *vdev) =20 static void vfio_realize(PCIDevice *pdev, Error **errp) { - VFIOPCIDevice *vdev =3D VFIO_PCI(pdev); + VFIOPCIDevice *vdev =3D VFIO_PCI_BASE(pdev); VFIODevice *vbasedev =3D &vdev->vbasedev; VFIODevice *vbasedev_iter; VFIOGroup *group; @@ -3169,7 +3169,7 @@ error: =20 static void vfio_instance_finalize(Object *obj) { - VFIOPCIDevice *vdev =3D VFIO_PCI(obj); + VFIOPCIDevice *vdev =3D VFIO_PCI_BASE(obj); VFIOGroup *group =3D vdev->vbasedev.group; =20 vfio_display_finalize(vdev); @@ -3189,7 +3189,7 @@ static void vfio_instance_finalize(Object *obj) =20 static void vfio_exitfn(PCIDevice *pdev) { - VFIOPCIDevice *vdev =3D VFIO_PCI(pdev); + VFIOPCIDevice *vdev =3D VFIO_PCI_BASE(pdev); =20 vfio_unregister_req_notifier(vdev); vfio_unregister_err_notifier(vdev); @@ -3208,7 +3208,7 @@ static void vfio_exitfn(PCIDevice *pdev) =20 static void vfio_pci_reset(DeviceState *dev) { - VFIOPCIDevice *vdev =3D VFIO_PCI(dev); + VFIOPCIDevice *vdev =3D VFIO_PCI_BASE(dev); =20 trace_vfio_pci_reset(vdev->vbasedev.name); =20 @@ -3248,7 +3248,7 @@ post_reset: static void vfio_instance_init(Object *obj) { PCIDevice *pci_dev =3D PCI_DEVICE(obj); - VFIOPCIDevice *vdev =3D VFIO_PCI(obj); + VFIOPCIDevice *vdev =3D VFIO_PCI_BASE(obj); =20 device_add_bootindex_property(obj, &vdev->bootindex, "bootindex", NULL, @@ -3265,24 +3265,12 @@ static void vfio_instance_init(Object *obj) pci_dev->cap_present |=3D QEMU_PCI_CAP_EXPRESS; } =20 -static Property vfio_pci_dev_properties[] =3D { - DEFINE_PROP_PCI_HOST_DEVADDR("host", VFIOPCIDevice, host), - DEFINE_PROP_STRING("sysfsdev", VFIOPCIDevice, vbasedev.sysfsdev), +static Property vfio_pci_base_dev_properties[] =3D { DEFINE_PROP_ON_OFF_AUTO("x-pre-copy-dirty-page-tracking", VFIOPCIDevic= e, vbasedev.pre_copy_dirty_page_tracking, ON_OFF_AUTO_ON), - DEFINE_PROP_ON_OFF_AUTO("display", VFIOPCIDevice, - display, ON_OFF_AUTO_OFF), - DEFINE_PROP_UINT32("xres", VFIOPCIDevice, display_xres, 0), - DEFINE_PROP_UINT32("yres", VFIOPCIDevice, display_yres, 0), DEFINE_PROP_UINT32("x-intx-mmap-timeout-ms", VFIOPCIDevice, intx.mmap_timeout, 1100), - DEFINE_PROP_BIT("x-vga", VFIOPCIDevice, features, - VFIO_FEATURE_ENABLE_VGA_BIT, false), - DEFINE_PROP_BIT("x-req", VFIOPCIDevice, features, - VFIO_FEATURE_ENABLE_REQ_BIT, true), - DEFINE_PROP_BIT("x-igd-opregion", VFIOPCIDevice, features, - VFIO_FEATURE_ENABLE_IGD_OPREGION_BIT, false), DEFINE_PROP_BOOL("x-enable-migration", VFIOPCIDevice, vbasedev.enable_migration, false), DEFINE_PROP_BOOL("x-no-mmap", VFIOPCIDevice, vbasedev.no_mmap, false), @@ -3291,8 +3279,6 @@ static Property vfio_pci_dev_properties[] =3D { DEFINE_PROP_BOOL("x-no-kvm-intx", VFIOPCIDevice, no_kvm_intx, false), DEFINE_PROP_BOOL("x-no-kvm-msi", VFIOPCIDevice, no_kvm_msi, false), DEFINE_PROP_BOOL("x-no-kvm-msix", VFIOPCIDevice, no_kvm_msix, false), - DEFINE_PROP_BOOL("x-no-geforce-quirks", VFIOPCIDevice, - no_geforce_quirks, false), DEFINE_PROP_BOOL("x-no-kvm-ioeventfd", VFIOPCIDevice, no_kvm_ioeventfd, false), DEFINE_PROP_BOOL("x-no-vfio-ioeventfd", VFIOPCIDevice, no_vfio_ioevent= fd, @@ -3303,10 +3289,6 @@ static Property vfio_pci_dev_properties[] =3D { sub_vendor_id, PCI_ANY_ID), DEFINE_PROP_UINT32("x-pci-sub-device-id", VFIOPCIDevice, sub_device_id, PCI_ANY_ID), - DEFINE_PROP_UINT32("x-igd-gms", VFIOPCIDevice, igd_gms, 0), - DEFINE_PROP_UNSIGNED_NODEFAULT("x-nv-gpudirect-clique", VFIOPCIDevice, - nv_gpudirect_clique, - qdev_prop_nv_gpudirect_clique, uint8_t), DEFINE_PROP_OFF_AUTO_PCIBAR("x-msix-relocation", VFIOPCIDevice, msix_r= elo, OFF_AUTOPCIBAR_OFF), /* @@ -3317,28 +3299,25 @@ static Property vfio_pci_dev_properties[] =3D { DEFINE_PROP_END_OF_LIST(), }; =20 -static void vfio_pci_dev_class_init(ObjectClass *klass, void *data) +static void vfio_pci_base_dev_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); PCIDeviceClass *pdc =3D PCI_DEVICE_CLASS(klass); =20 - dc->reset =3D vfio_pci_reset; - device_class_set_props(dc, vfio_pci_dev_properties); - dc->desc =3D "VFIO-based PCI device assignment"; + device_class_set_props(dc, vfio_pci_base_dev_properties); + dc->desc =3D "VFIO PCI base device"; set_bit(DEVICE_CATEGORY_MISC, dc->categories); - pdc->realize =3D vfio_realize; pdc->exit =3D vfio_exitfn; pdc->config_read =3D vfio_pci_read_config; pdc->config_write =3D vfio_pci_write_config; } =20 -static const TypeInfo vfio_pci_dev_info =3D { - .name =3D TYPE_VFIO_PCI, +static const TypeInfo vfio_pci_base_dev_info =3D { + .name =3D TYPE_VFIO_PCI_BASE, .parent =3D TYPE_PCI_DEVICE, - .instance_size =3D sizeof(VFIOPCIDevice), - .class_init =3D vfio_pci_dev_class_init, - .instance_init =3D vfio_instance_init, - .instance_finalize =3D vfio_instance_finalize, + .instance_size =3D 0, + .abstract =3D true, + .class_init =3D vfio_pci_base_dev_class_init, .interfaces =3D (InterfaceInfo[]) { { INTERFACE_PCIE_DEVICE }, { INTERFACE_CONVENTIONAL_PCI_DEVICE }, @@ -3346,6 +3325,48 @@ static const TypeInfo vfio_pci_dev_info =3D { }, }; =20 +static Property vfio_pci_dev_properties[] =3D { + DEFINE_PROP_PCI_HOST_DEVADDR("host", VFIOPCIDevice, host), + DEFINE_PROP_STRING("sysfsdev", VFIOPCIDevice, vbasedev.sysfsdev), + DEFINE_PROP_ON_OFF_AUTO("display", VFIOPCIDevice, + display, ON_OFF_AUTO_OFF), + DEFINE_PROP_UINT32("xres", VFIOPCIDevice, display_xres, 0), + DEFINE_PROP_UINT32("yres", VFIOPCIDevice, display_yres, 0), + DEFINE_PROP_BIT("x-vga", VFIOPCIDevice, features, + VFIO_FEATURE_ENABLE_VGA_BIT, false), + DEFINE_PROP_BIT("x-req", VFIOPCIDevice, features, + VFIO_FEATURE_ENABLE_REQ_BIT, true), + DEFINE_PROP_BIT("x-igd-opregion", VFIOPCIDevice, features, + VFIO_FEATURE_ENABLE_IGD_OPREGION_BIT, false), + DEFINE_PROP_BOOL("x-no-geforce-quirks", VFIOPCIDevice, + no_geforce_quirks, false), + DEFINE_PROP_UINT32("x-igd-gms", VFIOPCIDevice, igd_gms, 0), + DEFINE_PROP_UNSIGNED_NODEFAULT("x-nv-gpudirect-clique", VFIOPCIDevice, + nv_gpudirect_clique, + qdev_prop_nv_gpudirect_clique, uint8_t), + DEFINE_PROP_END_OF_LIST(), +}; + +static void vfio_pci_dev_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + PCIDeviceClass *pdc =3D PCI_DEVICE_CLASS(klass); + + dc->reset =3D vfio_pci_reset; + device_class_set_props(dc, vfio_pci_dev_properties); + dc->desc =3D "VFIO-based PCI device assignment"; + pdc->realize =3D vfio_realize; +} + +static const TypeInfo vfio_pci_dev_info =3D { + .name =3D TYPE_VFIO_PCI, + .parent =3D TYPE_VFIO_PCI_BASE, + .instance_size =3D sizeof(VFIOKernelPCIDevice), + .class_init =3D vfio_pci_dev_class_init, + .instance_init =3D vfio_instance_init, + .instance_finalize =3D vfio_instance_finalize, +}; + static Property vfio_pci_dev_nohotplug_properties[] =3D { DEFINE_PROP_BOOL("ramfb", VFIOPCIDevice, enable_ramfb, false), DEFINE_PROP_END_OF_LIST(), @@ -3362,12 +3383,13 @@ static void vfio_pci_nohotplug_dev_class_init(Objec= tClass *klass, void *data) static const TypeInfo vfio_pci_nohotplug_dev_info =3D { .name =3D TYPE_VFIO_PCI_NOHOTPLUG, .parent =3D TYPE_VFIO_PCI, - .instance_size =3D sizeof(VFIOPCIDevice), + .instance_size =3D sizeof(VFIOKernelPCIDevice), .class_init =3D vfio_pci_nohotplug_dev_class_init, }; =20 static void register_vfio_pci_dev_type(void) { + type_register_static(&vfio_pci_base_dev_info); type_register_static(&vfio_pci_dev_info); type_register_static(&vfio_pci_nohotplug_dev_info); } --=20 1.9.4