[v1] Allow RedHat PCI bridges reserve more buses than necessary during init

[SeaBIOS] [RFC PATCH 2/2] pci: enable RedHat pci bridges to reserve more buses

Posted by Aleksandr Bezzubikov 8 years, 6 months ago

In case of RedHat PCI bridges reserve additional buses, which number is provided
in a vendor-specific capability.

Signed-off-by: Aleksandr Bezzubikov <zuban32s@gmail.com>
---
 src/fw/pciinit.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c
index 08221e6..b6f3a01 100644
--- a/src/fw/pciinit.c
+++ b/src/fw/pciinit.c
@@ -578,9 +578,17 @@ pci_bios_init_bus_rec(int bus, u8 *pci_bus)
         pci_bios_init_bus_rec(secbus, pci_bus);
 
         if (subbus != *pci_bus) {
+            u16 vendor = pci_config_readw(bdf, PCI_VENDOR_ID);
+            u8 res_bus = 0;
+            if (vendor == 0x1b36) {
+                u8 cap = pci_find_capability_bdf(bdf, PCI_CAP_ID_VNDR, 0);
+                if (cap) {
+                    res_bus = pci_config_readb(bdf, cap + 16);
+                }
+            }
             dprintf(1, "PCI: subordinate bus = 0x%x -> 0x%x\n",
-                    subbus, *pci_bus);
-            subbus = *pci_bus;
+                    subbus, *pci_bus + res_bus);
+            subbus = *pci_bus + res_bus;
         } else {
             dprintf(1, "PCI: subordinate bus = 0x%x\n", subbus);
         }
-- 
2.7.4


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Re: [SeaBIOS] [Qemu-devel] [RFC PATCH 2/2] pci: enable RedHat pci bridges to reserve more buses

Posted by Konrad Rzeszutek Wilk 8 years, 6 months ago

On Wed, Jul 19, 2017 at 04:20:14PM +0300, Aleksandr Bezzubikov wrote:
> In case of RedHat PCI bridges reserve additional buses, which number is provided

It is "Red Hat"
> in a vendor-specific capability.

And perhaps also a #define ?
> 
> Signed-off-by: Aleksandr Bezzubikov <zuban32s@gmail.com>
> ---
>  src/fw/pciinit.c | 12 ++++++++++--
>  1 file changed, 10 insertions(+), 2 deletions(-)
> 
> diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c
> index 08221e6..b6f3a01 100644
> --- a/src/fw/pciinit.c
> +++ b/src/fw/pciinit.c
> @@ -578,9 +578,17 @@ pci_bios_init_bus_rec(int bus, u8 *pci_bus)
>          pci_bios_init_bus_rec(secbus, pci_bus);
>  
>          if (subbus != *pci_bus) {
> +            u16 vendor = pci_config_readw(bdf, PCI_VENDOR_ID);
> +            u8 res_bus = 0;
> +            if (vendor == 0x1b36) {
> +                u8 cap = pci_find_capability_bdf(bdf, PCI_CAP_ID_VNDR, 0);
> +                if (cap) {
> +                    res_bus = pci_config_readb(bdf, cap + 16);
> +                }
> +            }
>              dprintf(1, "PCI: subordinate bus = 0x%x -> 0x%x\n",
> -                    subbus, *pci_bus);
> -            subbus = *pci_bus;
> +                    subbus, *pci_bus + res_bus);
> +            subbus = *pci_bus + res_bus;
>          } else {
>              dprintf(1, "PCI: subordinate bus = 0x%x\n", subbus);
>          }
> -- 
> 2.7.4
> 
> 

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Re: [SeaBIOS] [Qemu-devel] [RFC PATCH 2/2] pci: enable RedHat pci bridges to reserve more buses

Posted by Marcel Apfelbaum 8 years, 6 months ago

On 19/07/2017 16:56, Konrad Rzeszutek Wilk wrote:
> On Wed, Jul 19, 2017 at 04:20:14PM +0300, Aleksandr Bezzubikov wrote:
>> In case of RedHat PCI bridges reserve additional buses, which number is provided
> 
> It is "Red Hat"
>> in a vendor-specific capability.
> 
> And perhaps also a #define ?

Right, please add it to src/hw/pci_ids.h.

Thanks,
Marcel


>>
>> Signed-off-by: Aleksandr Bezzubikov <zuban32s@gmail.com>
>> ---
>>   src/fw/pciinit.c | 12 ++++++++++--
>>   1 file changed, 10 insertions(+), 2 deletions(-)
>>
>> diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c
>> index 08221e6..b6f3a01 100644
>> --- a/src/fw/pciinit.c
>> +++ b/src/fw/pciinit.c
>> @@ -578,9 +578,17 @@ pci_bios_init_bus_rec(int bus, u8 *pci_bus)
>>           pci_bios_init_bus_rec(secbus, pci_bus);
>>   
>>           if (subbus != *pci_bus) {
>> +            u16 vendor = pci_config_readw(bdf, PCI_VENDOR_ID);
>> +            u8 res_bus = 0;
>> +            if (vendor == 0x1b36) {
>> +                u8 cap = pci_find_capability_bdf(bdf, PCI_CAP_ID_VNDR, 0);
>> +                if (cap) {
>> +                    res_bus = pci_config_readb(bdf, cap + 16);
>> +                }
>> +            }
>>               dprintf(1, "PCI: subordinate bus = 0x%x -> 0x%x\n",
>> -                    subbus, *pci_bus);
>> -            subbus = *pci_bus;
>> +                    subbus, *pci_bus + res_bus);
>> +            subbus = *pci_bus + res_bus;
>>           } else {
>>               dprintf(1, "PCI: subordinate bus = 0x%x\n", subbus);
>>           }
>> -- 
>> 2.7.4
>>
>>


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