From nobody Sat May 10 07:08:16 2025 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 80.81.252.135 is neither permitted nor denied by domain of seabios.org) client-ip=80.81.252.135; envelope-from=seabios-bounces@seabios.org; helo=mail.coreboot.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 80.81.252.135 is neither permitted nor denied by domain of seabios.org) smtp.mailfrom=seabios-bounces@seabios.org Return-Path: Received: from mail.coreboot.org (mail.coreboot.org [80.81.252.135]) by mx.zohomail.com with SMTPS id 1500761565615887.6131186080312; Sat, 22 Jul 2017 15:12:45 -0700 (PDT) Received: from [127.0.0.1] (helo=ra.coresystems.de) by mail.coreboot.org with esmtp (Exim 4.86_2) (envelope-from ) id 1dZ2bW-0007wO-Vz; Sun, 23 Jul 2017 00:10:31 +0200 Received: from mail-lf0-f68.google.com ([209.85.215.68]) by mail.coreboot.org with esmtps (TLSv1.2:ECDHE-RSA-AES128-GCM-SHA256:128) (Exim 4.86_2) (envelope-from ) id 1dZ2bI-0007sm-QZ for seabios@seabios.org; Sun, 23 Jul 2017 00:10:29 +0200 Received: by mail-lf0-f68.google.com with SMTP id y15so1358922lfd.5 for ; Sat, 22 Jul 2017 15:12:16 -0700 (PDT) Received: from localhost.localdomain (broadband-178-140-16-138.moscow.rt.ru. [178.140.16.138]) by smtp.gmail.com with ESMTPSA id s134sm1604053lfe.27.2017.07.22.15.12.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 22 Jul 2017 15:12:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=kgpcWRrTDr4w12raFy9LS/RpFay1P3HV9A18dm6OKrU=; b=rvgX9rd2RW2C7e9I6Ya+C0/+RgDAmnC6VLRGhTbm/H0pQa/vyTLlhfyDm9VMIz8Krl UQxa97GGFrH30i96onLHMoj1Gh1ZycgMDnQG8HT8rowOE0OQGvOcaGdP587JSSFtnLEg wxDlJW/TfLYJXLW1fRbbuuAiZYaagbKwnQJP79vYGsssQbw4+1pk5vO6kM0+Q8KsPXt6 5vnzm9W4p9ZxV6Hu7NjTA5RS4erqCzw2OmNSistGVn60PCtjO7cuCq1/pmtsvTWpJs+v XhscHBMXRKQMgYT2rlwlNLjIiYo2C1g3DhtuNBTtoQoH8zWuqOyNs+h3GLmLTg66o1Au V4Eg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=kgpcWRrTDr4w12raFy9LS/RpFay1P3HV9A18dm6OKrU=; b=GKDS25lrJa8fl+ULvHsQ+j69LJYUQwyAnmlQj1paWFw5USdUPFYR2r2w61qCu8LpaK ddB7AgoNsxGVSN8bY4oO2jtqvr8TDnLukPjaZTGpBJc7OYiLAZ/hShAVRmZOiemC8Efb X62qYUNhCjIAOnJupDkjSzBTv7fsp3KSHo80yt/BTqEm56sr1G9HrLsjAsVUxNEEQ7ht QlyG/H1ijMoL64MQR2ja1+6ytQ2tHVfNEgrxFll7311kNx0NN6/Kzz9yfnMauflfeYCc LRje3Jx1ko32qmeNb73uk4PeT2lFrjCeW1IhfwJkpuNqEB0AAPABOLQruV5eoQvsElFO w1bQ== X-Gm-Message-State: AIVw113GEFwZxAmpkTcGHeZGlQR5Qyt0sDKkqHDZI0Tt/nUsNdYBWCmz cZYgJiOlNMqxi0ZonF0= X-Received: by 10.46.33.214 with SMTP id h83mr3698738lji.75.1500761534959; Sat, 22 Jul 2017 15:12:14 -0700 (PDT) From: Aleksandr Bezzubikov To: seabios@seabios.org Date: Sun, 23 Jul 2017 01:11:49 +0300 Message-Id: <1500761510-1556-4-git-send-email-zuban32s@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1500761510-1556-1-git-send-email-zuban32s@gmail.com> References: <1500761510-1556-1-git-send-email-zuban32s@gmail.com> X-Spam-Score: -3.5 (---) Subject: [SeaBIOS] [RFC PATCH v2 3/4] pci: add QEMU-specific PCI capability structure X-BeenThere: seabios@seabios.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: SeaBIOS mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: konrad.wilk@oracle.com, mst@redhat.com, qemu-devel@nongnu.org, kraxel@redhat.com, marcel@redhat.com, lersek@redhat.com MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: seabios-bounces@seabios.org Sender: "SeaBIOS" X-Duff: Orig. Duff, Duff Lite, Duff Dry, Duff Dark, Raspberry Duff, Lady Duff, Red Duff, Tartar Control Duff X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" On PCI init PCI bridge devices may need some extra info about bus number to reserve, IO, memory and prefetchable memory limits. QEMU can provide this with special vendor-specific PCI capability. This capability is intended to be used only for Red Hat PCI bridges, i.e. QEMU cooperation. Sizes of limits match ones from=20 PCI Type 1 Configuration Space Header, number of buses to reserve occupies only 1 byte=20 since it is the size of Subordinate Bus Number register. Signed-off-by: Aleksandr Bezzubikov --- src/hw/pci_cap.h | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 src/hw/pci_cap.h diff --git a/src/hw/pci_cap.h b/src/hw/pci_cap.h new file mode 100644 index 0000000..1382b0b --- /dev/null +++ b/src/hw/pci_cap.h @@ -0,0 +1,23 @@ +#ifndef _PCI_CAP_H +#define _PCI_CAP_H + +#include "types.h" + +struct vendor_pci_cap { + u8 id; + u8 next; + u8 len; +}; + +struct redhat_pci_bridge_cap { + struct vendor_pci_cap hdr; + u8 bus_res; + u32 pref_lim_upper; + u16 pref_lim; + u16 mem_lim; + u16 io_lim_upper; + u8 io_lim; + u8 padd; +}; + +#endif /* _PCI_CAP_H */ --=20 2.7.4 _______________________________________________ SeaBIOS mailing list SeaBIOS@seabios.org https://mail.coreboot.org/mailman/listinfo/seabios