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[178.140.16.138]) by smtp.gmail.com with ESMTPSA id t10sm757832lja.47.2017.07.22.15.16.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 22 Jul 2017 15:16:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=CmC0ZrzbdJ6lPaeasTTJvLBJ0ACZREUz5pMUAmIHDtg=; b=E7d/Flxr3VYf4kSKrTBtRuq9xLMQI7ZECmdXy1wHP4SBqgl8MwNxSwOXFlzQde2iga u3Z0G0fV9KBzNdDsW5ptIYXP4QrlJHOfpsRNDZlepHMUh4Vxou7gyhb16JjR0vQZKVVs StV26ZpSv9woKy1mjR0O9/tHxTFvSZ5eLsvg2g4IP+NVpbzJsp1mVSVnh0BqdwrvOpwB MEx+hGajaVoNW8fgvl01vW/SJuWG6EI172VkquI8jLjcdp1h7gKaWWVrsjU7EQWi/xZQ SMllf6BNiggvFafup7xJgBxU4QCfl+odP89HBpDHO/Xv+AUz7czxOAh5gu1H2D6U8aKN KqtQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=CmC0ZrzbdJ6lPaeasTTJvLBJ0ACZREUz5pMUAmIHDtg=; b=Apj17gDHgeFPDfxLWTlhSQbN0H+AH8zLU/oYLACWE0CAYVcQXDuKh5KYoXVvPE1+TD eKMTcq7vwGX3sHIww3a6/D5UnVaSnbP46ATTdLv3L/GWG/d5fIgw0SmAScpTH/UB6ECV VVWSUY1oSTy2lXrASkoB9pQLcecx/JNwV9sCSjNZ9Z1obmxxhZ4S91TQ7R6KwjXO9Fus /xZTm1a2qSCVsmwlndHov9Fr1fQN41gobhbd1kXgoKpQ8rKlRPlqu1WxhWSuxEdvyoiF Aj7Y2Xj1E4zjX2PEpbMpW0cPUihe/kFVdHB8uWyOsqEieV4rW5pAwvKhkdt/okkrCAHd 8KSQ== X-Gm-Message-State: AIVw1105ZA1IckImgIDUhkEf7wAb5tz5RjJPPQvvfSU4ZlmCHFLYk+s2 XinnARqOnDRw5A== X-Received: by 10.25.190.83 with SMTP id o80mr3204656lff.87.1500761765859; Sat, 22 Jul 2017 15:16:05 -0700 (PDT) From: Aleksandr Bezzubikov To: qemu-devel@nongnu.org Date: Sun, 23 Jul 2017 01:15:42 +0300 Message-Id: <1500761743-1669-6-git-send-email-zuban32s@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1500761743-1669-1-git-send-email-zuban32s@gmail.com> References: <1500761743-1669-1-git-send-email-zuban32s@gmail.com> X-Spam-Score: -2.6 (--) Subject: [SeaBIOS] [RFC PATCH v2 5/6] hw/pci: add bus_reserve property to pcie-root-port X-BeenThere: seabios@seabios.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: SeaBIOS mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mst@redhat.com, seabios@seabios.org, kraxel@redhat.com, pbonzini@redhat.com, marcel@redhat.com, rth@twiddle.net MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: seabios-bounces@seabios.org Sender: "SeaBIOS" X-Duff: Orig. Duff, Duff Lite, Duff Dry, Duff Dark, Raspberry Duff, Lady Duff, Red Duff, Tartar Control Duff X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" To enable hotplugging of a newly created pcie-pci-bridge, we need to tell firmware (SeaBIOS in this case) to reserve additional buses for pcie-root-port, that allows us to=20 hotplug pcie-pci-bridge into this root port. The number of buses to reserve is provided to the device via a corresponding property, and to the firmware via new PCI capability (next patch). The property's default value is 1 as we want to hotplug at least 1 bridge. Signed-off-by: Aleksandr Bezzubikov --- hw/pci-bridge/pcie_root_port.c | 1 + include/hw/pci/pcie_port.h | 3 +++ 2 files changed, 4 insertions(+) diff --git a/hw/pci-bridge/pcie_root_port.c b/hw/pci-bridge/pcie_root_port.c index 4d588cb..b0e49e1 100644 --- a/hw/pci-bridge/pcie_root_port.c +++ b/hw/pci-bridge/pcie_root_port.c @@ -137,6 +137,7 @@ static void rp_exit(PCIDevice *d) static Property rp_props[] =3D { DEFINE_PROP_BIT(COMPAT_PROP_PCP, PCIDevice, cap_present, QEMU_PCIE_SLTCAP_PCP_BITNR, true), + DEFINE_PROP_UINT8("bus_reserve", PCIEPort, bus_reserve, 1), DEFINE_PROP_END_OF_LIST() }; =20 diff --git a/include/hw/pci/pcie_port.h b/include/hw/pci/pcie_port.h index 1333266..1b2dd1f 100644 --- a/include/hw/pci/pcie_port.h +++ b/include/hw/pci/pcie_port.h @@ -34,6 +34,9 @@ struct PCIEPort { =20 /* pci express switch port */ uint8_t port; + + /* additional buses to reserve on firmware init */ + uint8_t bus_reserve; }; =20 void pcie_port_init_reg(PCIDevice *d); --=20 2.7.4 _______________________________________________ SeaBIOS mailing list SeaBIOS@seabios.org https://mail.coreboot.org/mailman/listinfo/seabios