From nobody Sat May 10 07:06:14 2025 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 80.81.252.135 is neither permitted nor denied by domain of seabios.org) client-ip=80.81.252.135; envelope-from=seabios-bounces@seabios.org; helo=mail.coreboot.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 80.81.252.135 is neither permitted nor denied by domain of seabios.org) smtp.mailfrom=seabios-bounces@seabios.org Return-Path: Received: from mail.coreboot.org (mail.coreboot.org [80.81.252.135]) by mx.zohomail.com with SMTPS id 1501284917976452.6195846401548; Fri, 28 Jul 2017 16:35:17 -0700 (PDT) Received: from [127.0.0.1] (helo=ra.coresystems.de) by mail.coreboot.org with esmtp (Exim 4.86_2) (envelope-from ) id 1dbEka-0006Ei-7o; Sat, 29 Jul 2017 01:32:56 +0200 Received: from mail-lf0-f68.google.com ([209.85.215.68]) by mail.coreboot.org with esmtps (TLSv1.2:ECDHE-RSA-AES128-GCM-SHA256:128) (Exim 4.86_2) (envelope-from ) id 1dbEkJ-00069i-Pc for seabios@seabios.org; Sat, 29 Jul 2017 01:32:55 +0200 Received: by mail-lf0-f68.google.com with SMTP id d80so9434305lfg.1 for ; Fri, 28 Jul 2017 16:34:49 -0700 (PDT) Received: from localhost.localdomain (broadband-95-84-133-8.moscow.rt.ru. [95.84.133.8]) by smtp.gmail.com with ESMTPSA id s133sm2579116lfs.4.2017.07.28.16.34.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 28 Jul 2017 16:34:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=1vO4FxwTEHDhowPCQrmcc8dCS7kl3aSjIIdcQq23MLs=; b=UhC6imfW5lNDmvh3/hRV+G+Ypk1q8Y9ZAd2k6pSGLMI+R8P1WzJ+ArNQ/A8b/I9gXB tZnzWQ9RnYAwFi0hTgCM63QgEHpSW+X2y7x4/4L4rxtHR7hFRwLm3cQ802Uad274BqO+ uS+4EpQYvYuJEKiaHl2U1/WDxOdFdnYHyomn+WWps4OUltOzKTqIuz/yFFfaGEmrqbBj TEo4JRctNIPdBlriRIDvX8PPWFqssylmSRt+6xeWuaX/IBnDuyZjlV8/kN4JEJUy9OMI K/KjbGgSr7SPsSOgTBOeg7sl573NuMRa9a7X8lN3FWQ2s/lXwE5Wr60MJM8/gMhbX5HU yynA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=1vO4FxwTEHDhowPCQrmcc8dCS7kl3aSjIIdcQq23MLs=; b=e5REFXAQ68DUcAxcj6wC2A5Rd8byJ0fnIVi2dWlcxrNUYC0bvHqYzwc0HwKjAFhGIv xizBKaFeJFx20OTtf4BItefswqkk84SKsioO0zuewlyTdyl7NARCqJKCzyCnRKXWFqux 1Rz4MZK7DbOSKl7myBvq99Up/wm/vAs+1/+tM0frJ7c0YOaYtvPZJX5QdkCBfaYAk4Bo Lc8xScUdHuQQbL6wmeYjq86THowgEyHroLEmsAEDubwo/HsUotV+PS6MzokQ89U0K1Q2 bnJf7xJ9q5M5iJh35UGZ79/sZO+bwRNYw0UcKUJtdSL1BP97mzWtUWTyzN7Z3Nka9VsK cccw== X-Gm-Message-State: AIVw11370Nqo0frJY9Z4QMlKoCUfe35xst8mk5Ic1ZGfjNwhOBzuelVl Ojq7/n4gPif5qFqg X-Received: by 10.46.84.21 with SMTP id i21mr760514ljb.150.1501284887797; Fri, 28 Jul 2017 16:34:47 -0700 (PDT) From: Aleksandr Bezzubikov To: seabios@seabios.org Date: Sat, 29 Jul 2017 02:34:31 +0300 Message-Id: <1501284872-2078-3-git-send-email-zuban32s@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1501284872-2078-1-git-send-email-zuban32s@gmail.com> References: <1501284872-2078-1-git-send-email-zuban32s@gmail.com> X-Spam-Score: -2.1 (--) Subject: [SeaBIOS] [PATCH v3 2/3] pci: add QEMU-specific PCI capability structure X-BeenThere: seabios@seabios.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: SeaBIOS mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mst@redhat.com, qemu-devel@nongnu.org, kraxel@redhat.com, marcel@redhat.com, lersek@redhat.com MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: seabios-bounces@seabios.org Sender: "SeaBIOS" X-Duff: Orig. Duff, Duff Lite, Duff Dry, Duff Dark, Raspberry Duff, Lady Duff, Red Duff, Tartar Control Duff X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" On PCI init PCI bridge devices may need some extra info about bus number to reserve, IO, memory and prefetchable memory limits. QEMU can provide this with special vendor-specific PCI capability. This capability is intended to be used only for Red Hat PCI bridges, i.e. QEMU cooperation. Signed-off-by: Aleksandr Bezzubikov --- src/fw/dev-pci.h | 62 ++++++++++++++++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 62 insertions(+) create mode 100644 src/fw/dev-pci.h diff --git a/src/fw/dev-pci.h b/src/fw/dev-pci.h new file mode 100644 index 0000000..fbd49ed --- /dev/null +++ b/src/fw/dev-pci.h @@ -0,0 +1,62 @@ +#ifndef _PCI_CAP_H +#define _PCI_CAP_H + +#include "types.h" + +/* + +QEMU-specific vendor(Red Hat)-specific capability. +It's intended to provide some hints for firmware to init PCI devices. + +Its is shown below: + +Header: + +u8 id; Standard PCI Capability Header field +u8 next; Standard PCI Capability Header field +u8 len; Standard PCI Capability Header field +u8 type; Red Hat vendor-specific capability type: + now only REDHAT_QEMU_CAP 1 exists +Data: + +u16 non_prefetchable_16; non-prefetchable memory limit + +u8 bus_res; minimum bus number to reserve; + this is necessary for PCI Express Root Ports + to support PCIE-to-PCI bridge hotplug + +u8 io_8; IO limit in case of 8-bit limit value +u32 io_32; IO limit in case of 16-bit limit value + io_8 and io_16 are mutually exclusive, in other words, + they can't be non-zero simultaneously + +u32 prefetchable_32; non-prefetchable memory limit + in case of 32-bit limit value +u64 prefetchable_64; non-prefetchable memory limit + in case of 64-bit limit value + prefetachable_32 and prefetchable_64 are + mutually exclusive, in other words, + they can't be non-zero simultaneously +If any field in Data section is 0, +it means that such kind of reservation +is not needed. + +*/ + +/* Offset of vendor-specific capability type field */ +#define PCI_CAP_VNDR_SPEC_TYPE 3 + +/* List of valid Red Hat vendor-specific capability types */ +#define REDHAT_CAP_TYPE_QEMU 1 + + +/* Offsets of QEMU capability fields */ +#define QEMU_PCI_CAP_NON_PREF 4 +#define QEMU_PCI_CAP_BUS_RES 6 +#define QEMU_PCI_CAP_IO_8 7 +#define QEMU_PCI_CAP_IO_32 8 +#define QEMU_PCI_CAP_PREF_32 12 +#define QEMU_PCI_CAP_PREF_64 16 +#define QEMU_PCI_CAP_SIZE 24 + +#endif /* _PCI_CAP_H */ --=20 2.7.4 _______________________________________________ SeaBIOS mailing list SeaBIOS@seabios.org https://mail.coreboot.org/mailman/listinfo/seabios