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[109.173.19.108]) by smtp.gmail.com with ESMTPSA id 79sm1952439ljf.8.2017.08.05.13.30.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 05 Aug 2017 13:30:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=b/FueGBlYNAFQ/RajAwMkRjKV4N3VX+Jcw4nXuRvfOs=; b=Lzh516GSwtrD6nGHGK/bZvK5U/ErfQcgvc1WSasnKJInC/G0gLcMtK681OqWOs0SZF SVZdn61C3Og9TtsQ0lriVwIQhKg78Q3DaRBpBow/5wgzKwH1oh3Vqz+EIiSvGYksMJNa rYIg4VgOijS1WN7oNI8MSQ8FY1f8PAV9tu6T2tyBGoPxUVQ80KINHDlohpKd4Fp5jUWi 4NhUXKI9m8Wg07TzfFgNMB0x4ZI84EQt8sYjW98CV01uddacWuy4iBcu15MYDn3bCpGe KP4j507AAmzlxeQKMewfiB2Se/92HEFizTGjT0Efje0IYeG37CpLdUSeWdlIX2Ee9ZLF s61Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=b/FueGBlYNAFQ/RajAwMkRjKV4N3VX+Jcw4nXuRvfOs=; b=PMTjMUdjr/nmqiBAWOHGd/MzECOfmXP60YqbQogooOCugubRf4VLu6oPTDX6K1/DVT PGTTJv9dAv/4qetJKLsqJ1DUQkzAN5QAFVZKVR9TQYllVHF4v2/xvFg5xDoLIDAFgNUC +wpvGkjHFyS5/uCAtOlnF2pAZPLe2ibwUiVMOXiAq8jPX6gmmNMc24Kp4bfUngiAGLDq 3zQkST7nVeqG4ChVwieUz7cPFb67Vnp1pw6yj9Ch1Bdw62qZ44dZ/I4lflOq6eiR6zi5 wyZzz4fGvv3aLDizbyTioz99ULYaeK5M9x4PX0DPDpK+a6A9SV5pdzs9Vf3B8unUIllf gcYA== X-Gm-Message-State: AHYfb5jC31HV4fWppv7eJKbNoxKVZSNQVpUed9U2K7gIyE6qx3McrgIU vder1uH904F0D7h5C1U= X-Received: by 10.46.21.84 with SMTP id 20mr2237823ljv.72.1501965008065; Sat, 05 Aug 2017 13:30:08 -0700 (PDT) From: Aleksandr Bezzubikov To: seabios@seabios.org Date: Sat, 5 Aug 2017 23:29:54 +0300 Message-Id: <1501964994-5257-4-git-send-email-zuban32s@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1501964994-5257-1-git-send-email-zuban32s@gmail.com> References: <1501964994-5257-1-git-send-email-zuban32s@gmail.com> X-Spam-Score: -4.5 (----) Subject: [SeaBIOS] [PATCH v4 3/3] pci: enable RedHat PCI bridges to reserve additional buses on PCI init X-BeenThere: seabios@seabios.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: SeaBIOS mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mst@redhat.com, qemu-devel@nongnu.org, kraxel@redhat.com, marcel@redhat.com, lersek@redhat.com MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: seabios-bounces@seabios.org Sender: "SeaBIOS" X-Duff: Orig. Duff, Duff Lite, Duff Dry, Duff Dark, Raspberry Duff, Lady Duff, Red Duff, Tartar Control Duff X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" In case of Red Hat Generic PCIE Root Port reserve additional buses, which number is provided in a vendor-specific capability. Signed-off-by: Aleksandr Bezzubikov --- src/fw/pciinit.c | 69 ++++++++++++++++++++++++++++++++++++++++++++++++++++= ---- src/hw/pci_ids.h | 3 +++ 2 files changed, 68 insertions(+), 4 deletions(-) diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c index 864954f..d241d66 100644 --- a/src/fw/pciinit.c +++ b/src/fw/pciinit.c @@ -15,6 +15,7 @@ #include "hw/pcidevice.h" // pci_probe_devices #include "hw/pci_ids.h" // PCI_VENDOR_ID_INTEL #include "hw/pci_regs.h" // PCI_COMMAND +#include "fw/dev-pci.h" // qemu_pci_cap #include "list.h" // struct hlist_node #include "malloc.h" // free #include "output.h" // dprintf @@ -578,9 +579,42 @@ pci_bios_init_bus_rec(int bus, u8 *pci_bus) pci_bios_init_bus_rec(secbus, pci_bus); =20 if (subbus !=3D *pci_bus) { + u8 res_bus =3D 0; + if (pci_config_readw(bdf, PCI_VENDOR_ID) =3D=3D PCI_VENDOR_ID_= REDHAT && + pci_config_readw(bdf, PCI_DEVICE_ID) =3D=3D + PCI_DEVICE_ID_REDHAT_ROOT_PORT) { + u8 cap; + do { + cap =3D pci_find_capability(bdf, PCI_CAP_ID_VNDR, 0); + } while (cap && + pci_config_readb(bdf, cap + PCI_CAP_REDHAT_TYPE) = !=3D + REDHAT_CAP_TYPE_QEMU); + if (cap) { + u8 cap_len =3D pci_config_readb(bdf, cap + PCI_CAP_FLA= GS); + if (cap_len !=3D QEMU_PCI_CAP_SIZE) { + dprintf(1, "PCI: QEMU cap length %d is invalid\n", + cap_len); + } else { + u32 tmp_res_bus =3D pci_config_readl(bdf, + cap + QEMU_PCI_CAP_BUS_= RES); + if (tmp_res_bus !=3D (u32)-1) { + res_bus =3D tmp_res_bus & 0xFF; + if ((u8)(res_bus + secbus) < secbus || + (u8)(res_bus + secbus) < res_bus) { + dprintf(1, "PCI: bus_reserve value %d is i= nvalid\n", + res_bus); + res_bus =3D 0; + } + } + } + } + res_bus =3D (*pci_bus > secbus + res_bus) ? *pci_bus + : secbus + res_bus; + } dprintf(1, "PCI: subordinate bus =3D 0x%x -> 0x%x\n", - subbus, *pci_bus); - subbus =3D *pci_bus; + subbus, res_bus); + subbus =3D res_bus; + *pci_bus =3D res_bus; } else { dprintf(1, "PCI: subordinate bus =3D 0x%x\n", subbus); } @@ -951,11 +985,38 @@ pci_region_map_one_entry(struct pci_region_entry *ent= ry, u64 addr) =20 u16 bdf =3D entry->dev->bdf; u64 limit =3D addr + entry->size - 1; + + if (pci_config_readw(bdf, PCI_VENDOR_ID) =3D=3D PCI_VENDOR_ID_REDHAT && + pci_config_readw(bdf, PCI_DEVICE_ID) =3D=3D + PCI_DEVICE_ID_REDHAT_ROOT_PORT) { + u8 cap; + do { + cap =3D pci_find_capability(bdf, PCI_CAP_ID_VNDR, 0); + } while (cap && + pci_config_readb(bdf, cap + PCI_CAP_REDHAT_TYPE) !=3D + REDHAT_CAP_TYPE_QEMU); + if (cap) { + u8 cap_len =3D pci_config_readb(bdf, cap + PCI_CAP_FLAGS); + if (cap_len !=3D QEMU_PCI_CAP_SIZE) { + dprintf(1, "PCI: QEMU cap length %d is invalid\n", + cap_len); + } else { + u32 offset =3D cap + QEMU_PCI_CAP_LIMITS_OFFSET + entry->t= ype * 8; + u64 tmp_limit =3D (pci_config_readl(bdf, offset) | + (u64)pci_config_readl(bdf, offset + 4) << 32); + if (tmp_limit !=3D (u64)-1) { + tmp_limit +=3D addr - 1; + limit =3D (limit > tmp_limit) ? limit : tmp_limit; + } + } + } + } + if (entry->type =3D=3D PCI_REGION_TYPE_IO) { pci_config_writeb(bdf, PCI_IO_BASE, addr >> PCI_IO_SHIFT); - pci_config_writew(bdf, PCI_IO_BASE_UPPER16, 0); + pci_config_writew(bdf, PCI_IO_BASE_UPPER16, limit >> 16); pci_config_writeb(bdf, PCI_IO_LIMIT, limit >> PCI_IO_SHIFT); - pci_config_writew(bdf, PCI_IO_LIMIT_UPPER16, 0); + pci_config_writew(bdf, PCI_IO_LIMIT_UPPER16, limit >> 16); } if (entry->type =3D=3D PCI_REGION_TYPE_MEM) { pci_config_writew(bdf, PCI_MEMORY_BASE, addr >> PCI_MEMORY_SHIFT); diff --git a/src/hw/pci_ids.h b/src/hw/pci_ids.h index 4ac73b4..38fa2ca 100644 --- a/src/hw/pci_ids.h +++ b/src/hw/pci_ids.h @@ -2263,6 +2263,9 @@ #define PCI_DEVICE_ID_KORENIX_JETCARDF0 0x1600 #define PCI_DEVICE_ID_KORENIX_JETCARDF1 0x16ff =20 +#define PCI_VENDOR_ID_REDHAT 0x1b36 +#define PCI_DEVICE_ID_REDHAT_ROOT_PORT 0x000C + #define PCI_VENDOR_ID_TEKRAM 0x1de1 #define PCI_DEVICE_ID_TEKRAM_DC290 0xdc29 =20 --=20 2.7.4 _______________________________________________ SeaBIOS mailing list SeaBIOS@seabios.org https://mail.coreboot.org/mailman/listinfo/seabios