From nobody Sat May 10 07:14:38 2025 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 80.81.252.135 is neither permitted nor denied by domain of seabios.org) client-ip=80.81.252.135; envelope-from=seabios-bounces@seabios.org; helo=mail.coreboot.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 80.81.252.135 is neither permitted nor denied by domain of seabios.org) smtp.mailfrom=seabios-bounces@seabios.org Return-Path: Received: from mail.coreboot.org (mail.coreboot.org [80.81.252.135]) by mx.zohomail.com with SMTPS id 150301159272694.98566512588798; Thu, 17 Aug 2017 16:13:12 -0700 (PDT) Received: from [127.0.0.1] (helo=ra.coresystems.de) by mail.coreboot.org with esmtp (Exim 4.86_2) (envelope-from ) id 1diTvd-0000eP-2b; Fri, 18 Aug 2017 01:10:17 +0200 Received: from mail-lf0-f68.google.com ([209.85.215.68]) by mail.coreboot.org with esmtps (TLSv1.2:ECDHE-RSA-AES128-GCM-SHA256:128) (Exim 4.86_2) (envelope-from ) id 1diTvO-0000YK-Vr for seabios@seabios.org; Fri, 18 Aug 2017 01:10:13 +0200 Received: by mail-lf0-f68.google.com with SMTP id f7so414804lfg.0 for ; Thu, 17 Aug 2017 16:12:45 -0700 (PDT) Received: from localhost.localdomain ([93.185.28.201]) by smtp.gmail.com with ESMTPSA id d17sm987659lfl.86.2017.08.17.16.12.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 17 Aug 2017 16:12:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=N6+V7wnmbRAwAyThDHQGh8df4VtbF490wcd0LLsG958=; b=CLR60IpbTxBae9kOtL14fnnGmgWDoO2SfANIaeskOGV5Kw2tzL32LfaEnOz3zLEUkh 5JX4ZNxS9j2B+8HCFK3nlXR5nd5ySjUaqrUg7LvnZoYdHOoZZczc+55zNriftgAyH8bh cPW/bqlnzW9qmaXOP2cziR1c4ccy4txzAsaImdTqpiX0RQ7WQpT17lGs6caSJA4qvMpB xmq5Bsrgdg+KcF+5qWlQAhmdSQNT1oYwzH+s2QWaytRLwVn3gQ6P8v7I5krTeQ5gXk6a +fBls44mfx8b5q5JLWbYzXNCI7HX8BAugfsqNvrai6mjOacjIsikM69B+Zv4ctf/DNPM PtRg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=N6+V7wnmbRAwAyThDHQGh8df4VtbF490wcd0LLsG958=; b=lc9CgQxgDmuUBH3VFqU9jEmx6IlQJhADxVhsBxPbzqt4tRaKoypHcFgujDSN3NPjDV fwyXQ9CVIGyZfSrB6OrW5DFabVSXmOAkpJe+m2SxL0FR4OF0PblR1M1dY/rllp4PQ4z0 aGg13gZl7MT7wsGt9J5s+x5LTVnKNfjLMBgoL8UIImrTDM/N9iT8679z+D3vrHFXD2lf 3FwYD/B0+Rlm5z8m1rfrC6UAK/nbefTzPnw1i4040tyAwlz3S/AJ2/lfKBIHDzJFVRia 6OFOVZ9vr3yIgClE9H2fOVw7F8phu59slpfWWkLG/UkMemqzHHlOm6ig8omlUvpfEB2t 41tg== X-Gm-Message-State: AHYfb5iLXxMerSlwLlqtNY071cuKvCEfWrLzznFtjpzcVBZKf8aPLhQI 3edksjofDJE3OMduhZY= X-Received: by 10.46.19.2 with SMTP id 2mr2551535ljt.148.1503011563847; Thu, 17 Aug 2017 16:12:43 -0700 (PDT) From: Aleksandr Bezzubikov To: seabios@seabios.org Date: Fri, 18 Aug 2017 02:12:29 +0300 Message-Id: <1503011551-7246-2-git-send-email-zuban32s@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1503011551-7246-1-git-send-email-zuban32s@gmail.com> References: <1503011551-7246-1-git-send-email-zuban32s@gmail.com> X-Spam-Score: -4.5 (----) Subject: [SeaBIOS] [PATCH v7 1/3] pci: refactor pci_find_capapibilty to get bdf as the first argument instead of the whole pci_device X-BeenThere: seabios@seabios.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: SeaBIOS mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mst@redhat.com, qemu-devel@nongnu.org, kraxel@redhat.com, marcel@redhat.com, lersek@redhat.com MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: seabios-bounces@seabios.org Sender: "SeaBIOS" X-Duff: Orig. Duff, Duff Lite, Duff Dry, Duff Dark, Raspberry Duff, Lady Duff, Red Duff, Tartar Control Duff X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Refactor pci_find_capability function to get bdf instead of a whole pci_device* as the only necessary field for this function is still bdf. Signed-off-by: Aleksandr Bezzubikov Reviewed-by: Marcel Apfelbaum --- src/fw/pciinit.c | 4 ++-- src/hw/pci.c | 25 +++++++++++++++++++++++++ src/hw/pci.h | 1 + src/hw/pcidevice.c | 24 ------------------------ src/hw/pcidevice.h | 1 - src/hw/virtio-pci.c | 6 +++--- 6 files changed, 31 insertions(+), 30 deletions(-) diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c index 08221e6..864954f 100644 --- a/src/fw/pciinit.c +++ b/src/fw/pciinit.c @@ -762,7 +762,7 @@ static int pci_bus_hotplug_support(struct pci_bus *bus,= u8 pcie_cap) return downstream_port && slot_implemented; } =20 - shpc_cap =3D pci_find_capability(bus->bus_dev, PCI_CAP_ID_SHPC, 0); + shpc_cap =3D pci_find_capability(bus->bus_dev->bdf, PCI_CAP_ID_SHPC, 0= ); return !!shpc_cap; } =20 @@ -844,7 +844,7 @@ static int pci_bios_check_devices(struct pci_bus *busse= s) */ parent =3D &busses[0]; int type; - u8 pcie_cap =3D pci_find_capability(s->bus_dev, PCI_CAP_ID_EXP, 0); + u8 pcie_cap =3D pci_find_capability(s->bus_dev->bdf, PCI_CAP_ID_EX= P, 0); int hotplug_support =3D pci_bus_hotplug_support(s, pcie_cap); for (type =3D 0; type < PCI_REGION_TYPE_COUNT; type++) { u64 align =3D (type =3D=3D PCI_REGION_TYPE_IO) ? diff --git a/src/hw/pci.c b/src/hw/pci.c index 8e3d617..50d9d2d 100644 --- a/src/hw/pci.c +++ b/src/hw/pci.c @@ -58,6 +58,30 @@ pci_config_maskw(u16 bdf, u32 addr, u16 off, u16 on) pci_config_writew(bdf, addr, val); } =20 +u8 pci_find_capability(u16 bdf, u8 cap_id, u8 cap) +{ + int i; + u16 status =3D pci_config_readw(bdf, PCI_STATUS); + + if (!(status & PCI_STATUS_CAP_LIST)) + return 0; + + if (cap =3D=3D 0) { + /* find first */ + cap =3D pci_config_readb(bdf, PCI_CAPABILITY_LIST); + } else { + /* find next */ + cap =3D pci_config_readb(bdf, cap + PCI_CAP_LIST_NEXT); + } + for (i =3D 0; cap && i <=3D 0xff; i++) { + if (pci_config_readb(bdf, cap + PCI_CAP_LIST_ID) =3D=3D cap_id) + return cap; + cap =3D pci_config_readb(bdf, cap + PCI_CAP_LIST_NEXT); + } + + return 0; +} + // Helper function for foreachbdf() macro - return next device int pci_next(int bdf, int bus) @@ -107,3 +131,4 @@ pci_reboot(void) outb(v|6, PORT_PCI_REBOOT); /* Actually do the reset */ udelay(50); } + diff --git a/src/hw/pci.h b/src/hw/pci.h index ee6e196..2e30e28 100644 --- a/src/hw/pci.h +++ b/src/hw/pci.h @@ -39,6 +39,7 @@ u32 pci_config_readl(u16 bdf, u32 addr); u16 pci_config_readw(u16 bdf, u32 addr); u8 pci_config_readb(u16 bdf, u32 addr); void pci_config_maskw(u16 bdf, u32 addr, u16 off, u16 on); +u8 pci_find_capability(u16 bdf, u8 cap_id, u8 cap); int pci_next(int bdf, int bus); int pci_probe_host(void); void pci_reboot(void); diff --git a/src/hw/pcidevice.c b/src/hw/pcidevice.c index cfebf66..8853cf7 100644 --- a/src/hw/pcidevice.c +++ b/src/hw/pcidevice.c @@ -134,30 +134,6 @@ pci_find_init_device(const struct pci_device_id *ids, = void *arg) return NULL; } =20 -u8 pci_find_capability(struct pci_device *pci, u8 cap_id, u8 cap) -{ - int i; - u16 status =3D pci_config_readw(pci->bdf, PCI_STATUS); - - if (!(status & PCI_STATUS_CAP_LIST)) - return 0; - - if (cap =3D=3D 0) { - /* find first */ - cap =3D pci_config_readb(pci->bdf, PCI_CAPABILITY_LIST); - } else { - /* find next */ - cap =3D pci_config_readb(pci->bdf, cap + PCI_CAP_LIST_NEXT); - } - for (i =3D 0; cap && i <=3D 0xff; i++) { - if (pci_config_readb(pci->bdf, cap + PCI_CAP_LIST_ID) =3D=3D cap_i= d) - return cap; - cap =3D pci_config_readb(pci->bdf, cap + PCI_CAP_LIST_NEXT); - } - - return 0; -} - // Enable PCI bus-mastering (ie, DMA) support on a pci device void pci_enable_busmaster(struct pci_device *pci) diff --git a/src/hw/pcidevice.h b/src/hw/pcidevice.h index 354b549..225d545 100644 --- a/src/hw/pcidevice.h +++ b/src/hw/pcidevice.h @@ -69,7 +69,6 @@ int pci_init_device(const struct pci_device_id *ids , struct pci_device *pci, void *arg); struct pci_device *pci_find_init_device(const struct pci_device_id *ids , void *arg); -u8 pci_find_capability(struct pci_device *pci, u8 cap_id, u8 cap); void pci_enable_busmaster(struct pci_device *pci); u16 pci_enable_iobar(struct pci_device *pci, u32 addr); void *pci_enable_membar(struct pci_device *pci, u32 addr); diff --git a/src/hw/virtio-pci.c b/src/hw/virtio-pci.c index e5c2c33..96f9c6b 100644 --- a/src/hw/virtio-pci.c +++ b/src/hw/virtio-pci.c @@ -19,7 +19,7 @@ #include "malloc.h" // free #include "output.h" // dprintf #include "pci.h" // pci_config_readl -#include "pcidevice.h" // pci_find_capability +#include "pcidevice.h" // struct pci_device #include "pci_regs.h" // PCI_BASE_ADDRESS_0 #include "string.h" // memset #include "virtio-pci.h" @@ -381,7 +381,7 @@ fail: =20 void vp_init_simple(struct vp_device *vp, struct pci_device *pci) { - u8 cap =3D pci_find_capability(pci, PCI_CAP_ID_VNDR, 0); + u8 cap =3D pci_find_capability(pci->bdf, PCI_CAP_ID_VNDR, 0); struct vp_cap *vp_cap; const char *mode; u32 offset, base, mul; @@ -479,7 +479,7 @@ void vp_init_simple(struct vp_device *vp, struct pci_de= vice *pci) vp_cap->cap, type, vp_cap->bar, addr, offset, mode); } =20 - cap =3D pci_find_capability(pci, PCI_CAP_ID_VNDR, cap); + cap =3D pci_find_capability(pci->bdf, PCI_CAP_ID_VNDR, cap); } =20 if (vp->common.cap && vp->notify.cap && vp->isr.cap && vp->device.cap)= { --=20 2.7.4 _______________________________________________ SeaBIOS mailing list SeaBIOS@seabios.org https://mail.coreboot.org/mailman/listinfo/seabios