From nobody Sat May 10 08:45:54 2025 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 80.81.252.135 is neither permitted nor denied by domain of seabios.org) client-ip=80.81.252.135; envelope-from=seabios-bounces@seabios.org; helo=mail.coreboot.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 80.81.252.135 is neither permitted nor denied by domain of seabios.org) smtp.mailfrom=seabios-bounces@seabios.org; Return-Path: Received: from mail.coreboot.org (mail.coreboot.org [80.81.252.135]) by mx.zohomail.com with SMTPS id 1487649417995254.35673278796457; Mon, 20 Feb 2017 19:56:57 -0800 (PST) Received: from [127.0.0.1] (helo=ra.coresystems.de) by mail.coreboot.org with esmtp (Exim 4.86_2) (envelope-from ) id 1cg1Z7-0000qK-IB; Tue, 21 Feb 2017 04:56:37 +0100 Received: from mail-oi0-f41.google.com ([209.85.218.41]) by mail.coreboot.org with esmtps (TLSv1.2:ECDHE-RSA-AES128-GCM-SHA256:128) (Exim 4.86_2) (envelope-from ) id 1cg1Yw-0000pa-NY for seabios@seabios.org; Tue, 21 Feb 2017 04:56:35 +0100 Received: by mail-oi0-f41.google.com with SMTP id y140so31830567oie.1 for ; Mon, 20 Feb 2017 19:56:26 -0800 (PST) Received: from Arrow.corp.skyportsystems.com (76-236-31-201.lightspeed.sntcca.sbcglobal.net. [76.236.31.201]) by smtp.gmail.com with ESMTPSA id r129sm1164838oih.31.2017.02.20.19.56.23 (version=TLS1 cipher=AES128-SHA bits=128/128); Mon, 20 Feb 2017 19:56:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=skyportsystems.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=pMfrbkrmXZgY7n6eGAVZqkpNzo59sogyAIrQsvhnWPY=; b=X0h3lw6l0i07q6SMhNhQw7dUkTSPFTnT5/Ls0zeOkbxU5z5y8TFePOTJBJCyRGb8ch AnnLSaaVg6dVpy7wIDYY4jLX/T5OJyXkyOB9TNlMURSn9Gxg7B+YqqqyljFFyI9e7fyt ZsMOF96JSI5oxQBrfdESQpyEdP8qieHpxnXUU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=pMfrbkrmXZgY7n6eGAVZqkpNzo59sogyAIrQsvhnWPY=; b=fn+aURSGJ9JtAnMvMHvSgQdE3dhHwmheVrDMd4YoQ7DFAdd8wsLOfAdc2FEIB9xq1N VN+E3J4CYx/fO/qr2SWsT/BODINQXOiS5Fxe+hIAXNoJt4iL3jg6EEQ9Cg2499BWxgGy 2t1X1SngDS6e8afQDtHeXyHETv7rccaEXYQtuok3M/6Dw2Tgk6eCEPLfv3/T7AHVFonE vWG3ioK4UO0nxr/2GsYw4butqrkiPXqpjSmxUWbANpYtU1Mx/dZ1NL95KGhDQdvLHbrT ggJl7U0JNePxP8wjNXEDR4cZutIb4gfdHB5K+IQ5VEsGYd4di4HxUAcrap2UCeecuqC2 ejvQ== X-Gm-Message-State: AMke39m6fV2DT5vzOABvO1I1z/nkUx9t7ROMdZNquC4XmirMZvfgBJ0yXKcY4EvxmyFFZjfY X-Received: by 10.202.68.10 with SMTP id r10mr13157056oia.181.1487649384451; Mon, 20 Feb 2017 19:56:24 -0800 (PST) From: ben@skyportsystems.com To: seabios@seabios.org Date: Mon, 20 Feb 2017 19:56:15 -0800 Message-Id: <1f6180ad0e564401797258f6f8acf5847125dd72.1487648787.git.ben@skyportsystems.com> X-Mailer: git-send-email 2.10.1 (Apple Git-78) In-Reply-To: References: In-Reply-To: References: X-Spam-Score: -2.7 (--) Subject: [SeaBIOS] [PATCH v7 1/5] QEMU DMA: Add DMA write capability X-BeenThere: seabios@seabios.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: SeaBIOS mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lersek@redhat.com, mst@redhat.com MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: seabios-bounces@seabios.org Sender: "SeaBIOS" X-Duff: Orig. Duff, Duff Lite, Duff Dry, Duff Dark, Raspberry Duff, Lady Duff, Red Duff, Tartar Control Duff X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Ben Warren This allows BIOS to write data back to QEMU using the DMA interface and provides a higher-level abstraction to write to a fw_cfg file Signed-off-by: Ben Warren Reviewed-by: Laszlo Ersek Reviewed-by: Igor Mammedov --- src/fw/paravirt.c | 49 +++++++++++++++++++++++++++++++++++++++++++++++++ src/fw/paravirt.h | 3 +++ 2 files changed, 52 insertions(+) diff --git a/src/fw/paravirt.c b/src/fw/paravirt.c index 6de70f6..4618647 100644 --- a/src/fw/paravirt.c +++ b/src/fw/paravirt.c @@ -253,6 +253,20 @@ qemu_cfg_read(void *buf, int len) } =20 static void +qemu_cfg_write(void *buf, int len) +{ + if (len =3D=3D 0) { + return; + } + + if (qemu_cfg_dma_enabled()) { + qemu_cfg_dma_transfer(buf, len, QEMU_CFG_DMA_CTL_WRITE); + } else { + warn_internalerror(); + } +} + +static void qemu_cfg_skip(int len) { if (len =3D=3D 0) { @@ -280,6 +294,18 @@ qemu_cfg_read_entry(void *buf, int e, int len) } } =20 +static void +qemu_cfg_write_entry(void *buf, int e, int len) +{ + if (qemu_cfg_dma_enabled()) { + u32 control =3D (e << 16) | QEMU_CFG_DMA_CTL_SELECT + | QEMU_CFG_DMA_CTL_WRITE; + qemu_cfg_dma_transfer(buf, len, control); + } else { + warn_internalerror(); + } +} + struct qemu_romfile_s { struct romfile_s file; int select, skip; @@ -303,6 +329,29 @@ qemu_cfg_read_file(struct romfile_s *file, void *dst, = u32 maxlen) return file->size; } =20 +int +qemu_cfg_write_file(void *src, struct romfile_s *file, u32 offset, u32 len) +{ + if ((offset + len) > file->size) + return -1; + + if (!qemu_cfg_dma_enabled() || (file->copy !=3D qemu_cfg_read_file)) { + warn_internalerror(); + return -1; + } + struct qemu_romfile_s *qfile; + qfile =3D container_of(file, struct qemu_romfile_s, file); + if (offset =3D=3D 0) { + /* Do it in one transfer */ + qemu_cfg_write_entry(src, qfile->select, len); + } else { + qemu_cfg_select(qfile->select); + qemu_cfg_skip(offset); + qemu_cfg_write(src, len); + } + return len; +} + static void qemu_romfile_add(char *name, int select, int skip, int size) { diff --git a/src/fw/paravirt.h b/src/fw/paravirt.h index d8eb7c4..fb220d8 100644 --- a/src/fw/paravirt.h +++ b/src/fw/paravirt.h @@ -3,6 +3,7 @@ =20 #include "config.h" // CONFIG_* #include "biosvar.h" // GET_GLOBAL +#include "romfile.h" // struct romfile_s =20 // Types of paravirtualized platforms. #define PF_QEMU (1<<0) @@ -43,6 +44,7 @@ static inline int runningOnKVM(void) { #define QEMU_CFG_DMA_CTL_READ 0x02 #define QEMU_CFG_DMA_CTL_SKIP 0x04 #define QEMU_CFG_DMA_CTL_SELECT 0x08 +#define QEMU_CFG_DMA_CTL_WRITE 0x10 =20 // QEMU_CFG_DMA ID bit #define QEMU_CFG_VERSION_DMA 2 @@ -53,5 +55,6 @@ void qemu_platform_setup(void); void qemu_cfg_init(void); =20 u16 qemu_get_present_cpus_count(void); +int qemu_cfg_write_file(void *src, struct romfile_s *file, u32 offset, u32= len); =20 #endif --=20 2.7.4 _______________________________________________ SeaBIOS mailing list SeaBIOS@seabios.org https://www.coreboot.org/mailman/listinfo/seabios