From nobody Fri May 9 23:16:38 2025 Delivered-To: importer2@patchew.org Received-SPF: pass (zohomail.com: domain of vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; envelope-from=linux-kernel-owner@vger.kernel.org; helo=vger.kernel.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail(p=quarantine dis=quarantine) header.from=ti.com ARC-Seal: i=1; a=rsa-sha256; t=1611760330; cv=none; d=zohomail.com; s=zohoarc; b=n1VyNx9KNOy9ry75QgxaNDQYAJ2DVrD8oiKuRohB7/hCrYeXCxs53+zgDDJXT0JZj/rEtRTr6ZRZ7pGPnHUP5LZquvhN9SG2MYgaEDhwsZ21iGabCNjm5XLXB8G5HJ5kn1Si9OPD2luOxHVycuMyWVNUsLx8UijSFAMY+KnsPEs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1611760330; h=Content-Type:Cc:Date:From:In-Reply-To:List-Id:MIME-Version:Message-ID:References:Subject:To; bh=8Up5CIJcb3XtOsEj0Muiw03UhR2R1xxUB+M5TygTq+w=; b=IDwrRFODPDhHO24s/0rk0SBdpekT3Sn8ym21YBbJo0FoyGBKrvgRWHeaYLi08caApo4T2MKJx9PdrpkwO3rwu48K6F7Hkz6mXSGGFgGjQUub6kNKHNtYb4aqhCZw8o6thPHUM7J7Q0SLjZs9/GkzL1X91eEJmjuDQEYe2J0QlGM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail header.from= (p=quarantine dis=quarantine) header.from= Return-Path: Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mx.zohomail.com with SMTP id 161176033003824.13388386615827; Wed, 27 Jan 2021 07:12:10 -0800 (PST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343541AbhA0PL3 (ORCPT ); Wed, 27 Jan 2021 10:11:29 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:52860 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343497AbhA0PKO (ORCPT ); Wed, 27 Jan 2021 10:10:14 -0500 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 10RF8Te1052381; Wed, 27 Jan 2021 09:08:29 -0600 Received: from DFLE113.ent.ti.com (dfle113.ent.ti.com [10.64.6.34]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 10RF8TcW007665 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 27 Jan 2021 09:08:29 -0600 Received: from DFLE111.ent.ti.com (10.64.6.32) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Wed, 27 Jan 2021 09:08:29 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Wed, 27 Jan 2021 09:08:29 -0600 Received: from gsaswath-HP-ProBook-640-G5.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 10RF8IH9064427; Wed, 27 Jan 2021 09:08:25 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1611760109; bh=8Up5CIJcb3XtOsEj0Muiw03UhR2R1xxUB+M5TygTq+w=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Cwgsl6MuS28UrF7maFDWKzAoJ8s54qGDPl/9pugJbGTXF8F4Ch5Xm06CK+6lZT80X sjy3FzImg+P+umhccCeJFrrW/K96FAmeADozMco3d/fGUtro4tb4bOPERyL6nTAZCd JvGxInR/i4gvdSCpq3s2Y7Ia+0pa5h7u5GKss4Cs= From: Aswath Govindraju CC: Vignesh Raghavendra , Lokesh Vutla , Kishon Vijay Abraham I , Faiz Abbas , Aswath Govindraju , Nishanth Menon , Tero Kristo , Rob Herring , , , Subject: [PATCH v3 1/2] dts: ti: k3-j7200-main: Add support for zeroth instance of GPIO subsystem Date: Wed, 27 Jan 2021 20:38:14 +0530 Message-ID: <20210127150815.16991-2-a-govindraju@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210127150815.16991-1-a-govindraju@ti.com> References: <20210127150815.16991-1-a-govindraju@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add support for the zeroth instance of GPIO subsystem in the main domain. Signed-off-by: Aswath Govindraju --- arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-j7200-main.dtsi index 4cc2e9094d0e..75dffbb26d52 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -294,6 +294,23 @@ pinctrl-single,function-mask =3D <0xffffffff>; }; =20 + main_gpio0: gpio@600000 { + compatible =3D "ti,j721e-gpio", "ti,keystone-gpio"; + reg =3D <0x0 0x00600000 0x0 0x100>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&main_gpio_intr>; + interrupts =3D <145>, <146>, <147>, <148>, + <149>; + interrupt-controller; + #interrupt-cells =3D <2>; + ti,ngpio =3D <69>; + ti,davinci-gpio-unbanked =3D <0>; + power-domains =3D <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>; + clocks =3D <&k3_clks 105 0>; + clock-names =3D "gpio"; + }; + main_uart0: serial@2800000 { compatible =3D "ti,j721e-uart", "ti,am654-uart"; reg =3D <0x00 0x02800000 0x00 0x100>; --=20 2.17.1 From nobody Fri May 9 23:16:38 2025 Delivered-To: importer2@patchew.org Received-SPF: pass (zohomail.com: domain of vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; envelope-from=linux-kernel-owner@vger.kernel.org; helo=vger.kernel.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail(p=quarantine dis=quarantine) header.from=ti.com ARC-Seal: i=1; a=rsa-sha256; t=1611760331; cv=none; d=zohomail.com; s=zohoarc; b=lkVi38MdFJpOE8aRILwSwQI6//Y0VICSWhZ/P5UWiKBZdgCeFoR2EyWQDqiXqqgIvYevg1Yfgd2BipMc24eUOvuNo9GIVv/nMjV/+2A/Ss5YRE8pkN5AHAYxuSBSGyRxDO8t3B8xoLA7zcy8yanLaKQljYa6eggC1xGk1j0vWWw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1611760331; h=Content-Type:Cc:Date:From:In-Reply-To:List-Id:MIME-Version:Message-ID:References:Subject:To; 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charset="utf-8" The following speed modes are now supported in J7200 SoC, - HS200 and HS400 modes at 1.8 V card voltage, in MMCSD0 subsystem [1]. - UHS-I speed modes in MMCSD1 subsystem [1]. Add support for UHS-I modes by adding voltage regulator device tree nodes and corresponding pinmux details, to power cycle and voltage switch cards. Also set respective tags in sdhci0 and remove no-1-8-v tag from sdhci1 device tree nodes. [1] - section 12.3.6.1.1 MMCSD Features, in https://www.ti.com/lit/ug/spruiu1a/spruiu1a.pdf Signed-off-by: Aswath Govindraju --- performance test logs using EXT4 filesystem for eMMC HS400 speed mode, https://pastebin.ubuntu.com/p/KFphDYXj93/ performance test logs using EXT4 filesystem for SD SDR104 speed mode, https://pastebin.ubuntu.com/p/GQKtwGT8Qg/ .../dts/ti/k3-j7200-common-proc-board.dts | 31 +++++++++++++++++++ arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 3 +- 2 files changed, 33 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/a= rm64/boot/dts/ti/k3-j7200-common-proc-board.dts index 4a7182abccf5..1e1a0022822d 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts @@ -16,6 +16,29 @@ stdout-path =3D "serial2:115200n8"; bootargs =3D "console=3DttyS2,115200n8 earlycon=3Dns16550a,mmio32,0x0280= 0000"; }; + + vdd_mmc1: fixedregulator-sd { + compatible =3D "regulator-fixed"; + regulator-name =3D "vdd_mmc1"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-boot-on; + enable-active-high; + gpios =3D <&exp2 2 GPIO_ACTIVE_HIGH>; + }; + + vdd_sd_dv: gpio-regulator-vdd-sd-dv { + compatible =3D "regulator-gpio"; + regulator-name =3D "vdd_sd_dv"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&vdd_sd_dv_pins_default>; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + regulator-boot-on; + gpios =3D <&main_gpio0 55 GPIO_ACTIVE_HIGH>; + states =3D <1800000 0x0 + 3300000 0x1>; + }; }; =20 &wkup_pmx0 { @@ -70,6 +93,12 @@ J721E_IOPAD(0x120, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */ >; }; + + vdd_sd_dv_pins_default: vdd_sd_dv_pins_default { + pinctrl-single,pins =3D < + J721E_IOPAD(0xd0, PIN_INPUT, 7) /* (T5) SPI0_D1.GPIO0_55 */ + >; + }; }; =20 &wkup_uart0 { @@ -190,6 +219,8 @@ /* SD card */ pinctrl-0 =3D <&main_mmc1_pins_default>; pinctrl-names =3D "default"; + vmmc-supply =3D <&vdd_mmc1>; + vqmmc-supply =3D <&vdd_sd_dv>; ti,driver-strength-ohm =3D <50>; disable-wp; }; diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-j7200-main.dtsi index 75dffbb26d52..8392d771ef13 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -534,6 +534,8 @@ ti,trm-icp =3D <0x8>; bus-width =3D <8>; mmc-ddr-1_8v; + mmc-hs200-1_8v; + mmc-hs400-1_8v; dma-coherent; }; =20 @@ -551,7 +553,6 @@ ti,otap-del-sel-sdr50 =3D <0xc>; ti,otap-del-sel-sdr104 =3D <0x5>; ti,otap-del-sel-ddr50 =3D <0xc>; - no-1-8-v; dma-coherent; }; =20 --=20 2.17.1